JP2000243066A - Editing recorder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an editing recorder in which an editing operation having a good editing precision is conducted at high speed. SOLUTION: The recorder is provided with a system control means 110, which outputs an operating mode signal 111, a reproduced signal processing means 103, which outputs reproduced signals 112, a time code reproducing means 104, which outputs time code information 113, a time code detecting means 105, which outputs detected time code information 113a whenever a reference signal 115 is inputted, a delay amount computing means 106, which computes the amount of delay based on the difference between each of the information 113a and outputs a delay signal 116 corresponding to the amount of the delay, a recording instruction generating means 107, which outputs a recording instruction signal 117, a recorded data generating means 108, which outputs recorded data 118 in accordance with the signal 117, and a recorded signal processing means 109 which outputs recorded data 118.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an editing / recording apparatus used for editing video information in a magnetic recording / reproducing apparatus.
In particular, the present invention relates to an editing and recording apparatus capable of recording and reproducing at N times speed.

[0002]

2. Description of the Related Art Conventionally, an editing and recording apparatus operates at a normal speed (1).
Double-speed) to edit video information,
Generally, it has a configuration as shown in FIG. That is, the editing and recording apparatus according to the related art includes a reproducing magnetic head 701 and a recording magnetic head 702, a reproducing signal processing circuit 703, a time code reproducing circuit 704, a time code detecting circuit 705, and a recording data generating circuit. 706
, A stored data circuit 707 and a recording signal processing circuit 708
And a system control circuit 709 which detects the position immediately before the edit point in accordance with the time code information 710 which is the time information output from the time code detection circuit 705.
Output an operation mode signal 711 for controlling the operation mode of reproduction and recording, that is, an operation mode signal 711 for switching between the reproduction operation and the recording operation.

[0003] An operation mode signal 7 indicating a reproducing operation is provided.
11 reproduces the signal output from the reproducing magnetic head 701. The reproduction signal processing circuit 703 receives the reproduction signal 7 from the reproduction signal processing circuit 703.
12 is output. Also, a time code reproducing circuit 704
, The time code information 710 in the reproduction signal 712 output from the reproduction signal processing circuit 703 is reproduced, while the time code detection circuit 705 outputs
The time code information 710 is detected every time a reference signal (frame signal) 714 is input after passing through, and the detected time code information 710 is transmitted to both the recording data creation circuit 706 and the system control circuit 709. Output to

Further, at this time, the stored data circuit 7
Reference numeral 07 denotes video data stored as recording data. The recording data creation circuit 706 searches for the recording data stored in the storage data circuit 707 based on the time code information 710 from the time code detection circuit 705. And the retrieved record data is stored in a record signal processing circuit 70.
8 is output. Furthermore, in the recording signal processing circuit 708, the recording data creation circuit 706
The operation mode signal 711 indicating the recording operation, that is, the system control circuit 7
Recording processing is performed in response to the operation mode signal 711 output from the control unit 09, and the recording data subjected to the recording processing is recorded on the magnetic tape through the recording magnetic head 702.

[0005]

In the editing and recording apparatus, there is an increasing demand for higher data density and a shorter working time, or with the introduction of non-linear editing. It has become necessary to adopt a configuration that enables high-speed recording and reproduction.
However, when high-speed editing is performed while using the editing / recording / reproducing apparatus having the above-described conventional configuration, not only adjustment for improving the editing accuracy is required for each magnetic recording / reproducing apparatus, but also the reproduction speed differs. When editing between magnetic recording / reproducing devices, there has been a problem that the editing timing must be changed for each.

The present invention has been made in view of such inconvenience, and it is possible to perform an editing operation with good editing accuracy at a high speed even when magnetic recording / reproducing devices having different reproduction speeds are connected. It is an object of the present invention to provide an editing and recording device having a configuration.

[0007]

SUMMARY OF THE INVENTION An editing and recording apparatus according to the present invention automatically detects an interval between time code information to be reproduced within a predetermined period, and adjusts an editing timing based on the detected result. Since the configuration is changed, it is possible to ensure an advantage that an accurate editing operation can be easily performed even at a high reproduction speed.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An editing / recording apparatus according to the present invention is capable of recording / reproducing at N times speed, and includes a system control means for outputting an operation mode signal for controlling operation modes of reproduction and recording; The signal output from the reproducing magnetic head is reproduced according to the operation mode signal at the time of reproduction,
Reproduction signal processing means for outputting a reproduction signal subjected to reproduction processing;
Time code reproducing means for reproducing the time code information in the reproduced signal and outputting the reproduced time code information, and detecting the time code information every time a reference signal is inputted, and outputting the detected time code information Time code detection means, delay amount calculation means for calculating a delay amount based on a difference between time code information stored at reference signal input intervals, and outputting a delay signal corresponding to the delay amount, and recording based on the delay signal Recording command generating means for correcting the operation mode signal at the time and outputting a recording command signal corresponding to the corrected operation mode signal, and creating time code correction information by correcting the time code information based on the delay signal. Recording data generating means for outputting recording data corresponding to the time code correction information in response to a recording command signal, and recording data based on the recording command signal. Record processing data, characterized in that it comprises a recording signal processing means for outputting the recording data recording process to the recording magnetic head. In the following description of the present embodiment, each means has a hardware circuit configuration. However, it is needless to say that each means may be configured as software.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a configuration of an editing and recording apparatus according to the embodiment, FIG. 2 is a block diagram showing a configuration of a time code detecting circuit, FIG. 3 is a block diagram showing a configuration of a delay amount calculating circuit, 4 is a block diagram showing a configuration of a recording command generating circuit, FIG. 5 is a block diagram showing a configuration of a recording data generating circuit, and FIG. 6 is an operation explanatory diagram for explaining an operation procedure of the editing and recording apparatus.

As shown in FIG. 1, the editing and recording apparatus includes a reproducing magnetic head 101 and a recording magnetic head 102, a reproduced signal processing circuit 103, and a time code reproducing circuit 104.
, Time code detection circuit 105, delay amount calculation circuit 1
06, a recording command generation circuit 107, a recording data generation circuit 108, a recording signal processing circuit 109, and a system control circuit 110. The system control circuit 110 controls the operation mode of reproduction and recording. To generate and output an operation mode signal 111. Then, the reproduction signal processing circuit 103
When the operation mode signal 111 output from the system control circuit 110 indicates a reproducing operation, the signal output from the reproducing magnetic head 101 is reproduced, and
The time code reproduction circuit 104 outputs a reproduction signal 112 that has been subjected to reproduction processing.
, And reproduces the time code information 113, which is the time information in the reproduction signal 112 output from the controller, and outputs the reproduced time code information 113 to both the time code detection circuit 105 and the recording data generation circuit 108. .

The time code detection circuit 105 receives a reference signal 115, for example,
Each time the reference signal 115, which is a frame signal, is inputted, the time code information 113, that is, the time code information 113 reproduced by the time code reproducing circuit 104 is detected, and the detected time code information 113 is detected by the delay amount calculating circuit 106. Output to In the following description, the time code information 113 that is detected each time the reference signal 115 is input and that is output from the time code detection circuit 105 is separately described as time code information 113a. On the other hand, the delay amount calculation circuit 106 stores the time code information 113a output from the time code detection circuit 105 at the input interval of the reference signal 115, and calculates the delay amount based on the difference between the stored time code information 113a. Then, the delay signal 116 corresponding to the delay amount is output.

Further, the recording command generation circuit 107 corrects the operation mode signal 111 at the time of recording output from the system control circuit 110 by a predetermined amount based on the delay signal 116. A recording command signal 117 generated in correspondence with the signal 111 is output.
Reference numeral 8 denotes time code correction information generated by correcting the time code information 113 output from the time code reproduction circuit 104 based on the delay signal 116, and recording data 118 corresponding to the generated time code correction information is recorded by a recording command signal. The data is output to the recording signal processing circuit 109 in accordance with 117. Furthermore, the recording signal processing circuit 1
09, the recording data 1 based on the recording command signal 117
The recording processing of the recording data 118 is executed, and the recording data 118 subjected to the recording processing is output through the recording magnetic head 102 and then recorded on the magnetic tape.

The time code detection circuit 105
2 includes input terminals 201 and 202 and an output terminal 203, a time code extraction circuit 204, and a holding circuit 205, as shown in FIG. The time code information 113 is input to the time code extraction circuit 204 through the input terminal 201, and is read by the time code extraction circuit 204. The time code information 113 read by the time code extraction circuit 204
Is output to the holding circuit 205. In the holding circuit 205, the time code information 113 is output at intervals of the reference signal 115 input through the input terminal 202.
a and holding time code information 11
3a is output from the output terminal 203.

As shown in FIG. 3, the delay amount calculation circuit 106 has input terminals 301 and 302 and an output terminal 303.
, A storage circuit 304, a subtraction circuit 305, and a delay amount creation circuit 306.
05 from the input terminal 301
, And the reference signal 115 is input through an input terminal 302. Therefore, the storage circuit 304 stores the time code information 113a in accordance with the reference signal 115, and outputs the time code information 113a after delaying the time code information 113a by one cycle of the reference signal 115. , In the subtraction circuit 305, the terminal 301
And the time code information 113a output directly from the storage circuit 304.
3a, that is, the time code information 113a delayed by one cycle of the reference signal 115 is subtracted, and the difference of one cycle of the reference signal 115 is calculated and obtained. Subsequently, the delay amount creation circuit 306 creates the delay amount of the recording start timing based on the calculation result output from the subtraction circuit 305, that is, the difference of one period of the reference signal 115. Is output from the output terminal 303.

Further, the recording command generation circuit 107
, The input terminals 401 and 402 and the output terminal 4
03, a delay amount setting circuit 404, and a control signal delay circuit 405.
Is input to the delay amount setting circuit 404 through the input terminal 401. A control signal for delaying the operation mode signal 111 during recording output from the system control circuit 110 is output from the delay amount setting circuit 404 to the control signal delay circuit 405 based on the delay signal 116. In the control signal delay circuit 405,
Correction is performed after delaying the operation mode signal 111 during recording input from the input terminal 402 by a predetermined amount according to the control signal from the delay amount setting circuit 404. As a result, from the control signal delay circuit 405, a recording command signal 117 created by associating the operation mode signal 111 with the delay signal 116 is output through the output terminal 403.

Further, the recording data generating circuit 108
As shown in FIG. 5, the input terminals 501 to 503 and the output terminal 504, the time code extraction circuit 505, the correction amount creation circuit 506, the addition circuit 507, the data search circuit 508, and the storage data circuit 509 , Switching circuit 5
10 is provided. The time code information 113 output from the time code reproduction circuit 104 is input to the time code extraction circuit 505 through an input terminal 501. The time code extraction circuit 505 reads the time code information 113. Is done.
Further, the delay amount calculation circuit 106 is provided to the correction amount creation circuit 506.
The delay signal 116 output from the input terminal 502 is input via the input terminal 502. The correction amount creation circuit 506 uses the time code information 113
Is generated, and the generated correction amount is output to the adding circuit 507.

On the other hand, the addition circuit 507 performs an addition process on the time code information 113 read by the time code extraction circuit 505 and the correction amount output from the correction amount creation circuit 505 to thereby obtain the time code information 11.
3 is generated based on the delay signal 116 to create time code correction information. Then, the time code correction information created by the addition circuit 507 is output to the data search circuit 508, and the data search circuit 508
Is to search for recording data such as video data corresponding to the input time code correction information from the recording data stored in the storage data circuit 509 and to output the searched recording data to the switching circuit 510. Has become. The switching circuit 510 includes a recording command generation circuit 1
07 is input through the input terminal 503, and the recording instruction signal 117 is High.
When the level becomes the level, the switching circuit 510 outputs the recording data input from the data search circuit 508 to the output terminal 5.
Output from 04.

Next, the operation procedure of the editing and recording apparatus will be described with reference to the operation explanatory diagram of FIG. Here, the editing and recording apparatus according to the present embodiment is configured to be capable of recording and reproducing at 4 × speed (N = 4), and the time code initial value is 00: 00: 00: 00: 00 (see FIG. 6 shows only the frame information). 6, (a) is a reference signal, (b) is time code information, (c) is a signal output from the storage circuit 304 of the delay amount calculation circuit 106, (d) is a delay signal, and (e) ) Indicates recording data, and (f) indicates a recording command signal.

First, in section 1, every time a reference signal is input, the time code detection circuit 105 detects time code information (00) from the time code information output from the time code reproduction circuit 104. That is, the detected time code information (00) is output to the delay amount calculation circuit 106. In the section 2, the delay amount calculation circuit 10 to which the time code information (00) is input
6, the signal corresponding to the time code information (00) delayed by one frame is output, and the time code information (00) in (b) and the signal in (c) are output. The delay signal (04) is output from the delay amount creation circuit 306 based on the original signal. In addition, in the addition circuit 507 of the recording data generation circuit 108, the time code information (04) and the delay signal (04) in the section 2 are added, and the data search circuit 508 outputs time code information ( 08) is retrieved and output.

Subsequently, in the recording command generation circuit 107 in the section 3, a recording command signal for recording the editing point is generated based on the delay signal (04), and the recording command signal is generated four frames before the editing point. When the recording command signal goes high due to the detection of the time code information, the recording data generation circuit 108 sends the recording signal processing circuit 1
For 09, print data is output. And
The recording signal processing circuit 109 to which the recording data has been inputted starts recording in the section 4 where the next reference signal is inputted. Codes can be recorded continuously. In the above description, it has been described that the editing / recording apparatus performs recording / reproduction at 4 × speed. However, the interval of time code information reproduced within a predetermined period in which the reference signal is input is detected, and the output timing of the recording command signal is detected. The present invention can be applied even if the editing and recording device is not a quadruple speed, that is, if the editing and recording device is required to have a higher or lower N-times speed. Of course.

[0022]

As described above, according to the editing and recording apparatus of the present invention, the interval of the time code information reproduced within a predetermined period is detected, and the output timing of the recording command signal is determined based on the result. It is possible to change
Even in the case of performing recording and reproduction at a high speed N times, it is possible to obtain an effect that an editing operation with good editing accuracy can be easily performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an editing and recording device according to the present embodiment.

FIG. 2 is a block diagram illustrating a configuration of a time code detection circuit.

FIG. 3 is a block diagram illustrating a configuration of a delay amount calculation circuit.

FIG. 4 is a block diagram illustrating a configuration of a recording command generation circuit.

FIG. 5 is a block diagram illustrating a configuration of a recording data generation circuit.

FIG. 6 is an operation explanatory diagram for explaining an operation procedure of the editing and recording apparatus.

FIG. 7 is a block diagram showing a configuration of an editing and recording device according to a conventional mode.

[Explanation of symbols]

 103 Reproduction signal processing circuit 104 Time code reproduction circuit 105 Time code detection circuit 106 Delay amount calculation 107 Recording command generation circuit 108 Recording data generation circuit 109 Recording signal processing circuit 110 System control circuit 111 Operation mode signal 112 Reproduction signal 113 Time code information 113a Time code information 115 Reference signal 117 Recording command signal 118 Recording data

Continued on the front page F term (reference) 5D044 BC01 CC03 DE39 GK12 HH05 HL16 5D077 AA08 CA02 DC03 DC35 DD14 DF02 GA02 HC03 5D110 AA04 BB20 CA05 CA06 CA09 CA19 CB01 CC03 CC10 CF10 CF11 CJ13 CK02 CK14

Claims (1)

[Claims] 1. An editing / recording apparatus capable of recording / reproducing at N times speed, comprising: a system control means for outputting an operation mode signal for controlling an operation mode of reproduction and recording; Reproduction signal processing means for reproducing the signal output from the reproducing magnetic head and outputting the reproduced signal; and time for reproducing the time code information in the reproduced signal and outputting the reproduced time code information. A code reproducing means, detecting time code information every time a reference signal is inputted,
Time code detecting means for outputting the detected time code information, and delay calculating means for calculating a delay amount based on a difference between the time code information stored at the reference signal input interval and outputting a delay signal corresponding to the delay amount And correcting the operation mode signal at the time of recording based on the delay signal,
A recording command generating means for outputting a recording command signal corresponding to the corrected operation mode signal, and time code correction information generated by correcting time code information based on the delay signal, and recording corresponding to the time code correction information Recording data generating means for outputting data in response to a recording command signal; and recording signal processing means for performing recording processing of the recording data based on the recording command signal and outputting the recorded recording data to a recording magnetic head. An editing and recording device characterized by: