JP2000236148A - Substrate and display unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable first terminals of an electronic component and second terminals of another electronic component, which are small and mated with each other, to be wired to each other with no crossings of wires in the same layers, by making a first wiring means and a second wiring means crossed at different layers. SOLUTION: In a drive substrate 50, each IC terminal provided in a first layer is drawn out to a region A or a region B of the package with a signaling wire, based on a wiring group H of each layer, and is connected to a through- hole 70 which is used for conduction of the first layer through a fourth layer. At each of the second layer through the fourth layer, the signaling wires are drawn out from more than one through-holes 70 toward the corresponding terminals of a signal output electrode 51, based on the wiring group H of each layer, and the signaling wires in the first layer and those in the other layers are made to cross at different layers. This prevents signaling wires from crossing at the same layers among themselves.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate device and a display device, and is suitably applied to, for example, a plasma addressed liquid crystal display (PALC).

[0002]

2. Description of the Related Art Conventionally, in a plasma addressed liquid crystal display, an image is displayed by driving a large number of pixel display elements corresponding to three primary colors (RGB) arranged in a matrix in a horizontal direction and a vertical direction of a liquid crystal panel. It has been made to be. This plasma-addressed liquid crystal display has three types of ICs (Integrated C
An IC circuit has a driving substrate which is sequentially and repeatedly provided in a horizontal direction and a vertical direction, and each pixel display element of the liquid crystal panel is driven for each color by an IC circuit of the driving substrate.

As shown in FIG. 4, a plasma addressed liquid crystal display 1 has three types of ICs corresponding to three primary colors.
Circuits (not shown) are thermocompression-bonded in a state where the electrodes 21 on the drive board 3 and the electrodes 22 of the flexible cable 8 which are repeatedly provided sequentially in the horizontal and vertical directions are opposed to each other, and the matrix of the liquid crystal panel 2 is formed. The electrode 24 corresponding to the pixel display element (not shown) arranged in a shape and the electrode 23 of the flexible cable 8 are thermocompression-bonded in a state of facing each other.

Here, in the plasma addressed liquid crystal display 1, since the driving substrate 3 is provided at the peripheral edge of the liquid crystal panel 2 serving as an image display surface, the width W of the driving substrate 3 is increased.
Is designed to be as short as possible.

In the driving substrate 3, a plurality of pixel signals are taken out from the respective IC circuits (not shown) corresponding to the three primary colors provided on the driving substrate 3 as outputs to the electrodes 21. It is a signal of the same color for each IC circuit. On the other hand, in the liquid crystal panel 2, pixel display elements corresponding to the three primary color signals are arranged in stripes alternately repeated in the vertical and horizontal directions.

Accordingly, the drive substrate 3 is flexible in a state in which a plurality of pixel signals output from each IC circuit are rearranged corresponding to the three primary color pixel display elements alternately and repeatedly arranged in the horizontal direction of the liquid crystal panel 2. It needs to be transmitted via the cable 8.

As shown in FIG. 5, the drive board 3 has a plurality of terminals R1 _{IC to} R8 _IC , G1 _{IC to} G8 _IC , and B1 _IC provided on both sides of IC circuits 4R, 4G and 4B corresponding to three primary colors.
... B8 The 32 pixel signals (8 in the drawing, each for explanation) respectively output from the _IC are connected to the terminals R8, G8, B8, R7,. Let it be connected. Here, each terminal arrangement of the electrodes 21 corresponds to the arrangement of the pixel display elements arranged on the liquid crystal panel 2.

[0008] In practice, the drive substrate 3 is composed of IC circuits 4R, 4G
And 4B terminals R1 _{IC to} R8 _IC , G1 _{IC to} G8 _IC , B
1 _{IC to} B8 Each terminal of _IC and electrode 21 R8, G8, B8,
R7... Through-hole 14 between signal line (double line) of the first layer connected to G1 and B1 and wiring 13
Are connected to each other.

Further, the drive substrate 3 arranges signal lines from terminals R1 _{IC to} R8 _IC provided on both sides of the IC circuit 4R in the wiring 13 on a second layer (solid line) to form terminals of corresponding electrodes 21. R1 to R8, signal lines from the terminals G1 _{IC to} G8 _IC provided on both sides of the IC circuit 4G are arranged in the third layer (broken line) and connected to the terminals G1 to G8 of the corresponding electrode 21. ,
Signal lines from the terminals B1 _{IC to} B8 _IC provided on both sides of the IC circuit 4B are arranged on the fourth layer (dashed line) and connected to the terminals B1 to B8 of the corresponding electrodes 21.

As a result, the driving substrate 3 is provided with the IC circuit 4R,
32 pixel signals output from 4G and 4B can be sent to the electrodes 24 corresponding to the three primary color pixel display elements alternately repeated in the horizontal direction of the liquid crystal panel 2 (FIG. 4). The width W of the driving substrate 3 can be set short by dividing the lines into layers for each color so as not to overlap.

However, if the liquid crystal panel 2 and the driving substrate 3 are connected to each other by thermocompression bonding via the flexible cable 8 when the driving substrate 3 fails, the plasma addressed liquid crystal display 1 (FIG. 4) Since the substrate 3 is thermocompression-bonded to the flexible cable 8, the entire liquid crystal panel 2 including the non-failed liquid crystal panel 2 has to be replaced, which is inconvenient and leads to an increase in cost.

In order to solve such a problem, as shown in FIG. 6, in which parts corresponding to those in FIG. The connector 34 provided above and the connector 37 provided on the drive board 35 are fitted to each other to be detachably attached.

In this case, when the drive board 35 breaks down, the plasma addressed liquid crystal display 30 connects the drive board 35 to the flexible cable 31 with the connector 3.
Only the drive board 35 can be removed via the 4 and 37 and replaced, so that the usability can be further improved.

[0014]

In the plasma addressed liquid crystal display 30 having such a structure, the signal output electrodes 36 having a pitch interval corresponding to the connector 37 of the drive board 35 and the flexible board are required to be mounted via the connectors 34 and 37. It is necessary to newly form the board-side signal electrodes 33 at a pitch interval corresponding to the connector 34 of the cable 31.

For this reason, in the drive board 35, as shown in FIG. 7, the signal output electrodes 36 having the pitch intervals corresponding to the connectors 37 are provided in two rows of A row and B row. In this case, the drive substrate 35 is provided with the signal output electrodes 36 in two rows even if the layers for arranging the signal lines are divided for each of the IC circuits 4R, 4G and 4B as shown in FIG. Terminals R1 to R8 and G1 for each color
Since G8 and B1 to B8 are alternately arranged in column A and column B, the signal lines (solid lines) of the second layer, the signal lines (dashed lines) of the third layer, and There is a problem that signal lines (dashed lines) of the fourth layer intersect each other.

As a method for avoiding such a problem, as shown in FIG.
A plurality of through-type through holes (or non-through type) so that the signal lines connected to the terminals R1, R3, R5 and R7 of the column do not cross the signal lines connected to the terminals R2, R4, R6 and R8 of the column B. It is conceivable that the connection is made via the signal line (dashed line) of the n-th layer via the through-hole 38.

However, as shown in FIGS. 9A to 9C, when it is not necessary to provide the through-type through hole 38, the width of the signal line itself is 0.1 [mm] and the pitch interval between the signal lines is reduced. When the through hole 38 is provided, the through hole 3 can be set to 0.15 [mm].
8, the diameter between the through-holes 38 and the signal lines must be set to 0.15 [mm], and the pitch between the through-holes 38 must be set to 0.4 [mm].

Therefore, when the through-type through-holes 38 are provided in the drive board 35 (FIG. 8), four through-type through-holes 38 are arranged in series in the width W direction. It is necessary to further increase the pitch interval between the signal lines connected to the signal output electrodes 36, and to newly form an n-th layer in which signal lines (broken lines) connecting the through-type through holes 38 are provided. . Therefore, the drive substrate 35 has a problem that the width W of the drive substrate 13 is increased and the number of layers is increased, even if the crossing of signal lines can be avoided by providing the through-type through holes 38.

The present invention has been made in view of the above points, and is efficient without crossing a plurality of first terminals of a small and corresponding electronic component with a plurality of second terminals to be connected. It is an object of the present invention to propose a wiring board device and a display device using the wiring board device.

[0020]

According to the present invention, a plurality of first terminals of an electronic component provided on a first layer, which is a surface of a multilayer substrate, are connected to a plurality of terminals to be connected on the surface. A first wiring means provided on the first layer, each of the plurality of first terminals of the electronic component being drawn to a predetermined region of the first layer, and a first wiring means provided in the first layer. An interlayer wiring means for leading a plurality of first terminals of the electronic component drawn to a predetermined region of the first layer to a second layer different from the first layer; Second wiring means for drawing the plurality of first terminals to positions corresponding to the plurality of second terminals to be connected in the second layer, respectively, wherein the first wiring means and the second wiring means are separated from each other by a different interlayer. By crossing at So as to avoid cross between the first wiring means and between the second wiring means in the layer.

Thus, the substrate device can avoid the intersection between the first wiring means and the second wiring means in the same layer and connect the plurality of first terminals of the electronic component to the plurality of second terminals to be connected. Can be connected efficiently.

Further, according to the present invention, a drive circuit of a substrate device connected to display means having pixel electrode terminals corresponding to a plurality of pixels arranged in a matrix in the horizontal direction and the vertical direction via predetermined connection means. In a display device in which a predetermined image is displayed on a display means by sequentially driving pixels along a horizontal direction and a vertical direction via a pixel electrode terminal, a substrate device is provided on a first layer which is a surface of a multilayer substrate. And a plurality of first terminals of the drive circuit are respectively connected to the first terminals.
First wiring means for leading to a predetermined area of the layer, and a plurality of first terminals of the drive circuit drawn to the predetermined area of the first layer by the first wiring means for leading to a second layer different from the first layer A plurality of first terminals of the drive circuit drawn out to the second layer by the interlayer wiring means and a plurality of second terminals corresponding to the pixel electrode terminals, which are connection targets provided on the surface in the second layer, A second wiring means for drawing out to a position corresponding to each terminal; and intersecting the first wiring means and the second wiring means between different layers to form the first wiring means and the second wiring means on the same layer. To avoid the intersection between the wiring means.

Thus, the substrate device avoids the intersection between the first wiring means and the second wiring means in the same layer and connects the plurality of first terminals of the electronic component to the plurality of second terminals to be connected. Can be connected efficiently, so that the display device can be thinned without increasing the width of the substrate.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

As shown in FIG. 1 in which parts corresponding to those in FIG. 6 are assigned the same reference numerals, reference numeral 40 denotes a plasma addressed liquid crystal display as a display device of the present invention as a whole, and a liquid crystal panel 41 as a display means. The electrodes 24 corresponding to the pixel display elements (not shown) arranged in a matrix and the electrodes 23 of the flexible cable 31 as connecting means are thermocompression-bonded in a state where they are opposed to each other, and on a driving substrate 50 as a substrate device. The connector 37 provided corresponding to the multi-row, multi-pole signal output electrode 51 and the connector 34 provided corresponding to the multi-row, multi-pole board-side signal electrode 33 on the flexible cable 31 are mutually connected. The liquid crystal panel 41 and the drive substrate 50 are electrically connected by fitting.

Here, the plasma addressed liquid crystal display 40 is configured such that the driving board 50 is fixed in a direction perpendicular to the image display surface of the liquid crystal panel 41 in a state where the flexible cable 31 is bent. By setting the width W to be short, the liquid crystal panel 41
Is made thinner by reducing the depth from the image display surface.

Here, the liquid crystal panel 41 is provided with a number of pixel display elements (not shown) corresponding to the three primary colors (RGB) arranged in a matrix in the horizontal and vertical directions.
The number of pixel display elements arranged in the horizontal direction is, for example, 854 × 3 (= R, G, B).

As shown in FIG. 2, in which parts corresponding to those in FIG. 7 are assigned the same reference numerals, a drive substrate 50 serves as a drive circuit for driving a large number of pixel display elements corresponding to three primary colors (RGB). IC (Integrated Circuit) circuits 4R, 4G, and 4B are sequentially and repeatedly provided in the horizontal direction.
The drive substrate 50 is provided with 28 IC circuits 4R, 4G, and 4B for each color, so that 85
It can correspond to four pieces of pixel data. By the way, 28 IC circuits 4R, 4
The surplus of the pixel data of G and 4B is an unused portion.

The drive board 50 is provided with a plurality of signal output electrodes 51 as a second terminal connected to the connector 37 (FIG. 1), which are divided into two rows A and B.
Terminals R1 _{IC to} R8 _IC , G1 _{IC to} G8 _IC, and B1 _{IC to} B8 as first terminals in the C circuits 4R, 4G, and 4B.
The pixel signals for each color output from the _IC are applied to the respective terminals R1 to R of the corresponding signal output electrode 51 via different layers.
8, G1 to G8 and B1 to B8.

Here, in the drive board 50, the IC circuit 4
When pixel signals for each color output from each terminal of R, 4G and 4B are input to each terminal of the corresponding signal output electrode 51 via a different layer, signal lines in the same layer do not cross each other. The principle of the made wiring pattern will be described.

For example, as shown in the wiring pattern of FIG. 3A, the drive substrate 50 includes terminals R1, R3, R5, and R7 arranged in row A of the signal output electrode 51 and the IC circuit 4R.
Is connected to the wiring group H composed of the signal lines (solid lines) of the second layer from the region A under the package of the IC circuit 4R to correspond to the terminals R1, R3, R5 and R7 in column A, respectively.
_4RA is pulled out and terminals A1, R3, R5, and R7 in row A
And the corresponding terminals of the IC circuit 4R.

The drive substrate 50 is provided with a signal output electrode 51
Terminals R2, R4, R6 and R8 arranged in row B
And the IC circuit 4R, a signal line (solid line) of the second layer from the region B under the package of the IC circuit 4R so as to correspond to the terminals R2, R4, R6 and R8 in the B column, respectively.
_And pull out the wiring group _H4RB consisting of
4, R6 and R8 are connected to corresponding terminals of the IC circuit 4R.

As shown in the wiring pattern of FIG.
The drive substrate 50 is disposed in the column A of the signal output electrode 51.
Terminals G2, G4, G6 and G8 and the IC circuit 4G
Is connected, the area A under the package of the IC circuit 4G
To terminals G2, G4, G6, and G8 in row A, respectively.
In response, a wiring group H composed of a third-layer signal line (broken line)
_4GAAnd terminals A2, G4, G6, and G8 in row A
And corresponding terminals of the IC circuit 4G.
Have been.

The drive substrate 50 is provided with a signal output electrode 51
Terminals G1, G3, G5 and G7 arranged in row B
And the IC circuit 4G, a wiring group H _4GB1 composed of signal lines (broken lines) of the third layer is drawn from the B1 region under the package of the IC circuit 4G so as to correspond to the terminals G1 and G3 in the B column. The terminals G1 and G3 in row B are connected to the corresponding terminals of the IC circuit 4G, and the third layer of the third layer is arranged to correspond to the terminals G5 and G7 in row B from the region B2 under the package of the IC circuit 4G. Signal line (dashed line)
The wiring group H _4GB2 consisting of
7 and corresponding terminals of the IC circuit 4G.

Further, as shown in the wiring pattern of FIG. 3C, the drive substrate 50 is provided with terminals B1, B3, B5 and B7 arranged in the column A of the signal output electrode 51 and the IC circuit 4B.
_{Is connected} , a wiring group H _4BA composed of signal lines (dashed-dotted lines) of the fourth layer from the region A under the package of the IC circuit 4B to correspond to the terminals B1, B3, B5, and B7 in column A, respectively. The terminals B1, B3, B5, and B7 in the row A are connected to the corresponding terminals of the IC circuit 4B.

The drive substrate 50 is provided with a signal output electrode 51.
B2, B4, B6 and B8 arranged in row B
And the IC circuit 4B, a wiring composed of signal lines (dashed lines) of the fourth layer from the region B under the package of the IC circuit 4B to correspond to the terminals B2, B4, B6 and B8 in the B column, respectively. _Pull out the group _H4BB and pull out the terminal B2 in row B,
B4, B6 and B8 are connected to corresponding terminals of the IC circuit 4B.

Actually, the drive substrate 50 (FIG. 2) is provided with terminals R1, B1,... B arranged in row A of the signal output electrode 51.
, Through holes 60 _R1 , 60 _B1 ,..., 60 _B7 and 60 _G8 connected to the first and second signal lines (double lines) to _G8.
Are arranged in a horizontal line, and the through-type through-holes are connected to the terminals G1, R2,..., R8 and B8 arranged in the B row of the signal output electrode 51 by the first-layer signal line (double line). Hall 6
0 _G1 , 60 _R2 ,..., 60 _R8 and 60 _B8 are arranged in a row.

The drive substrate 50 divides the region under the package of the IC circuit 4R into an A region and a B region as in FIG. 3A, and uses the terminal R1 _IC of the IC circuit 4R as the first wiring means. , A through-type through-hole 70 _ICR1 connected by a first-layer signal line (double line), a through-type through-hole 70 _ICR3 connected to the terminal R3 _IC by a first-layer signal line (double line),
Through-type through-hole 70 connected to terminal R5 _IC and first-layer signal line (double line) _ICR5 and through-type through hole 70 connected to terminal R7 _IC and first-layer signal line (double line)
_{The ICR7} is arranged in the A region according to the arrangement of the wiring group _H4RA according to the arrangement order of the terminals R1, R3, R5 and R7 in the A column.

The drive board 50 is connected to the A of the IC circuit 4R.
Through-holes 70 _ICR1 , 70 _ICR3 , 70 _ICR5, and 70 _ICR7 as interlayer wiring means provided in the region, and terminals R1, R3, R5, and R7 in row A of the signal output electrode 51.
The through-type through holes 60 _R1 , 60 _R3 , 60 _R5, and 60 _R7 as interlayer wiring means respectively connected to each other are connected to each other by a second-layer signal line (solid line) as second wiring means.

On the other hand, the drive substrate 50 includes a through-type through-hole 70 _ICR2 connected to the terminal R2 _IC of the IC circuit 4R by the first-layer signal line (double line), and the terminal R4 _IC to the first-layer signal line. (Double wire) through-type through-hole 70 _ICR4 ,
Through-type through-hole 70 connected to terminal R6 _IC and first-layer signal line (double line) _ICR6 and through-type through-hole 70 connected to terminal R8 _IC and first-layer signal line (double line)
_{The ICR8} is arranged in the B region according to the arrangement of the wiring group _H4RB according to the arrangement order of the terminals R2, R4, R6 and R8 in the B column.

The drive board 50 is connected to the B of the IC circuit 4R.
Through-hole 70 _ICR2 , 70 provided in the area
_ICR4 , 70 _ICR6 and 70 _ICR8 and B of signal output electrode 51
Through-holes 60 _R2 , 60 _R4 , 60 _R6 and 60 connected to the terminals R 2, R 4, R 6 and R 8 of the columns, respectively.
_R8 are connected to each other by a signal line (solid line) of the second layer.

Here, the drive substrate 50 is a first-layer signal line (double line) connected to the through-type through-holes 70 _ICR1 to 70 _{ICR8 provided} in the region A and the region B under the package of the IC circuit 4R. Since they are provided without intersecting with each other, pixel signals from the terminals R1 _{IC to} R8 _IC as first terminals provided on both sides of the IC circuit 4R are transmitted via signal lines (solid lines) of the second layer. Thus, the signal can be reliably sent to the terminals R1 to R8 as the second terminals of the corresponding signal output electrode 51.

The drive substrate 50 divides the area under the package of the IC circuit 4B into an A area and a B area, and is connected to the terminal B1 _IC of the IC circuit 4B by a first-layer signal line (double line). Through-hole 70 _ICB1 , terminal B3 through-hole 7 connected to the _{IC via} the first layer signal line (double line)
0 Through-hole 70 connected to _ICB3 , terminal B5 _IC and first layer signal line (double line) Through-type hole connected to _ICB5 and terminal B7 _IC and first layer signal line (double line) The through-hole 70 _ICB7 is placed in the A region according to the arrangement of the wiring group _H4BA.
The terminals are arranged according to the arrangement order of the terminals B1, B3, B5 and B7 in the column.

The drive board 50 is connected to the A of the IC circuit 4B.
Through-holes 70 _ICB1 , 70 _ICB3 , 70 _ICB5 and 70 _ICB7 as interlayer wiring means provided in the region, and terminals B1, B3, B5 and B7 in row A of the signal output electrode 51.
The through-type through-holes 60 _B1 , 60 _B3 , 60 _B5, and 60 _B7 as interlayer wiring means connected to each other are connected to each other by signal lines (dashed lines) of the fourth layer as second wiring means.

On the other hand, the drive substrate 50 includes a through-type through-hole 70 _ICB2 connected to the terminal B2 _IC of the IC circuit 4B by the first-layer signal line (double line), and the terminal B4 _IC to the first-layer signal line. (Double wire) through-type through-hole 70 _ICB4 ,
Through-type through hole 70 connected to terminal B6 _IC and first layer signal line (double line) _ICB6 and through type through hole 70 connected to terminal B8 _IC and first layer signal line (double line)
The _ICB8, to dispose in accordance with the order of the wiring group H terminal of the B column B region corresponding to the arrangement of _4BB B2, B4, B6 and B8.

The drive board 50 is connected to the B of the IC circuit 4B.
Through hole 70 _ICB2 , 70 provided in the area
_ICB4 , 70 _ICB6 and 70 _ICB8 and B of signal output electrode 51
The through-type through-holes 60 _B2 , 60 _B4 , 60 _B6 and 60 _B8 connected to the terminals B2, B4, B6 and B8 of the columns are connected to each other by signal lines (dashed lines) of the fourth layer.

[0047] Here, the drive substrate 50, the first layer of the signal line to be connected to the through-type through hole 70 _ICB1 ~70 _ICB8 which is arranged in the A region and the B region of the package under the IC circuit 4B (doublet) Are provided without crossing each other, the terminals B provided on both sides of the IC circuit 4B are provided.
1 the terminals B1~ of the pixel signal from the _{IC-B8 IC} through the fourth layer of the signal line (dashed line) the corresponding signal output electrode 51
The data can be reliably transmitted to B8.

The drive board 50 divides the area under the package of the IC circuit 4G into the area A, the area B1, and the area B2, and uses the terminal G2 _IC of the IC circuit 4G and the signal line (double line) of the first layer. Connected through-type through hole 70 _ICG2 , terminal G
4 _IC a first layer of the signal line (double line) in the connected feedthrough through hole 70 _ICG4, terminal G6 _IC and transmembrane through hole 70 which is connected by a signal line of the first layer (doublet) _ICG6 And a through-hole 70 _ICG8 connected to the terminal G8 _IC and the signal line (double line) of the first layer, and the terminals G2, G4, G6 and A in row A in the area A according to the arrangement of the wiring group _H4GA. They are arranged according to the arrangement order of G8.

Then, the drive board 50 is connected to the A of the IC circuit 4G.
Through-holes 70 _ICG2 , 70 _ICG4 , 70 _ICG6 and 70 _ICG8 as interlayer wiring means disposed in the region, and terminals G2, G4, G6 and G8 of column A of the signal output electrode 51.
The through-type through-holes 60 _G2 , 60 _G4 , 60 _G6, and 60 _G8 as interlayer wiring means connected to each other are connected to each other by third-layer signal lines (broken lines) as second wiring means.

On the other hand, the drive substrate 50 includes a through-type through-hole 70 _ICG1 connected to the terminal G1 _IC of the IC circuit 4B by the first-layer signal line (double line), and the terminal G3 _IC to the first-layer signal line. Through-hole 70 connected by (double wire)
_ICG3 is _connected to B1 corresponding to the arrangement of wiring groups _{H4GB1 that} are sequentially drawn from terminals G1 and G3 in column B of signal output electrode 51.
In the region, as well as arranged in accordance with the order of B rows of terminals G1 and G3, the terminal G5 _IC and transmembrane through hole 70 _ICG5 connected by a signal line of the first layer (doublet), and the terminal G7 _IC The through-type through-holes 70 _ICG7 connected by the first-layer signal lines (double lines) are arranged in the B2 area corresponding to the arrangement of the wiring group _{H4GB2 in} the order of the terminals G5 and G7 in the B column. .

The drive board 50 is connected to the B of the IC circuit 4G.
Through-type through-holes 70 arranged in one area 70 _ICG1 , 70
And _ICG3, while connected in signal output feedthrough through hole 60 _G1 that is connected to the terminals G1 and G3 of row B electrodes 51, 60 _G3 and the third layer of the signal line to each other (broken line), the IC circuit 4G B2 Through-hole 70 provided in the area
_ICG5 , 70 _ICG7 and the terminal G5 in row B of the signal output electrode 51
And through-holes 60 _G5 and 6 connected to G7
0 _G7 are connected to each other by a third-layer signal line (broken line).

[0052] Here, the driving substrate 50, A region of the package under the IC circuit 4G, the first layer of the signal line to be connected to the through-type through hole 70 _ICG1 ~70 _ICG8 which is disposed in the B1 region and the B2 region (two (Multiple lines) are provided without crossing each other, so that pixel signals from the terminals G1 _{IC to} G8 _IC provided on both sides of the IC circuit 4G are supported via signal lines (dashed lines) of the third layer. The signal can be reliably transmitted to the terminals G1 to G8 of the signal output electrode 51.

In the above configuration, the drive substrate 50 is the first
Each terminal of the IC circuit 4 provided in the layer is connected to a wiring group H for each layer.
In the area A or the area B under the package, the first layer is connected to the through-type through-holes 70 for leading the first to fourth layers through the signal lines (double lines) of the first layer. In each of the second to fourth layers different from the layers, each layer is based on the wiring group H of each layer so as to correspond to each terminal of the signal output electrode 51 to be connected from the plurality of through-type through holes 70. Pull out the signal line to
By intersecting the signal lines of the first layer and the signal lines of the respective layers between different layers, the intersection of the signal lines of the first layer in the same layer and the signal lines of the respective layers are avoided.

As a result, the drive substrate 50 is provided with a plurality of through-type through holes 6 connected to each terminal of the signal output electrode 51.
0 and the through-type through-hole 70 corresponding to the through-type through-hole 60 are connected to the second-layer signal line (solid line), the third-layer signal line (dashed line), and the fourth-layer signal line (dashed-dotted line). It can be connected efficiently without crossing each layer.

Therefore, the width W of the drive substrate 50 is increased without increasing the pitch interval between the signal lines and without providing a new through-type through hole for avoiding the intersection between the signal lines. Can be prevented.

Thus, in the plasma addressed liquid crystal display 40, the width W of the driving substrate 50 connected to the liquid crystal panel 41 by the connector method can be set as short as possible, and thus the whole can be further reduced in thickness.

According to the above configuration, the drive board 50 connects the plurality of signal output electrodes 51 provided in two rows of row A and row B to each terminal of the IC circuits 4R, 4G and 4B. In addition, it is possible to efficiently prevent the signal lines of the layers corresponding to the respective colors from intersecting with each other and to prevent the width W from becoming long. Further, since the plasma addressed liquid crystal display 40 can be configured by attaching the drive substrate 50 having a short width W by a connector method, the overall thickness can be further reduced.

In the above embodiment, the substrate device of the present invention is applied to the drive substrate 50 having the IC circuits 4R, 4G, and 4B, and the signal lines from the IC circuits 4R, 4G, and 4B are provided. Although it has been described that the signal lines are arranged so as not to cross each other in each layer, the present invention is not limited to this, and the IC circuit 4R may be arranged if the signal lines in the same layer are arranged so as not to cross each other. Alternatively, the substrate device of the present invention may be applied to a drive substrate having only one of 4G and 4B.

In the above-described embodiment, the pixel signal is transmitted from the IC circuit 4R of the drive substrate 50 using the second-layer signal line (solid line), and the third-layer signal line (dashed line) is transmitted from the IC circuit 4G. ) Is used to transmit the pixel signal, and the IC circuit 4B transmits the pixel signal using the fourth-layer signal line (dashed-dotted line). However, the present invention is not limited to this. If the pixel signals from the IC circuits 4R, 4G, and 4B are transmitted through different layers, the combination of layers to be used may be set arbitrarily.

Further, in the above-described embodiment, the case where the through-type through holes 60 and 70 are used as the interlayer wiring means has been described. However, the present invention is not limited to this, and the first layer and the other second A non-through-type through hole or other various interlayer wiring means may be used as long as it can conduct to the fourth layer.

Further, in the above-described embodiment, the case where the driving substrate 50 as the substrate device of the present invention is used for the plasma addressed liquid crystal display 40 has been described. However, the present invention is not limited to this, and the color TFT ( Thin
The drive substrate 50 may be used for various other display devices such as a liquid crystal display (Film Transistor).

[0062]

As described above, according to the present invention, the first wiring means and the second wiring means in the same layer are prevented from intersecting with each other and are connected to the plurality of first terminals of the electronic component. The plurality of second terminals can be efficiently connected, and thus the plurality of first and second electronic components corresponding to each other are small.
It is possible to realize a board device capable of efficiently wiring a terminal and a plurality of second terminals to be connected without intersecting.

According to the present invention, the first layer in the same layer
A plurality of first terminals of the electronic component can be efficiently connected to a plurality of second terminals to be connected by avoiding intersections between the wiring means and the second wiring means, and thus a display having a reduced thickness can be obtained. The device can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing an overall configuration of a plasma addressed liquid crystal display using a connector system according to the present invention.

FIG. 2 is a schematic diagram illustrating a terminal arrangement on a drive board according to the present invention.

FIG. 3 is a schematic diagram used to explain the principle of a wiring pattern according to the present invention.

FIG. 4 is a schematic diagram for explaining a method of connecting a liquid crystal panel and a driving substrate by a conventional thermocompression bonding method.

FIG. 5 is a schematic diagram for explaining a method of connecting an IC circuit and an electrode of a drive board by a conventional thermocompression bonding method.

FIG. 6 is a schematic diagram for explaining a method of connecting a liquid crystal panel and a driving board by a conventional connector method.

FIG. 7 is a schematic diagram showing a terminal arrangement of a drive board according to a conventional connector system.

FIG. 8 is a schematic diagram illustrating an arrangement of signal lines when a conventional through-type through hole is provided.

FIG. 9 is a schematic diagram showing design criteria for signal lines and through-type through holes.

[Explanation of symbols]

1, 30, 40 ... Plasma-addressed liquid crystal display, 2, 41 ... Liquid crystal panel, 3, 35, 50 ... Driving board, 4R, 4G, 4B ... IC circuit, 8, 31 ... Flexible cable, 21 ... ... electrodes, 36, 51 ... signal output electrodes, 14, 60, 70 ... through-holes.

Claims (4)

[Claims] 1. A substrate device for connecting a plurality of first terminals of an electronic component provided on a first layer, which is a surface of a multilayer substrate, to a plurality of second terminals to be connected on the surface. A first wiring means provided on a layer, for drawing out a plurality of first terminals of the electronic component to a predetermined area of the first layer; and a first wiring means being drawn to a predetermined area of the first layer by the first wiring means. An interlayer wiring means for drawing a plurality of first terminals of the electronic component to a second layer different from the first layer; and a plurality of first terminals of the electronic component drawn to the second layer by the interlayer wiring means. A second wiring means for drawing out to a position corresponding to each of the plurality of second terminals to be connected in the second layer, wherein the first wiring means and the second wiring means are provided between different layers. By crossing, Board device is characterized in that so as to avoid cross between the first wiring means and between said second wiring means in the layer. 2. The substrate device according to claim 1, wherein said interlayer wiring means comprises a through hole. 3. A driving circuit of a substrate device connected to display means having pixel electrode terminals corresponding to a plurality of pixels arranged in a matrix in a horizontal direction and a vertical direction through a predetermined connection means. In a display device for displaying a predetermined image on the display means by sequentially driving the pixels along the horizontal direction and the vertical direction via a terminal, the substrate device includes a first layer which is a surface of a multilayer substrate. A first wiring means provided for respectively leading a plurality of first terminals of the drive circuit to a predetermined area of the first layer; and the driving means drawn to a predetermined area of the first layer by the first wiring means. Inter-layer wiring means for drawing a plurality of first terminals of a circuit to a second layer different from the first layer; and a plurality of first terminals of the drive circuit drawn to the second layer by the inter-layer wiring means And second wiring means for connecting to a plurality of second terminals corresponding to the plurality of second terminals corresponding to the pixel electrode terminals provided on the surface in the second layer. By intersecting the first wiring means and the second wiring means provided according to the positions of the plurality of second terminals to be connected, the first wiring means and the first wiring means in the same layer and A display device characterized in that intersections between second wiring means are avoided. 4. The display device according to claim 3, wherein said interlayer wiring means comprises a through hole.