JP2000223441A - Electronic apparatus and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic apparatus possessed of a laminated film structure composed of W film/WNx barrier film/organic interlayer insulating film and a manufacturing method thereof, where the WNx barrier film is enhanced in its adhesion to the interlayer insulating film, and the W film is acceleratedly grown on the WNx barrier film. SOLUTION: A conductive film 2 which forms a lower wiring, an interlayer insulating film 3 of, for instance, polyaryl ether, and an oxide film 4 of silicon dioxide or the like are formed on a semiconductor substrate 1, a processed base 6 is provided successively with a via hole 5 which is bored in the oxide film 4 and the interlayer insulating film 3 confronting the conductive film 2, a via contact plug 11 composed of an adherent W film 7, a WNx barrier film 8, a W-nucleus formation promoting film 9, and a W-film filled into the via hole 5 is provided inside the via hole 5, and a conductive film 12 is formed on the via contact plug 11 to serve as an upper wiring.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device such as a highly integrated semiconductor device and a method of manufacturing the same, and more particularly, to an electronic device using a W film as a constituent material for a contact plug, a via contact plug or a gate electrode. It relates to the manufacturing method.

[0002]

2. Description of the Related Art ULSI (Ultra Large Scale Integrate)
d Circuits) With the increase in the degree of integration of highly integrated semiconductor devices such as devices, the dimensional rules of device wiring have become finer, and signal delay has become a major problem that hinders high-speed device operation due to an increase in capacitance between wirings. In order to solve this problem, while reducing the resistance of the gate region,
It is necessary to lower the relative dielectric constant of the interlayer insulating film. For this reason, the gate material is changed from conventional WSi ₂ to W, which has a lower resistance, and a material having a lower dielectric constant than the conventional silicon oxide film-based material (relative dielectric constant 4.2) for the interlayer insulating film. Is being considered for application.

An example of a highly integrated semiconductor device will be described with reference to FIG. 7, which is a schematic sectional view showing a gate electrode portion of a highly integrated semiconductor device. As shown in FIG. 7, the highly integrated semiconductor device includes a gate electrode 13. The gate electrode 13 is formed on the semiconductor substrate 1, and is formed on the semiconductor substrate 1. A WNx film barrier 8 is provided on the substrate 6 to be processed composed of the crystalline silicon film 15, and a W film 10 is provided on the WNx barrier film 8. Thus, the gate electrode 13
In the case where the W film 10 is adopted, the WNx (tungsten nitride) barrier film 8 is previously formed with the polycrystalline silicon film 15 in order to suppress the reaction between the W film 10 and the substrate 6 to be processed including the underlying polycrystalline silicon film 15. A W film 10 formed thereon and a W film 10 formed thereon has a gate of a laminated film structure of a W film 10 / WNx barrier film 8 / polycrystalline silicon film 15. At present, the W film 10 and the WNx barrier film 8 are often formed by a sputtering method, but are formed by CVD (Chemical Vapor Deposition).
Since the W film 10 formed by the CVD method has a lower resistivity than the sputtered film,
Formation of a laminated film structure of a WNx barrier film is being studied.

On the other hand, low dielectric constant films that are desired to be introduced as interlayer insulating films are roughly classified into organic films and inorganic films, and are required for devices having a wiring interval of 0.18 to 0.13 μm or more. Many organic materials are used to realize a dielectric constant of 3 or less.

Another example of a highly integrated semiconductor device will be described with reference to FIG. 8 which is a schematic sectional view showing a via contact plug forming portion of the highly integrated semiconductor device. As shown in FIG. 8, the high-integration semiconductor device includes a semiconductor substrate 1 on which a conductive film 2 forming a lower wiring and an interlayer such as a polyarylether film of an organic low dielectric constant film formed on the conductive film 2. In a via hole 5 of a substrate 6 to be processed, which has an insulating film 3 and an oxide film 4 such as a silicon dioxide film, and has a via hole (connection hole) 5 opened in the oxide film 4 and the interlayer insulating film 3 facing the conductive film 2. , WNx barrier film 8, and WNx barrier film 8
A via contact plug 11 having a W film 10 embedded in the via hole 5 is provided thereon. In this case, a Cu film may be used instead of the W film.

[0006] The rate of diffusion of water in the interlayer insulating film 3 using an organic low dielectric constant film as described above is very high, and the oxide film 4 formed on the interlayer insulating film 3 contains the water in the atmosphere. A large amount of water is easily taken in. Therefore, as described above, W
When the film 10 is buried, a WNx barrier film 8 is formed by a plasma CVD method as a barrier metal for preventing water from being released from the oxide film 4 on the interlayer insulating film 3, and then the W film 10 is formed by the CVD method. A method for forming via holes 5 to fill via holes 5 is also being studied.

[0007]

SUMMARY OF THE INVENTION However, WNx
When the W film 10 is uniformly formed on the barrier film 8 by the CVD method, the SiH ₄ gas used when forming the nucleus of the W film 10 is WNx.
There is a problem that it is difficult to adsorb and dissociate on the barrier film 8 and Si, which is a reducing species of the WF ₆ gas, does not precipitate on the WNx barrier film 8, so that it is difficult to grow a growth nucleus of the W film 10. Therefore, a method of promoting the dissociation of the gas by flowing SiH ₄ gas under high pressure has been studied. However, there is a possibility that particles may increase, and this W
The Nx barrier film 8 has poor adhesion to the interlayer insulating film 3 and has a problem that the film easily peels off. Therefore, the present invention
In view of such a problem, in an electronic device having a laminated film structure of a W film / WNx barrier film / organic interlayer insulating film and a method of manufacturing the same, the adhesion between the WNx barrier film and the interlayer insulating film is improved and the WNx barrier The challenge is to promote the growth of the W film on the film.

[0008]

According to the method of manufacturing an electronic device of the present invention, a step of forming a WNx barrier film on a substrate to be processed, a step of forming a W nucleation promoting film on the WNx barrier film, A step of forming a W film on the nucleation promoting film. Here, in the WNx barrier film, x
Is preferably more than 0 and 1 or less.

It is desirable to form a W adhesion film before the step of forming a WNx barrier film on a substrate to be processed. The substrate to be processed preferably has a connection hole opened in an interlayer insulating film on the conductive film, or contains a polycrystalline silicon film. The interlayer insulating film is preferably an organic low dielectric constant film.

The step of forming the WNx film is performed by a plasma CV
It is preferable to use the D method, and it is preferable to use a sputtering method or a plasma CVD method in the step of forming the W nucleation promoting film and the step of forming the W adhesion film. It is desirable to use a CVD method for the step of forming the W film.

The step of forming a WNx barrier film, the step of forming a W nucleation promoting film, and the step of forming a W film are preferably performed continuously without exposing the substrate to be processed to the atmosphere.

In the electronic device of the present invention, W
An Nx barrier film, a W nucleation promoting film on the WNx barrier film, and a W film on the W nucleation promoting film.

Before the substrate to be processed and the WNx barrier film, W
It is desirable to have an adhesion film. The substrate to be processed preferably has a connection hole opened in an interlayer insulating film on the conductive film or includes a polycrystalline silicon film. The interlayer insulating film is preferably an organic low dielectric constant film.

An electronic device to which the present invention is directed is a contact plug or a via contact plug using a gate electrode using a low resistance W film or a W film embedded in a connection hole of an organic low dielectric constant interlayer insulating film. , High-integration semiconductor devices, thin-film magnetic head devices, thin-film inductors,
Examples include a thin-film coil and a micromachine.

According to the method of manufacturing an electronic device of the present invention, W embedded in a connection hole formed in an organic interlayer insulating film.
In the formation of a contact plug or a via contact plug having a laminated film structure of a film / WNx barrier film, a W adhesion film is formed on an interlayer insulating film to improve the adhesion between the WNx barrier film and the interlayer insulating film, By forming the W nucleation promoting film on the WNx barrier film, nucleation of the W film becomes possible, and the growth of the W film by the CVD method on the WNx barrier film can be easily promoted. W film / W
In forming a gate electrode having a laminated film structure of an Nx barrier film / polycrystalline silicon film, by forming a W nucleation promoting film on the WNx barrier film, nucleation of the W film becomes possible and CVD on the WNx barrier film becomes possible. The growth of the W film by the method can be easily promoted.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A highly integrated semiconductor device will be described below as an example of an electronic device, and a via contact plug formed by being embedded in a connection hole formed on a semiconductor substrate and a gate formed on the semiconductor substrate. An electrode and a method for manufacturing the electrode will be described as examples. In addition, as an electronic device,
Not only high-integration semiconductor devices, but also various electronic devices such as thin-film magnetic heads, magneto-resistive heads, thin-film inductors, thin-film coils, and micromachines, especially contact plugs and via contact plugs or gates using low-resistance W films The present invention can be applied to a device having an electrode.

First Embodiment FIG. 1 is a schematic cross-sectional view showing a via contact plug formation portion of a highly integrated semiconductor device as an example of an electronic device of the present invention, and FIGS. FIG. 9 is a schematic cross-sectional view showing a method for manufacturing a high-integration semiconductor device, and showing a process applied to formation of a via contact plug in a high-integration semiconductor device.

A schematic configuration of a highly integrated semiconductor device will be described. As shown in FIG. 1, for example, an Al-0.5% Cu film 21 and a TiN 22
A conductive film 2 constituting a lower wiring having a film, an interlayer insulating film 3 such as a polyarylether film and an oxide film 4 such as a silicon dioxide film on the conductive film 2 and an oxide film facing the conductive film 2 4, a W adhesion film 7, a WNx barrier film 8 on the W adhesion film 7, and a WNx barrier film 8 on a via hole 5 of a substrate 6 having a via hole (connection hole) 5 opened in the interlayer insulating film 3. The W nucleation promoting film 9 and the W film 1 embedded in the via hole 5 on the W nucleation promoting film 9
A via contact plug 11 having 0 is provided, and a conductive film 12 constituting an upper layer wiring is provided on the via contact plug 11.

Next, a method of manufacturing the above-described highly integrated semiconductor device will be described. First, as shown in FIG. 2A, a predetermined element (not shown) is formed on a semiconductor substrate 1 in the form of a wafer.
Alternatively, a conductive film 2 forming a lower wiring mainly composed of Cu
To form The conductive film 2 is made of, for example, Al-0.5% Cu
It has a two-layer structure of a film 21 and a TiN film 22.

Next, as shown in FIG. 2B, an interlayer insulating film 3 is formed on the semiconductor substrate 1 on which the conductive film 2 is formed. That is, the semiconductor substrate 1 is placed on a spin coater (not shown), and for example, 3 to 5 cc of a stock solution of a polyarylether film is dropped on the surface of the wafer,
Spread evenly with pm. Next, for example, in a nitrogen atmosphere,
Bake at 150 ° C. and 250 ° C. for 1 minute each. Next, the semiconductor substrate 1 is placed in a curing furnace, and a curing process is performed, for example, at 425 ° C. for 1 hour in a nitrogen atmosphere. By performing the above-described processing, for example, a polyarylether film having a thickness of 500 nm is formed as the interlayer insulating film 3.

Next, as shown in FIG. 2C, an oxide film such as a silicon dioxide film is oxidized on the interlayer insulating film 3 of the polyaryl ether film by, for example, a plasma CVD device (not shown) under the following conditions. A film 4 is formed to a thickness of 600 nm. Temperature 400 ° C. RF (13.56 Hz) Power 0.35 kW Pressure 5 Torr SiH ₄ 100 sccm N ₂ O 400-600 sccm

Next, as shown in FIG.
The semiconductor substrate 1 is placed on the apparatus, and the photo-resist is placed on the wafer surface.
After applying a mist and exposing the via hole pattern,
The semiconductor substrate 1 is placed on the illustrated magnetron etcher.
And a via hole that opens to the oxide film 4 with the interlayer insulating film 3 facing.
Is formed under the following conditions, for example. Temperature 20 ° C Power supply power 1.6 kW Pressure 5.3 Pa C_FourF₈ 14 sccm  CO 250 sccm Ar 100 sccm O_Two 2 sccm

Subsequently, the semiconductor substrate 1 is mounted on an ECR (not shown).
A via hole 5 that is placed on an etcher, penetrates through the interlayer insulating film 3, and opens to face the conductive film 2 of the lower wiring is formed, for example, under the following conditions. By the above steps, the substrate 6 to be processed
To complete. Temperature 50 ° C. μ wave power 0.5 kW Pressure 0.8 Pa Substrate bias (RF) 0.1 kW N ₂ 40 sccm He 165 sccm

Next, as shown in FIG.
Is mounted on a sputtering apparatus (not shown) having a plurality of chambers. First, the substrate 6 to be processed is placed on a chamber for heating, and the substrate 6 to be processed is heated at, for example, 350 ° C. for 10 minutes, and the moisture (H) absorbed by the oxide film 4 / interlayer insulating film 3 is removed.
₂ O) is eliminated.

Subsequently, the substrate 6 to be processed is placed on the reverse sputtering chamber in the sputtering apparatus, and is etched by, for example, 30 nm in terms of a thermal oxide film by reverse sputtering, so that the conductive film 2 on the bottom of the via hole 5 is formed. Remove the insulator.

Next, as shown in FIG.
Is placed on the above-mentioned sputter chamber, and the W adhesion film 7 is formed, for example, by a sputtering method at 20 to 50 nm under the following conditions.
Form. In this case, deposition is preferably performed by a long-distance sputtering method. Temperature Room temperature to 250 ° C Pressure 4 mTorr Target applied power 2 kW

Next, as shown in FIG.
Is taken out of the above-mentioned sputtering apparatus, and is placed on a plasma CVD apparatus (not shown), for example, to form a WNx barrier film 8 having a thickness of 40 to 100 nm under the following conditions. At a temperature 300 to 350 ° C. Pressure 10~80 Torr RF (13.56MHz) power _{0.1~1.0 kW WF 6 6 sccm H 2} 500 sccm N 2 500 sccm Ar 1000 sccm Here, the x of WNx barrier film 8 0 And the range of not more than 1 is desirable, and if it exceeds 1, the WNx barrier film 8 is in a pernitrided state, and the resistance value is rapidly increased.

Next, as shown in FIG.
Again with the above sputtering apparatus or the above plasma CV
Placed on a D apparatus, a W nucleation promoting film 9 is formed in a thickness of 30 to 100 nm under the following conditions, for example. Temperature 300 to 350 ° C. Pressure 10 to 80 Torr Power _{(RF13.56MHz) 0.1~1.0 kW WF 6 6} sccm H 2 500 sccm Ar 1000 sccm

Next, as shown in FIG.
Is placed on a CVD apparatus (not shown) to deposit the W film 10. The W film 10 is deposited under the following conditions, for example, by two steps of nucleation and embedding of the W film 10. Nucleation conditions 325 ° C. WF ₆ 30 sccm H ₂ 1000 sccm SiH ₄ 10 sccm Ar 2500 sccm Embedding conditions Temperature 325 ° C. WF ₆ 75 sccm H ₂ 500 sccm Ar 2500 sccm In this case, the lower layer is a W nucleus which is the same kind of metal in advance. Since the formation promoting film 9 is formed, nucleation easily occurs, and the via hole 5 can be filled with the W film 10.

Finally, as shown in FIG. 1, a conductive film 12 which is an upper-layer wiring mainly composed of, for example, Al or Cu is formed on a via contact plug 11 in which a W film 10 is buried.
Is formed by a sputtering method or the like to complete a highly integrated semiconductor device.

According to the above-described highly integrated semiconductor device, the WNx barrier film 8 can be formed in the via hole 5 without peeling, and the W film 10 can be easily grown on the WNx barrier film 8 by the CVD method. And the via hole 5 can be buried. Furthermore, the WNx barrier film 8 formed by the plasma CVD method has better coverage of the side wall of the via hole 5 than the conventional sputtering method, and can suppress the release of moisture from the interlayer insulating film 3.

The case where the via contact plug 11 is formed on the conductive film 2 constituting the lower layer wiring has been described as the substrate 6 to be processed, but the conductive film 2 is a source electrode or an impurity diffusion layer (not shown). The present invention can be applied to a case where a contact plug is formed on a drain electrode or the like.

In the above process, the plasma CVD apparatus is a parallel plate type plasma CVD apparatus, a magnetron type parallel plate type plasma CVD apparatus, or an ECR (Electron Cyclotron Reactor) as an apparatus for obtaining a higher density plasma.
sonance) Plasma CVD equipment, ICP (Inductively Co
upled Plasma) CVD equipment, Helicon wave plasma CVD
An apparatus or the like can be used. In addition, any of the plasma CVD apparatuses can be configured to be able to be used also as a CVD apparatus such as a low pressure CVD apparatus by turning on and off a plasma generation power supply. Further, in the step of using the above-mentioned sputtering apparatus, by connecting the above-mentioned plasma CVD apparatus and the apparatus via a gate, the substrate to be processed 6 can be continuously processed while moving without being exposed to the atmosphere. Can be. Therefore, in each of the above steps, the W adhesion film 7, the WNx barrier film 8, the W nucleation promoting film 9, and the W film 10 are continuously formed on the substrate 6 to be processed in this order without being exposed to the air. Becomes possible.

Second Embodiment FIG. 5 is a schematic sectional view showing a gate electrode forming portion of a highly integrated semiconductor device as an example of an electronic device of the present invention, and FIGS. FIG. 4 is a schematic cross-sectional view showing a method for manufacturing the highly integrated semiconductor device, and showing a process applied to forming a gate electrode of the highly integrated semiconductor device.

The configuration of the above-described highly integrated semiconductor device will be described. As shown in FIG. 5, the highly integrated semiconductor device includes a gate electrode 13, and the gate electrode 13 is
A substrate to be processed 6 comprising a thermal oxide film 14 formed thereon and a polycrystalline silicon film 15 formed on the thermal oxide film 14
There is a WNx film barrier 8, a W nucleation promoting film 9 on the WNx barrier film 8, and a W film 10 on the W nucleation promoting film 9.

Next, a method of manufacturing the above-described highly integrated semiconductor device will be described. On the polycrystalline silicon film on the substrate to be processed (not shown), a W adhesion film of 2 to 10 nm as in the first embodiment is deposited by, for example, a sputtering method. This step can be omitted because the adhesion of the WNx barrier film formed by the plasma CVD method in the subsequent step to the polycrystalline silicon film can be ensured. Hereinafter, the case where the W adhesion film forming step is omitted will be described.

First, as shown in FIG.
A substrate 6 to be processed, on which a thermal oxide film 14 is formed and a polycrystalline silicon film 15 is formed on the thermal oxide film 14, is placed on a plasma CVD device (not shown).
The Nx barrier film 8 is formed, for example, with a thickness of 2 to 10 nm under the same conditions as in the first embodiment.

Next, as shown in FIG.
Is placed in a separate chamber of a sputtering apparatus or a plasma CVD apparatus (not shown), and for example, a W nucleation promoting film 9 is formed with a thickness of 5 to 30 nm under the same conditions as in the first embodiment.

Next, as shown in FIGS. 6C to 6D, the substrate 6 to be processed is mounted on a CVD apparatus (not shown), and a W film 10 is deposited to a thickness of 50 to 100 nm under the following conditions, for example. . That is, the substrate 6 to be processed is placed on a CVD apparatus (not shown), and W
The film 10 is formed by two steps of nucleation and film formation of the W film 10, for example, under the following conditions, 50 to 100 nm.
Form. Nucleation conditions Temperature _{450 ℃ WF 6 30 sccm H 2} 1000 sccm SiH 4 10 sccm Ar 2500 sccm deposition conditions Temperature _{450 ℃ WF 6 75 sccm H 2} 500 sccm Ar 2500 sccm Temperature In this case, the lower layer is the same metal W nuclei Because of the formation promoting film 9, adsorption and dissociation of SiH ₄ gas occurs on the W nucleation formation promoting film 9, Si as a reducing species of the WF ₆ gas is precipitated, and the W film 10 is uniformly formed on the substrate 6 to be processed. grow up. Therefore, it is possible to form a laminated film structure of the W film 10 / W nucleation promoting film 9 / WNx barrier film 8 on the polycrystalline silicon film 15.

Finally, as shown in FIG. 5, the W film 10 /
The gate electrode 13 is formed by processing the W nucleation promoting film 9 / WNx barrier film 8 / polycrystalline silicon film 15 / thermal oxide film 14 using a mixed gas such as Cl ₂ , HBr, and O ₂ .

Also in this case, the formation of the W nucleation promoting film 9 makes it possible to easily form the W film 10 on the WNx barrier film 8 on the polycrystalline silicon film by the CVD method, and to reduce the resistance. The gate electrode 13 using the W film 10 can be formed. In each step of forming the gate electrode 13, the same plasma C as in the first embodiment is used.
It is possible to use a VD apparatus. Further, similarly to the first embodiment, in each of the above steps, a WNx barrier film 8, a W nucleation promoting film 9, a W film 10 can be formed continuously in this order without exposure to the atmosphere.

[0042]

According to the electronic device manufacturing method of the present invention,
W film / WNx is formed in the connection hole formed in the organic interlayer insulating film.
In a contact plug or via contact plug in which a laminated film structure of a barrier film is embedded, the adhesion between the WNx barrier film and the interlayer insulating film is improved, and the WNx
The growth of the W film on the barrier film by the CVD method can be easily promoted. In forming a gate electrode having a laminated film structure of a W film / WNx barrier film / polycrystalline silicon film, the growth of the W film on the WNx barrier film by the CVD method can be easily promoted.

According to the electronic device of the present invention, a WNx barrier is formed in a contact plug or a via contact plug having a laminated film structure of a W film / WNx barrier film embedded in a connection hole formed in an organic interlayer insulating film. It has excellent adhesion between the film and the interlayer insulating film, and can form a W film on the WNx barrier film. In a gate electrode having a laminated film structure of a W film / WNx barrier film / polycrystalline silicon film, a W film can be formed on the WNx barrier film.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a via contact plug forming portion of a highly integrated semiconductor device, which is an example of an electronic device of the present invention.

FIGS. 2A to 2C are schematic cross-sectional views illustrating a method of manufacturing a highly integrated semiconductor device, which is an example of the electronic device of the present invention, and illustrating a main part of the highly integrated semiconductor device.

3 (a) to 3 (c) are schematic cross-sectional views illustrating a method of manufacturing the highly integrated semiconductor device following FIG. 2, and illustrating steps applied to forming a via contact plug of the highly integrated semiconductor device.

4A to 4C are schematic cross-sectional views illustrating a method of manufacturing the highly integrated semiconductor device following FIG. 3, and illustrating a process applied to forming a via contact plug of the highly integrated semiconductor device.

FIG. 5 is a schematic cross-sectional view showing a gate electrode portion of a highly integrated semiconductor device, which is an example of the electronic device of the present invention.

FIGS. 6A to 6D schematically illustrate another method of manufacturing a highly integrated semiconductor device, which is an example of the electronic device of the present invention, and schematically illustrate steps applied to forming a gate electrode of the highly integrated semiconductor device. It is sectional drawing.

FIG. 7 is a schematic cross-sectional view showing a gate electrode portion of a highly integrated semiconductor device, which is an example of a conventional electronic device.

FIG. 8 is a schematic cross-sectional view showing a via contact plug formation portion of a highly integrated semiconductor device, which is an example of another conventional electronic device.

[Explanation of symbols]

1: semiconductor substrate, 2, 12: conductive film, 21: Al-0.
5% Cu film, 22 ... TiN film, 3 ... interlayer insulating film, 4 ... oxide film, 5 ... via hole, 6 ... substrate to be processed, 7 ... W adhesion film, 8 ... WNx barrier film, 9 ... W nucleation promoting film , 10 ...
W film, 11: Via contact plug, 13: Gate electrode, 14: Thermal oxide film, 15: Polycrystalline silicon film

Claims (15)

[Claims] 1. A step of forming a WNx barrier film on a substrate to be processed, a step of forming a W nucleation promoting film on the WNx barrier film, and a step of forming a W film on the W nucleation promoting film A method for manufacturing an electronic device, comprising: 2. The method according to claim 1, wherein a W adhesion film is formed on the substrate to be processed before the step of forming the WNx barrier film. 3. The processing substrate has a connection hole opened in an interlayer insulating film on the conductive film.
6. The method for manufacturing an electronic device according to claim 1. 4. The method according to claim 1, wherein the substrate to be processed includes a polycrystalline silicon film. 5. The method according to claim 3, wherein the interlayer insulating film is an organic low dielectric constant film. 6. The method according to claim 1, wherein the step of forming the WNx film uses a plasma CVD method. 7. The step of forming the W nucleation promoting film comprises:
The method according to claim 1, wherein a sputtering method or a plasma CVD method is used. 8. The method according to claim 2, wherein the step of forming the W adhesion film uses a sputtering method or a plasma CVD method. 9. The method according to claim 1, wherein the step of forming the W film uses a CVD method. 10. A step of forming the WNx barrier film, the step of forming the W nucleation promoting film, and the step of forming the W film continuously without exposing the substrate to be processed to the atmosphere. The method for manufacturing an electronic device according to claim 1, wherein: 11. An electronic device comprising: a WNx barrier film on a substrate to be processed; a W nucleation promoting film on the WNx barrier film; and a W film on the W nucleation promoting film. 12. The semiconductor device according to claim 1, further comprising a W adhesion film between the substrate to be processed and the WNx barrier film.
2. The electronic device according to 1. 13. The electronic device according to claim 11, wherein the substrate to be processed has a connection hole opened in an interlayer insulating film on the conductive film. 14. The electronic device according to claim 11, wherein the substrate to be processed includes a polycrystalline silicon film. 15. The electronic device according to claim 13, wherein the interlayer insulating film is an organic low dielectric constant film.