JP2000217102A - Tuner for receiving satellite broadcast - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain with a simple circuit configuration a tuner for receiving a satellite broadcast that can receive both analog and digital satellite broadcast programs. SOLUTION: Both a high-frequency signal processing circuit and an intermediate frequency amplifier circuit of the tuner receiving a digital QPSK modulation signal and an analog FM modulation signal are used in common, an IQ converter circuit and a frequency demodulating circuit 28 are formed in the identical semiconductor substrate IC1, a power supply for the circuits used in common is set always active. When a digital signal is received, the power of the QPSK modulation circuit is activated and when an analog signal is received, the power of the frequency demodulation circuit is activated selectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuner for receiving satellite broadcasting, which is capable of receiving analog broadcasting and digital broadcasting in satellite broadcasting.

[0002]

2. Description of the Related Art A conventional tuner for receiving satellite broadcasting receives F and F signals when receiving analog and digital satellite broadcasting.
Analog satellite broadcasting of M modulation is an analog receiver,
Since digital satellite broadcasting of PSK modulation is received by a digital receiver, a total of two set-top boxes or a built-in TV instead of the set-top box is required. However, in Europe, digital satellite broadcasting is becoming increasingly widespread, and digital satellite broadcasting and analog satellite broadcasting are mixed. At present, it is necessary to develop a single set-top box that has both reception functions. It came out.

[0003]

In the above-mentioned conventional satellite broadcasting receiving system, it is necessary to reduce the number of parts by reducing the size and sharing the circuit in order to reduce the cost. In this satellite broadcasting system circuit, functions such as PLL tuning and frequency conversion inside the tuner are common to analog and digital, and the basic circuit can be shared. However, an IQ converter (hereinafter referred to as an IQ demodulator) is required for digital QPSK demodulation, and an FM demodulator is required for analog FM demodulation. Also, in order to ensure the desired performance of the intermodulation interference suppression characteristic as a tuner, the attenuation function of the attenuator circuit of the RF unit is controlled according to the input level of the signal, and the FM demodulator (or the IQ demodulator) is controlled. An AGC detection circuit and a control circuit for adjusting the input signal level to an optimum value are required. Further, in order to reduce the cost, it is necessary to ensure the characteristics of the amplitude error and the phase error of the I output signal and the Q output signal required as an IQ converter circuit without an adjustment circuit.

[0004]

According to a first aspect of the present invention, there is provided a satellite broadcast receiving tuner for receiving a digital QPSK modulated signal and an analog FM modulated signal. An intermediate frequency amplification circuit including a high-frequency signal processing circuit in the end portion of 1 to 2 GHz band and an intermediate frequency band-pass filter is shared, and an IQ converter circuit and an FM demodulation circuit are formed on the same semiconductor substrate, and digital QPSK modulation is performed. When signal processing is performed, the power to the FM demodulation circuit is cut off to drive the IQ converter circuit. When signal processing is performed on an analog FM modulation signal, the power to the IQ converter circuit is cut off to perform FM processing. The demodulation circuit is driven.

According to a second aspect of the present invention, there is provided a tuner for receiving a satellite broadcast according to the first aspect of the present invention, wherein an intermediate frequency amplification is performed to optimize an input signal level to an FM demodulation circuit and an IQ converter circuit. An AGC detection circuit is provided on the same semiconductor substrate so that the gain of the circuit and the reduction amount of the RF AGC circuit of the input high-frequency amplifier can be controlled.

According to a third aspect of the present invention, there is provided a satellite broadcast receiving tuner according to the first aspect, wherein the FM demodulation circuit and the IQ converter circuit are provided on the same semiconductor substrate on which the FM demodulation circuit and the IQ converter circuit are formed. Two independent oscillation circuits (VCOs) are provided for circuits.

According to a fourth aspect of the present invention, there is provided a satellite broadcast receiving tuner according to the first aspect, wherein one tuner for the FM demodulation circuit is provided on the same semiconductor substrate on which the FM demodulation circuit and the IQ converter circuit are formed. And one mixer for each of the I output and the Q output of the IQ converter circuit.

According to a fifth aspect of the present invention, there is provided a satellite broadcast receiving tuner according to the first aspect, wherein the FM demodulation circuit and the IQ converter circuit formed on the same semiconductor substrate, particularly the IQ converter. I output and Q
The arrangement of semiconductor elements forming a circuit after the output mixer is such that the I output side and the Q output side are line-symmetrical to each other.

According to a sixth aspect of the present invention, there is provided a satellite broadcast receiving tuner according to any one of the first to fifth aspects, wherein the first filter having the first bandwidth as the intermediate frequency filter and the second filter are used as the intermediate frequency filters. A second filter having a bandwidth is provided, and a switching circuit for switching between the first and second filters is provided.

According to a seventh aspect of the present invention, there is provided a satellite broadcast receiving tuner according to any one of the first to fifth aspects, further comprising two RF input terminals, wherein each of the RF input terminals has a first input terminal. An amplifier circuit is connected to a second input amplifier circuit, and a switching circuit for switching input signals to the two input amplifier circuits is provided.

According to another aspect of the present invention, there is provided a tuner for receiving a satellite broadcast according to any one of the first to fifth aspects, wherein one RF input terminal and one RF distribution output terminal are provided. A signal input from the input terminal is distributed inside the tuner, and an RF signal having the same level as the input signal is output to the outside of the tuner.

According to a ninth aspect of the present invention, in the tuner for receiving a satellite broadcast according to any one of the first to fifth aspects, FM demodulation is performed at the time of reception in a poor C / N state (low C / N ratio). Bandwidth switching to reduce the FM demodulation threshold by narrowing the bandwidth of the PLL loop filter of the circuit, and widen the bandwidth of the PLL loop filter to reduce truncation noise in a good C / N reception state Means are provided.

<Operation of the Invention> According to claims 1 and 2,
In a tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal, an FM demodulator, an IQ converter and an AGC detection circuit common to these are formed on the same semiconductor substrate. In comparison with the conventional circuit configuration having two AGC loops, even if the FM demodulation circuit and the IQ converter circuit are switched, the output of the AGC output voltage can be made one system and the circuit components It is possible to reduce the number of points and reduce the size and cost. Further, since the power supply for the FM demodulator, the IQ converter, and the AGC detection circuit is separated into three systems, the power supply for the AGC detection circuit, which is commonly used, is always in the ON state.
As a power supply used for the demodulator, one of the power supplies can be turned on and the other power supply can be turned off, so that power consumption can be reduced.

According to a third aspect of the present invention, in a satellite broadcast receiving tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal, the IQ converter circuit and the VCO for the FM demodulation circuit are independently provided on the same semiconductor substrate. Provided, when driving the IQ converter circuit, the IQ
The peripheral circuits of the VCO can be optimized so as to minimize the output amplitude error and phase error. Also, when driving the FM demodulator, it is possible to minimize the return to the input amplifier circuit of the VCO and to optimize the peripheral circuits of the VCO so as to minimize the amount of drift with respect to temperature changes.

According to a fourth aspect of the present invention, there is provided a satellite broadcast receiving tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal. F
Since an independent mixer for the M demodulation circuit is provided and the mixer is not shared, it can be completely separated from the FM demodulation circuit when driving the IQ converter circuit, and the I output mixer and the Q output side The load applied to the mixer can be the same. This makes it possible to minimize the amplitude error and the phase error of the IQ output in the mixer section in the IQ converter circuit.

According to a fifth aspect of the present invention, in a satellite broadcast receiving tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal, a mixer for each of I and Q outputs of an IQ converter circuit on the same semiconductor substrate. Is arranged so that the I output side and the Q output side are line-symmetric with each other, so that the amplitude error and the phase error of the IQ output in the mixer section in the IQ converter circuit can be minimized.

According to the sixth aspect, a satellite broadcast receiver for receiving a digital QPSK modulation signal and an analog FM modulation signal has a built-in intermediate frequency filter having two kinds of bandwidths and a switching circuit for switching the intermediate frequency filter. Therefore, it becomes possible to select and guide a digital QPSK signal transmitted by a plurality of transponders to a filter having a smaller transmission band and a smaller transmission loss.

According to the seventh aspect, in a satellite broadcast receiver for receiving a digital QPSK modulation signal and an analog FM modulation signal, two input terminals are provided, and the first and second terminals are connected to the respective input terminals. Since the RF input amplifier circuit is switched by a switching circuit, signals transmitted from two satellite receiving antennas via two cables can be selected and switched at the input section of the tuner.

According to the present invention, in a satellite broadcast receiving tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal, one RF input signal, one RF distribution output terminal, and RF signal distribution. Since the circuit is provided, a signal having substantially the same level as the RF signal input to the tuner can be supplied to another receiver or another signal processing circuit in the same receiver.

According to the ninth aspect, in a satellite broadcast receiving tuner that receives a digital QPSK modulation signal and an analog FM modulation signal, a control voltage is applied to the FM demodulation circuit from outside the tuner, and when the C / N ratio is degraded. It is possible to improve the threshold by narrowing the bandwidth of the loop filter of the PLL, and to reduce the truncation noise by widening the bandwidth of the loop filter of the PLL when the C / N ratio is good.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings. (Embodiment 1) FIGS. 1 and 4 show the present invention.
1 is a block diagram of a first embodiment of the satellite broadcast receiving tuner shown in FIG. As shown in FIG. 1, the RF signal input to the RF input terminal 10 is DC-cut by the capacitor 9, then the interference signal of less than 900 MHz is attenuated by the high-pass filter 11 and amplified by the RF amplifier circuit 12. Is done. Reference numeral 25 denotes an AGC detection circuit.
The control voltage from 5 is supplied to the RF attenuator 14 to adjust the signal level. In this case, when the signal level is high, the reduction is 10 to 20 dB, and when the signal level is low, the reduction is suppressed. The signal whose level has been adjusted by the RF attenuator 14 then passes through a tracking filter or an image filter 15, and then, for example, 479.5 M
The signal is frequency-converted into a signal of Hz, amplified by an IF amplifier circuit 20, and then selected by an IF bandpass filter 22.
Thereafter, the signal is further amplified by the IF amplifying circuit 23 and input to the IC 1 for the IQ converter and the FM demodulation circuit including the AGC detection circuit 25 formed on the same semiconductor substrate.

In the IC 1, after amplification by the IF amplifier circuit 24, one of them is subjected to AGC detection by the AGC detection circuit 25, and the signal level is converted to a DC voltage. This voltage is divided into an internal AGC and an external AGC, and the internal AG
C controls the gain, and RFAGC controls the attenuator 14 so that the NF and IM characteristics of the RF stage can maintain good performance.

On the other hand, the signal amplified by the IF amplification circuit 24 is supplied to a mixer 27 of an FM demodulation circuit 28 and mixers 31 and 32 for I and Q outputs of an IQ converter. When the FM demodulation circuit 28 is driven by the power supply, the circuits after the mixer 27 operate, and when the input signal is an FM modulation signal, the FM including the mixer 27 is used.
The signal is converted into a baseband signal by the demodulation circuit 28 and output from the FM detection output terminal 107.

When the IQ converter is driven by a power supply, a second local oscillation circuit 30 provided outside the IC 1
The second local signal supplied by the I output mixers 31 and Q
Input to the output mixer 32. After being converted into baseband signals by the respective I-output and Q-output mixers 31 and 32, the I-signal is amplified by baseband amplifier circuits 33 and 34 and further broadened to a low-pass filter 37. , Is amplified by the output amplification circuit 39 and output to the output terminal 112. Similarly, after the Q signal is amplified by baseband amplifier circuits 35 and 36,
The signal passes through the low-pass filter 38, is amplified by the output amplifier circuit 40, and is output to the output terminal 113.

(Embodiment 2) FIG. 2 is a block diagram of a satellite broadcast receiving tuner according to a second embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. This second embodiment is different from the first embodiment shown in FIG. 1 in that an IF band-pass filter 22 is provided with first and second SAWs having different characteristics.
The two SAWs are composed of filters 22A and 22B.
The filters 22A and 22B are selectively switched by a switch 21 that switches by controlling the port of the PLLIC. Thus, a digital QPSK signal transmitted by a plurality of transponders can be selectively guided to the SAW filter having the smaller transmission loss.

(Embodiment 3) FIG. 3 shows a first embodiment of the present invention.
It is a block diagram of 3rd Embodiment concerning the tuner for satellite broadcast reception shown in 6 and 7. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted. The third embodiment differs from the first and second embodiments shown in FIGS. 1 and 2 in that two input terminals are provided, and the first and second RF input terminals 10a and 10b are provided.
The input RF signal is attenuated by the first and second high-pass filters 11a and 11b, respectively, to attenuate an interference signal of less than 900 MHz, and then the first and second high-pass filters 11a and 11b respectively.
Are amplified by the RF amplifier circuits 12a and 12b.

The switching circuit 13 is controlled by the port control of the PLL IC 18 so that the first and second switching circuits 13 are controlled.
One of the RF amplifier circuits is turned on, and the other is turned off. Therefore, the first and second
RF signals input to the input terminals 11a and 11b are selectively derived from the first or second RF amplifier circuit 12a or 12b whose power is on, and supplied to a subsequent circuit. With such a configuration, the first and second reception signals transmitted from the two satellite broadcasting antennas via the two cables are selectively switched by the input unit of the tuner for satellite broadcasting reception, and the first and second reception signals are transmitted. , And to the subsequent circuit common to the received signals. Subsequent circuits common to the first and second received signals are the same as those in FIGS. 1 and 2, and a description thereof will be omitted.

(Embodiment 4) FIG. 4 shows a first embodiment of the present invention.
FIG. 13 is a block diagram of a fourth embodiment according to the satellite broadcast receiving tuners shown in FIGS. 6 and 8. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted. The difference between the fourth embodiment shown in FIG. 4 and the first and second embodiments shown in FIGS. 1 and 2 is that one RF input terminal 1
That is, one RF distribution output terminal 10c is provided in addition to 0. The RF signal input from the RF input terminal 10 is R
After being amplified by the F amplifier circuit 12, the signal is distributed by the distribution circuit 13c, and the divided RF signal is output to the RF distribution output terminal 10c. Therefore, an RF signal of the same level as the RF signal input to the RF input terminal 10 can be output to the outside of the satellite broadcast receiving tuner.

(Embodiment 5) FIG. 5 shows a first embodiment of the present invention.
FIG. 10 is a block diagram of a fifth embodiment according to the satellite broadcast receiving tuners shown in FIGS. 6 and 9. The same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. This fifth embodiment is different from the first embodiment shown in FIG. 1 in that LT (low threshold) is applied from outside the satellite broadcast receiving tuner.
A control signal is provided to the FM demodulation circuit 28 in the IQ converter and the FM demodulation circuit IC 1 via the control terminal 108,
That is, the bandwidth of the PLL loop filter of the FM demodulation circuit 28 can be varied.

Thus, the C / N in the FM demodulation circuit 28
When the ratio is degraded, the bandwidth of the PLL loop filter is narrowed to improve the threshold, and when the C / N ratio is good, the bandwidth of the PLL loop filter is widened to reduce truncation noise. I have.

FIG. 6 shows an AGC used in each embodiment of the present invention.
IQ in which amplifying circuit 24, AGC detecting circuit 25, IQ converter and FM demodulating circuit 28 are formed on the same semiconductor substrate
1 shows a configuration of a converter, an FM demodulation circuit IC 1 and peripheral circuits thereof.

[0032]

As described above, according to the present invention, in a tuner for receiving satellite broadcasting corresponding to digital broadcasting and analog broadcasting, an AGC detection circuit and an FGC are provided on the same semiconductor substrate.
M demodulation circuit and IQ converter circuit, and V
Since the CO and the mixer are provided independently in the FM demodulation circuit and the IQ converter circuit, and the I output and the Q output are designed symmetrically in the IQ converter circuit, the tuner for satellite broadcast reception has a low cost and high performance. Can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of a second embodiment of the present invention.

FIG. 3 is a block diagram of a third embodiment of the present invention.

FIG. 4 is a block diagram of a fourth embodiment of the present invention.

FIG. 5 is a block diagram of a fifth embodiment of the present invention.

FIG. 6 is an IC for an IQ converter and an FM demodulation circuit.
FIG. 2 is a configuration diagram of a peripheral circuit.

[Explanation of symbols]

 Reference Signs List 10 RF input terminal 10a First RF input terminal 10b Second RF input terminal 10c RF distribution output terminal 11 High pass filter 11a First high pass filter 11b Second high pass filter 12 RF amplifier circuit 12a: First RF amplifier circuit 12b: Second RF amplifier circuit 13: Distribution circuit 14: RF attenuator 15: Image filter 16: Mixer 20: IF amplifier circuit 21: Switch 22: IF bandpass filter 22A: First SAW filter 22B ... second SAW filter 23 ... IF amplifier circuit 24 ... IF amplifier circuit 25 ... AGC detection circuit 28 ... FM demodulation circuit 108 ... LT control terminal

Claims (9)

[Claims] 1. A satellite broadcast receiving tuner for receiving a digital QPSK modulation signal and an analog FM modulation signal, an intermediate frequency including a high-frequency signal processing circuit for a 1 to 2 GHz band and a band-pass filter for an intermediate frequency in a front end unit. In the case where the frequency amplifier circuit is shared, the IQ converter circuit and the FM demodulation circuit are formed on the same semiconductor substrate, and the digital QPSK modulation signal is processed,
In the case where the power supply to the demodulation circuit is cut off to drive the IQ converter circuit and the analog FM modulation signal is processed, the power supply to the IQ converter circuit is cut off to drive the FM demodulation circuit. Characteristic tuner for receiving satellite broadcasting. 2. The satellite broadcast receiving tuner according to claim 1, wherein the gain of the intermediate frequency amplification circuit and the RF of the input high frequency amplification unit are adjusted to optimize the input signal level to the FM demodulation circuit and the IQ converter circuit. To control the reduction amount of the AGC circuit, the AG
A tuner for receiving satellite broadcasting, comprising a C detection circuit. 3. The tuner for receiving satellite broadcasting according to claim 1, wherein two independent oscillation circuits for the FM demodulation circuit and the IQ converter circuit are provided on the same semiconductor substrate on which the FM demodulation circuit and the IQ converter circuit are formed. (VCO) is provided, The tuner for satellite broadcast reception characterized by the above-mentioned. 4. The tuner for receiving satellite broadcasting according to claim 1, wherein one mixer for the FM demodulation circuit and I output and Q of the IQ converter circuit are provided on the same semiconductor substrate on which the FM demodulation circuit and the IQ converter circuit are formed. 1. A satellite broadcast receiving tuner, wherein one mixer is provided for each output. 5. The tuner for receiving satellite broadcasting according to claim 1, wherein the FM demodulation circuit and the IQ converter circuit formed on the same semiconductor substrate, in particular, the circuits after the mixer for the I output and the Q output of the IQ converter. A tuner for receiving satellite broadcasting, wherein semiconductor devices to be formed are arranged such that an I output side and a Q output side are line-symmetric with each other. 6. A tuner for receiving satellite broadcasting according to claim 1, wherein a first filter having a first bandwidth and a second filter having a second bandwidth are used as the intermediate frequency filters.
And a switching circuit for switching between the first filter and the second filter. 7. The satellite broadcast receiving tuner according to claim 1, further comprising: two RF input terminals;
A tuner for receiving satellite broadcasting, comprising: a first input amplifier circuit and a second input amplifier circuit connected to input terminals; and a switching circuit for switching input signals to the two input amplifier circuits. 8. The tuner for receiving satellite broadcasting according to claim 1, further comprising one RF input terminal and one RF distribution output terminal, wherein a signal input from said RF input terminal is sent to the inside of the tuner. Distribute, RF same level as input signal
A tuner for receiving satellite broadcasting, wherein a signal is output to the outside of the tuner. 9. The tuner for receiving satellite broadcasting according to claim 1, wherein the C / N is low (low C / N).
Ratio) During reception, the bandwidth of the PLL loop filter of the FM demodulation circuit is narrowed to improve the FM demodulation threshold, and in a good C / N reception state, the bandwidth of the PLL loop filter is widened and truncated. A tuner for receiving satellite broadcasting, comprising a band switching means for reducing noise.