JP2000209507A - Low noise processing circuit for solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low noise processing circuit for a solid-state image pickup device that reduces noise while suppressing an after-image of a moving object. SOLUTION: In a cyclic noise reduction circuit where a subtractor 10 takes the difference between a current video signal outputted from an image pickup element 1 and a video signal of one preceding frame or field, a multiplier 11 multiplies a feedback coefficient (k) with the difference, an adder 6 adds the product to the current video signal so as to reduce a noise component from the video signal, the feedback coefficient (k) is controlled in the unit of one pixel depending on the difference from the subtractor 10. When the difference is high, the feedback coefficient (k) is decreased to reduce the after-image and when the difference is low, the feedback coefficient (k) is increased to reduce noise.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a noise reduction circuit for reducing noise and an afterimage of a solid-state imaging device.

[0002]

2. Description of the Related Art In a solid-state imaging device such as a video camera, an imaging device such as a CCD (Charge Coupled Device) is used. The CCD is configured by arranging a large number of photoelectric conversion elements such as photodiodes, and includes a photoelectric conversion unit that accumulates photoelectrically converted charges and a transfer unit that transfers the accumulated charges in time series. In the photoelectric conversion unit, electric charges corresponding to the amount of light are accumulated in the potential well of each pixel. The transfer unit transfers the accumulated charges to the horizontal transfer unit in units of rows (for each line) and outputs the charges in chronological order. By performing this operation for all rows, data for one screen is output.

Incidentally, a cyclic noise reduction circuit is used in a solid-state imaging device to reduce noise. This recursive noise reduction circuit reduces noise by adding a value obtained by multiplying a difference between a current video signal output from an image sensor and a video signal one frame before by a feedback coefficient k to the current video signal. ing.

FIG. 6 is a block diagram showing a configuration of a noise reduction circuit in a conventional solid-state imaging device.

[0005] As shown in FIG. 6, a photographed video signal is converted into an electric signal by an image pickup device 1 and input to an AGC circuit 3 via a sample / hold circuit (hereinafter, an S / H circuit) 2. The S / H circuit 2 samples and holds each pixel from the electric signal generated by photoelectric conversion in the image sensor 1 for each pixel using a clamp pulse to extract a signal portion. The extracted signal component is amplified at a predetermined gain by the AGC circuit 3, converted to a digital signal by the A / D converter 4, subjected to signal processing such as gamma and detail processing by the signal processing circuit 5, and processed into a video signal. (Pixel signal).

The video signal output from the signal processing circuit 5 passes through the adder 6 in the noise reduction circuit block 14 and
The signal is converted into an analog video signal by the / A converter 7, NTSC encoded by the encoder 8, added with various signals such as a synchronization signal, and output.

The noise reduction circuit block 14 is a block for reducing a noise component by utilizing that a video signal has a correlation between frames and a noise component has no correlation between frames. Adder 6, frame memory 9 as delay means, subtractor 10, multiplier 11, coefficient unit 1
2 is comprised.

The current video signal and the video signal one frame before (that is, the video signal delayed by one frame by the frame memory 9) are subtracted by a subtractor 10, and the subtracted signal (difference) is output from a multiplier 11 by a coefficient unit 12 by a multiplier 11. , And is added to the current video signal by the adder 6 to reduce noise.

However, in such a cyclic noise reduction circuit, as the value of the feedback coefficient k (0.ltoreq.k <1) increases, the effect of reducing noise increases, but a moving subject or a solid-state imaging device moves. In the case where an afterimage is generated (only a noise component appears at the output of the subtractor 10 when a completely stationary image is captured, the video signal one frame before is captured when a moving object is captured. And a video component difference between the current video signal and the current video signal. A residual image is generated because a signal including the video difference is added to the current video signal.)

[0010]

As described above, in the conventional noise reduction circuit, the larger the value of the feedback coefficient k (0 ≦ k <1), the greater the noise reduction effect. When the solid-state imaging device moves, there is a problem that an afterimage also becomes large.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and a noise reduction circuit for a solid-state imaging device capable of reducing noise while suppressing an afterimage of a moving object. It is intended to provide.

[0012]

According to a first aspect of the present invention, there is provided a noise reduction circuit for a solid-state imaging device, comprising: an adder having a video signal output from an imaging element as one of its additional inputs; Delay means for delaying the image signal by one frame (or one field), a subtractor for calculating a difference between the video signal delayed by one frame (or one field) from the delay means and the video signal input to the adder, A multiplier for multiplying an output from the subtracter by a predetermined coefficient, and a multiplier serving as the other addition input of the adder, for generating the coefficient;
The coefficient is provided with a coefficient unit which can be controlled on a pixel-by-pixel basis according to the difference value of the subtractor.

According to a second aspect of the present invention, in the low noise circuit of the solid-state image pickup device according to the first aspect, when the coefficient is controlled by the coefficient unit, a filter circuit for suppressing image quality deterioration due to switching of the coefficient. Is further provided.

According to a third aspect of the present invention, in the noise reduction circuit of the solid-state imaging device according to the first or second aspect, the coefficient unit calculates the coefficient as the difference from the subtractor increases. The coefficient is set to be smaller and the coefficient is set to be larger as the difference from the subtractor becomes smaller.

According to the first to third aspects of the present invention, the feedback coefficient k to be multiplied according to the difference between the video signal delayed by one frame or one field and the current video signal is controlled. If the difference is large, the feedback coefficient k is reduced to reduce the afterimage, and if the difference is small, the noise is reduced by increasing the feedback coefficient k.

In addition, at the time of switching of the feedback coefficient k, noise in a portion where the feedback coefficient k is small becomes more noticeable than noise in a portion where the feedback coefficient k is large. This image quality degradation is suppressed by inserting a filter circuit.

According to a fourth aspect of the present invention, there is provided a noise reduction circuit for a solid-state imaging device, comprising: a first adder having a luminance signal based on an image pickup signal output from an image pickup element as one addition input; First delay means for delaying the output of the adder by one frame (or one field); inputting the luminance signal delayed by one frame (or one field) from the first delay means to the first adder; A first subtractor for obtaining a difference from the luminance signal to be processed, and a second subtraction unit configured to multiply an output from the first subtractor by a predetermined first coefficient and use the result as the other addition input of the first adder. 1 multiplier and a first coefficient unit for generating the first coefficient, wherein the first coefficient is controllable on a pixel-by-pixel basis according to a difference value of the first subtractor. A first noise reduction circuit block comprising: A second adder that uses a color difference signal based on an image signal to be added as one of the addition inputs, a second delay unit that delays an output of the second adder by one frame (or one field), The color difference signal delayed by one frame (or one field) from the delay means and the second
A second subtractor that takes a difference from the color difference signal input to the adder of the second adder, multiplies an output from the second subtractor by a predetermined second coefficient, and outputs the other of the second adder A second multiplier as an addition input, and a second multiplier for generating the second coefficient;
The second coefficient is 1 according to the value of the difference of the second subtractor.
And a second noise reduction circuit block including a second coefficient unit that can be controlled in pixel units.

According to a fifth aspect of the present invention, in the solid-state imaging device according to the fourth aspect, when the first coefficient is controlled by the first coefficient unit, the first coefficient is switched. A first filter circuit that suppresses image quality degradation due to ridges, and a second filter circuit that suppresses image quality degradation due to switching of the second coefficients when the second coefficient is controlled by the second coefficient unit. Are further provided.

According to a sixth aspect of the present invention, in the noise reduction circuit for a solid-state imaging device according to the fourth or fifth aspect, the first coefficient unit has a large difference from the first subtractor. , The first coefficient is set smaller, and the difference from the first subtractor is set smaller, and the first coefficient is set larger as the difference from the first subtractor becomes smaller. The second coefficient is reduced as the difference from the subtractor increases, and the second coefficient is set to increase as the difference from the second subtractor decreases. I do.

According to the fourth to sixth aspects of the present invention, the same operation and effect as those of the first to third aspects can be obtained for each of the luminance signal and the color difference signal. Due to the change, only the first coefficient k for the luminance signal is controlled to be small, and the afterimage of the luminance signal can be reduced. At that time, if there is no color change, the second coefficient k for the color difference signal is controlled to be large. Noise components of color signals can be reduced. That is, the optimum feedback coefficient k can be controlled for each of the luminance signal and the color difference signal.

[0021]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram illustrating a configuration of a noise reduction circuit of a solid-state imaging device according to an embodiment of the present invention. The same parts as those in FIG. 7 are described with the same reference numerals.

The noise reduction circuit according to this embodiment is
An image sensor 1, an S / H circuit 2, an AGC circuit 3, an A /
It comprises a D converter 5, an adder 6, a D / A converter 7, an encoder 8, a frame memory 9 as delay means, a subtractor 10, a multiplier 11, and a coefficient unit 12A. I have. Since the block configuration is substantially the same as the configuration in FIG. 7, the description will focus on the parts that are different from FIG.

The noise reduction circuit block 14 receives the input video signal (pixel signal) as a subtraction input of the subtractor 10 and one input of the adder 6. The subtracted input of the subtracter 10 is a video signal delayed by one frame in the frame memory 9, and the subtracted output (difference) is one input of the multiplier 11. The other input of the multiplier 11 is a feedback coefficient k from the coefficient unit 12A. The subtraction output from the subtractor 10 is input to the coefficient unit 12A. The output of the multiplier 11 is input to the filter circuit 13. The output of the filter circuit 13 is the other input of the adder 6, and the adder 6 adds the current image signal to the current video signal to reduce noise.

The difference from FIG. 7 is that the multiplier 11 and the coefficient unit 1
When the multiplication circuit composed of 2A multiplies the difference value from the subtracter 10 by the feedback coefficient k, the feedback coefficient k is determined according to the difference value.
Can be controlled in units of one pixel.
Is provided with a low-pass filter circuit 13 at the subsequent stage. Other configurations are the same as those in FIG.

Accordingly, the coefficient unit 12A has a function of generating a feedback coefficient k, and controls the value of the feedback coefficient k supplied to the multiplier 11 on a pixel-by-pixel basis according to the difference value from the subtractor 10. Function (means). Alternatively, the coefficient unit 12A may be constituted by a coefficient unit configured to enable coefficient control from the outside, and means for controlling the coefficient of the coefficient unit in units of one pixel in accordance with the difference value from the subtractor 10. it can.

In FIG. 1, the feedback coefficient k (0 ≦ k
<1) is controlled by the difference between the video signal one frame before and the current video signal (output of the subtracter 10). If the difference is large, the afterimage is mainly reduced by reducing the feedback coefficient k as the motion of the subject (video component). If the difference is small, the feedback coefficient k is determined to be a noise component and the noise is mainly increased by increasing the feedback coefficient k. To reduce

Further, by providing the filter circuit 13, at the time of switching the feedback coefficient k, noise in a portion where the feedback coefficient k is small becomes more conspicuous as compared with noise in a portion where the feedback coefficient k is large, resulting in deterioration of image quality. Can be suppressed. In other words, the high frequency noise can be removed by the filter 13, and the edge of the projected image can be smoothed.

The feedback coefficient k from the coefficient unit 12A is
Control may be performed such that switching is performed at a certain stage in accordance with the difference value from the subtractor 10, or control may be performed such that switching is performed continuously in accordance with the magnitude of the difference value.

FIG. 2 is a block diagram showing a noise reduction circuit of a solid-state imaging device according to another embodiment of the present invention.

In FIG. 2, a signal processing circuit 5 based on the RGB signals extracted to the color filter children of the image sensor 1
To generate a luminance signal and a color difference signal. The luminance signal and the color difference signal are sent to the D / A converter 7 via the first and second noise reduction circuit blocks 14-1 and 14-2, respectively. It is configured to guide.

That is, the first noise reduction circuit block 14-1
Is a first adder 6-1 having a luminance signal based on an imaging signal output from the imaging device 1 as one addition input, and a first adder 6-1 for delaying the output of the first adder 6-1 by one frame. A frame memory 9-1 as one delay means, and a luminance signal delayed by one frame from the frame memory 9-1 and the first
And a first subtractor 10-1 for taking a difference from the luminance signal input to the adder 6-1. The output from the first subtractor 10-1 is multiplied by a predetermined first feedback coefficient. , A first multiplier 11-1 as the other addition input of the first adder 6-1 and the first multiplier 11-1 for generating the first feedback coefficient.
And a coefficient unit 12A-1 which can be controlled on a pixel-by-pixel basis according to the difference value of the subtractor 10-1.

The second noise reduction circuit block 14-2
Is a first adder 6-2 having a color difference signal based on an image signal output from the image sensor 1 as one addition input, and a first adder 6-2 for delaying the output of the first adder 6-2 by one frame. A frame memory 9-2 as delay means for the second, a color difference signal delayed by one frame from the frame memory 9-2 and a second
A second subtractor 10-2 for obtaining a difference from the color difference signal input to the adder 6-2, and multiplying an output from the second subtractor 10-2 by a predetermined second feedback coefficient. , A second multiplier 11-2 which is the other addition input of the second adder 6-2, and a second multiplier for generating the second feedback coefficient.
And a coefficient unit 12A-2 which can be controlled on a pixel-by-pixel basis according to the difference value of the subtractor 10-2.

According to the embodiment shown in FIG. 2, the noise reduction circuit block 14-
By providing 1, 14-2, for example, when the brightness changes greatly depending on the subject (scene) being photographed, only the first coefficient k for the luminance signal is controlled to be small, and the afterimage of the luminance signal can be reduced. If there is no color change at that time, the second coefficient k for the color difference signal is controlled to be large, so that the noise component of the color signal can be reduced. That is, the optimal feedback coefficient k can be set and controlled for each of the luminance signal and the color difference signal, and the quality of the displayed image can be improved.

According to the embodiment of the present invention described above with reference to FIGS. 1 and 2, the feedback coefficient of the recursive noise reduction circuit depends on the difference between the video signal one frame or one field before and the current video signal. By controlling k, the feedback coefficient k can be adapted to the movement of the subject, so that the afterimage of the moving subject can be suppressed, and the noise of the non-moving (less) subject can be easily reduced. Further, it is possible to suppress the image quality deterioration at the time of switching the feedback coefficient k by the filter circuit.

Further, in the embodiment of the present invention, since the coefficient control can be performed on a pixel-by-pixel basis, the optimum feedback coefficient k can be controlled for each pixel even in the same frame or the same field. It is also possible to control the optimal feedback coefficient k for each of the signal and the color difference signal,
It is possible to obtain a video signal with further reduced afterimage and noise.

In the embodiments shown in FIGS. 1 and 2, a frame memory for delaying one frame is used as delay means in the noise reduction circuit block 14.
When a solid-state imaging device such as a video camera is used in a high sensitivity mode, a field memory for delaying one field may be used as a delay unit instead of the frame memory.

As described above, in the high sensitivity mode of the solid-state imaging device, a circuit utilizing field correlation can be used as the noise reduction circuit block 14. Here, the normal sensitivity mode and the high sensitivity mode, and the frame correlation and the field correlation will be described below.

That is, in the noise reduction circuit in the solid-state imaging device, the noise component is reduced from the video signal (in the normal sensitivity mode) obtained based on the charge accumulated and exposed in the photoelectric conversion unit of the imaging device every field period. If you do
The video signal has a correlation between frames (because of 1
This is because the odd fields and the even fields forming the frame are interlaced, so that the correlation between the fields is small and the correlation between the frames is relatively large.)
By taking advantage of the fact that the noise component has no correlation between frames, the difference between the currently input video signal and the video signal delayed by one frame is extracted to extract only the noise component. The noise can be reduced by subtracting from the video signal.

In the noise reduction circuit in the solid-state image pickup device, a field based on the charge accumulated in the photoelectric conversion portion of the image pickup element every n times (n is a natural number) of one frame period and no exposure charge is provided. When the noise component is reduced from the video signal (in the high sensitivity mode) obtained by performing the interpolation, the video signal is always fixed to one of the odd field and the even field. Utilizing the fact that the noise component has no correlation between the fields,
By taking the difference between the currently input video signal and the video signal delayed by one field, only the noise component is extracted, and by subtracting this from the current video signal, noise can be reduced. In the case of the high-sensitivity mode, it is also possible to extract a noise component by calculating a difference between the current video signal and the video signal delayed by one frame.

Generally, in a solid-state imaging device such as a video camera, a charge coupled device (CCD) is used as a solid-state imaging device.
ice) is used. The normal sensitivity mode and the high sensitivity mode will be described with reference to FIGS.

FIG. 3 is a diagram showing an example of the configuration of a CCD. The CCD shown in FIG. 3 includes a photoelectric conversion unit 21 that receives light from a subject and converts the light into an electric signal.
The signal charge accumulated in the field shift pulse (FS)
Vertical transfer unit 22 which is transferred in synchronization with
2 includes a horizontal transfer unit 23 in which signal charges for one screen transferred to one line are transferred for each line, and an output unit 24 for outputting the horizontally transferred signal charges from a terminal 25 for each pixel.

FIG. 4 is a timing chart of CCD output and video output in the normal sensitivity mode of the solid-state imaging device. The exposure time of the CCD video camera in the normal sensitivity mode is one field (1/60 s).

FIG. 4A shows an exposure time (one field), FIG. 4B shows a field shift pulse (FS) for reading signal charges from the photoelectric conversion unit 21 to the vertical transfer unit 22, and FIG.
4 shows a CCD output signal, and FIG. 4D shows a video output signal.

As shown in FIG. 4B, a field shift pulse is output to the CCD for each field.
Thus, the charges accumulated in the photoelectric conversion unit 21 for one field period (that is, the periods A, B, C, and D shown in FIG.
.. Are output as CCD output signals delayed by one field period as shown in FIG. 4 (c), which are further processed by signal processing means (signal processing circuit 5, encoder 8, etc.). The video signal is converted and output as shown in (d).

On the other hand, in a CCD video camera (or a frame dropping long exposure video camera) in the high sensitivity mode,
By increasing the exposure time from normal one field to 2, 4, 6,... Fields by thinning out the field shift pulse, high sensitivity is realized. Note that the change in the exposure time is made every two fields.
This is to prevent the jitter of the video output by fixing the odd field / even field (ODD / EVEN) of the signal charge to be read to any one.

Next, the high sensitivity mode operation by long-time exposure will be described with reference to FIG. FIG. 5 shows a timing chart of the CCD output and the video output in the high sensitivity mode of the solid-state imaging device.

FIG. 5A shows an exposure time (two fields), FIG. 5B shows a field pulse for reading out signal charges from the photoelectric conversion unit 21 to the vertical transfer unit 22, and FIG. 5C shows a CCD output signal. 5 (d) shows a video output signal.

FIG. 5B shows an example in which the field shift pulse is output every two fields instead of every field. The CCD output signal is output every two fields as shown in FIG. This CCD output signal is 2
Since the charges accumulated and exposed during the field period 33 are output during the one-field period 31, a signal exposed for a long time can be obtained.

However, since there is no exposure signal output during the field period 32 following the field period 31, it is necessary to interpolate the field period 32 with the exposure signal of the field period 31 using the memory of the signal processing circuit 5 at the subsequent stage. In this manner, long-time exposure is performed by the photoelectric conversion unit 21, and a video output signal shown in FIG. 5D with high sensitivity is obtained. The memory interpolation is performed by using a known method. For example, the signal immediately before the output of the exposure signal is lost is used as it is, or the signal before and after the output of the exposure signal is lost is obtained by interpolation (using the average value before and after).

Automatic control of the exposure time according to the brightness of the video output as shown in FIGS. 4 and 5 is called automatic sensitivity switching. In the automatic sensitivity switching, for example, the level of the integrated value or the peak value of the luminance signal is compared with two threshold values of light and dark, and when it is determined that the image is dark, the exposure time is set to 2 fields (1/30 s) and 4 fields. ,..., And when it is determined that the image is bright, the exposure time is reduced by two fields or only one field. That is, when the image is dark, a field shift pulse having an extended period of 2 field periods, 4 field periods,..., And when the image is bright, a field shift pulse having a period shortened by 2 field periods or a field shift pulse of 1 field period. Is supplied to the CCD.

FIG. 6 is a block diagram showing a noise reduction circuit of a solid-state imaging device having an automatic sensitivity switching function according to another embodiment of the present invention.

FIG. 6 differs from FIG. 1 in that an exposure time control circuit 15 and a CCD drive circuit 16 are provided. The luminance signal from the signal processing circuit 5 is led to an exposure time control circuit 15, and the level of the integrated value or the peak value of the luminance signal is compared with two threshold values of light and dark, and an exposure time control signal indicating the result of the comparison is shown. S1 is generated and CCD driving circuit 1 is generated.
6 The CCD drive circuit 16 generates a CCD drive pulse S2 including a field shift pulse (FS) and drives the image pickup device 1. The pulse cycle of FS in the CCD drive pulse S2, that is, the FS pulse thinning amount Is controlled by the exposure time control signal S1.
That is, when the exposure time control circuit 15 determines that the image is bright (in the normal sensitivity mode), the cycle of the FS is, for example, 1
The field is set to be short, the charge accumulation time of the photoelectric conversion unit of the image sensor 1 is set short, and when it is determined that the image is dark (in the high sensitivity mode), the cycle of FS is set to, for example, two fields, and the photoelectric conversion of the image sensor 1 is performed. The charge storage time of the unit is set long. Note that the exposure time (F
As described above, the setting of the S-pulse period is shortened by 2 fields, 4 fields,... When the image is dark, and is shortened by 2 field periods when the image is bright. A field-shift pulse having a period or a one-field period is supplied to an image sensor (CC
D). Alternatively, the sensitivity may be switched by enabling switching between two threshold values of light and dark. further,
If the exposure time control signal S1 from the exposure time control circuit 15 indicates a dark image, the frame memory 9
May be switched to a field memory.

In the above embodiment, the noise reduction circuit of a solid-state imaging device such as a video camera has been described. However, the present invention is not limited to this.
It can be applied to a noise reduction circuit in a video device such as a receiver.

[0054]

As described above, according to the noise reduction circuit of the solid-state imaging device of the present invention, it is possible to reduce noise while suppressing the afterimage of a moving object.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a noise reduction circuit of a solid-state imaging device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a noise reduction circuit of a solid-state imaging device according to another embodiment of the present invention.

FIG. 3 is a diagram showing an example of a configuration of a CCD.

FIG. 4 is a CCD in a normal sensitivity mode of a solid-state imaging device.
6 is a timing chart showing the timing of output and video output.

FIG. 5 is a timing chart showing timings of a CCD output and a video output in a high sensitivity mode of the solid-state imaging device.

FIG. 6 is a block diagram showing a noise reduction circuit of a solid-state imaging device according to another embodiment of the present invention.

FIG. 7 is a block diagram showing a noise reduction circuit of a conventional solid-state imaging device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Image sensor 6 ... Adder 9 ... Frame memory (delay means) 10 ... Subtractor 11 ... Multiplier 12A ... Coefficient unit 13 ... Filter circuit 14 ... Noise reduction circuit block

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kei Tashiro 1-9-2 Hara-cho, Fukaya-shi, Saitama Prefecture Inside the Toshiba Fukaya Plant (72) Inventor Masatoshi Okubo 1-9-1-2 Harara-cho, Fukaya-shi, Saitama No. Inside the Toshiba Fukaya Plant (72) Inventor Akira Nakao 1-9-2 Hara-cho, Fukaya-shi, Saitama Prefecture Inside the Toshiba Fukaya Plant (72) Inventor Tetsuo Sakurai 3-3-1-9 Shimbashi, Minato-ku, Tokyo F-term (reference) in Toshiba AE Corporation 4M118 AA05 AA10 AB01 BA10 DD09 DD10 FA06 GC08 5C024 AA01 CA05 DA01 FA01 FA11 GA11 HA01 HA02 HA06 HA10 HA14 HA17 HA18 HA19 JA21 5C065 AA01 BB22 DD02 GG01 GG21 GG21 GG22 GG23

Claims (6)

[Claims] 1. An adder that uses a video signal output from an image sensor as one of its inputs, delay means for delaying the output of the adder by one frame (or one field), and one frame from the delay means. (Or one field) a subtractor for taking the difference between the delayed video signal and the video signal input to the adder; multiplying the output from the subtracter by a predetermined coefficient, and adding the other of the adders A solid-state imaging device comprising: a multiplier as an input; and a coefficient unit for generating the coefficient, wherein the coefficient is controllable on a pixel-by-pixel basis according to a difference value of the subtractor. Noise reduction circuit for equipment. 2. The solid-state imaging device according to claim 1, further comprising a filter circuit that suppresses image quality deterioration due to coefficient switching when the coefficient is controlled by the coefficient unit. circuit. 3. The method according to claim 2, wherein the coefficient unit sets the coefficient smaller as the difference from the subtractor increases, and sets the coefficient larger as the difference from the subtractor decreases. 3. The circuit for reducing noise of a solid-state imaging device according to claim 1 or 2, wherein: 4. A first adder having a luminance signal based on an image pickup signal output from an image pickup device as one addition input, and an output of the first adder as one frame (or one field).
First delay means for delaying, and a first delay means for calculating a difference between the luminance signal delayed by one frame (or one field) from the first delay means and the luminance signal input to the first adder. A subtractor, a first multiplier that multiplies an output from the first subtractor by a predetermined first coefficient, and uses the output as the other addition input of the first adder, A first coefficient unit, wherein the first coefficient is controllable on a pixel-by-pixel basis according to a difference value of the first subtractor. A second adder that uses a color difference signal based on an image pickup signal output from the image pickup device as one addition input, and a second adder that delays the output of the second adder by one frame (or one field). Delay means and one frame (or one field) delay from the second delay means. A second calculating unit that calculates a difference between the extended color difference signal and the color difference signal input to the second adder;
And the output from the second subtractor is converted to a predetermined second
And a second multiplier for multiplying the second adder by the second adder and generating the second coefficient, wherein the second coefficient is the second adder of the second adder. A second noise reduction circuit block including a second coefficient unit that can be controlled in units of one pixel in accordance with a value of the difference. 5. A first filter circuit which suppresses image quality deterioration due to switching of the first coefficient when the first coefficient is controlled by the first coefficient unit. When controlling the second coefficient, the second coefficient
And a second filter circuit for suppressing image quality deterioration due to the switching of the coefficient.
2. A noise reduction circuit for a solid-state imaging device according to claim 1. 6. The first coefficient unit decreases the first coefficient as the difference from the first subtractor increases, and decreases the difference from the first subtractor. The first coefficient is set to be large according to the above, and the second coefficient unit decreases the second coefficient as the difference from the second subtractor increases, and the second coefficient As the difference from the subtractor becomes smaller, the second
The noise reduction circuit for a solid-state imaging device according to claim 4, wherein the coefficient is set to be large.