JP2000208577A - Semiconductor evaluating method and defect position specifying device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor evaluating method and a defect position specifying device, with which a defect position can be three-dimensionally specified. SOLUTION: In a semiconductor evaluating method 100, a defect condition detecting process 110, a defect position specifying process 120 and a defect factor analyzing process 130 are successively executed. Furthermore, in the defect position specifying process 120, a first optical induced current (OBIC) process 122 corresponding to a first process, a second OBIC process 124 corresponding to a second process and an analytic process 126 corresponding to a third process are performed. In the first OBIC process 122 and the second OBIC process 124, an observation plane is irradiated with a laser beam at respectively different irradiating angles and two mutually different pieces of planar information at defect positions are detected from the relation of the irradiated positions and OBIC. In the analysis process 126, the defect position is specified three-dimensionally from such two pieces of mutually different planar information.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor evaluation method and a defect position specifying device.

[0002]

2. Description of the Related Art In recent years, large-scale integrated circuits (Large
Scale Integrated circuit
t; hereinafter, referred to as “LSI”. With the advancement of miniaturization and high integration, it is becoming difficult to identify the cause of operation failure of LSI. In general, in order to identify the cause of an LSI operation failure, it is necessary to specify a failure mode (detect a failure situation), specify a position of a defect causing the failure, and analyze the failure cause by physical observation of the defect. Must be performed sequentially. In this specification, a defect that can cause an operation failure of a semiconductor device such as a defect mode, a crystal defect, or an abnormal impurity concentration is referred to as a “defect”.

Conventionally, various methods have been put into practical use as methods for specifying a failure mode or a defect position. None of the identification methods that have been practically used in the past are universal. Therefore, conventionally, in a semiconductor evaluation method, some methods are selected from specific methods that have been put into practical use, and the methods are appropriately combined and executed.

Conventionally, as a method for specifying a failure mode of an LSI, a test element group (Test
Element Group; hereinafter, referred to as “TEG”. ) Is often used. In the indirect evaluation using the TEG, a TEG that reproduces an actual semiconductor element as much as possible is formed on a wafer at the same time as the semiconductor element, and a defect occurring in the actual semiconductor element is identified by evaluating the TEG. Things. In general,
The indirect evaluation by TEG is performed when the integration scale of the LSI is large and the defect state cannot be directly specified and observed.

[0005] For example, when the defect of the contact hole opening defect occurs at a rate of about 1%, the direct evaluation of the LSI can conclude that "the LSI defect is due to the contact hole opening defect". difficult. However, a TEG such as 1
If an evaluation pattern in which 000 contact holes are arranged in series is formed, the actual state of the contact holes of the semiconductor element becomes clear by measuring the TEG.

In other words, if a defect of a hole defect occurs in the TEG with a predetermined probability or more, it is obvious that an actual semiconductor element also has a defect of a contact hole.
It is possible to conclude that "the failure of the LSI is due to defective opening of the contact hole". As described above, the TEG has a very important meaning in failure analysis of a semiconductor device because it emphasizes a defect included in a process and provides appropriate information to a person in charge of analysis.

However, in general, even if the status of a defect (for example, disconnection or short circuit) is found, the cause of the defect is not clear. The cause of the failure cannot be found unless the actual failure location, that is, the defective portion, is physically analyzed. That is, in the indirect evaluation of the semiconductor device by TEG, as the next step in which the defect status is found, for example, T
With respect to the EG, it is necessary to specify the position where the defect causing the defect occurs.

Heretofore, methods often used to identify defect positions include (a) a heat spot method using a liquid crystal (hereinafter, referred to as a "liquid crystal method"), (b) a photo emission method, and (c) light. Induced current (Optical Beam)
Induced Current: "OBI
C ". ) There is a law. Next, the features of each of these conventional defect position identification methods will be briefly described.

(A) Liquid crystal method In the liquid crystal method, when a defect position is in a high resistance state and generates heat, a phase transition caused by heat of the liquid crystal is detected by a polarizing plate to specify the defect position. In other words, the liquid crystal analysis method uses a faulty IC
A liquid crystal is applied to the substrate and a current is applied to detect an abnormal heat generation due to a leak current or the like. Specifically, when the applied liquid crystal is kept at a temperature just below the phase transition temperature and energized, only the leaked part exceeds the phase transition temperature due to heat generation, and only the liquid crystal on the leaked part has a different molecular arrangement from the surroundings, causing light The transmittance changes, and the defect position can be specified on the microscope image.

The present method is generally used in an early stage of analysis because it can be implemented with a device having a simple configuration. On the other hand, this method is weak in identifying minute regions, and cannot be applied to a case where a defect position hardly generates heat or a problem that the entire semiconductor layer generates heat.

(B) Photo Emission Method The photo emission method is a method of counting the number of photons generated when a current is applied to a defective portion, and specifying a high resistance region or a region where a large amount of recombination occurs. is there. Specifically, first, the minute light emission of a minute part on the IC chip is detected and imaged by a high-sensitivity photo-counting camera through an optical microscope, and then the detected minute light emission is taken into an image processor. Is performed, the image is displayed on a monitor, and the light emitting portion is specified by superimposing the image on an optical microscope image.

According to the present method, a minute area can be specified.
It is often used because work is relatively easy. On the other hand, this method requires a current of a certain amount or more to flow for position identification, and is not suitable for analysis of a small current, and requires the use of a large-scale device.

(C) OBIC method In the OBIC method, fluctuations in OBIC generated in a semiconductor layer by irradiating a laser beam are amplified by an amplifier, and for example, a recombination occurrence state and a difference generated in photovoltaic power are detected. , To specify the defect position. That is, in the OBIC method,
First, electron-hole pairs are generated in the semiconductor layer by laser light irradiation, the carriers (electrons and holes) are drifted by an internal electric field, detected as OBIC, and are further associated with the laser light irradiation position. A defect position is specified by detecting a change in OBIC.

According to the present method, since a minute current change can be detected, a large current is not required, and a minute area can be specified. On the other hand, this method requires technical proficiency in the work, and the configuration of the device is not simple.

Further, after the defect position is specified, the defect position is determined, for example, by using a scanning electron microscope (Scanning).
Electron Microscope (SEM)
And transmission electron microscope (Transmission El)
By performing shape observation using an electron microscope (TEM) or the like, or performing composition analysis using an X-ray spectroscopy (EDX) or the like, the state of a defect can be assumed, and it is a foothold for improvement.

[0016]

As described above, as described above,
Determining the position of a defect is very important in the evaluation of a semiconductor device, but often involves difficulties in operation. In particular, since the three defect position identification methods exemplified above are all planar observation methods from the silicon wafer surface,
Information on the defect position in the depth direction cannot be obtained.

In recent semiconductor devices, there is a strong tendency to suppress the spread in the planar direction and to form an element structure extending in the depth direction in order to improve the degree of integration. As a characteristic feature, a device isolation technology using a trench structure, which has been widely used recently as a device isolation technology, can be cited. For example, in a semiconductor device having a trench structure with a depth of about 6 μm or less, consider a case where a current leak occurs in an element isolation region.

Conventionally, the location of the occurrence of such a leak is specified from planar positional information on a wafer, the cause of the occurrence of the leak at that position is assumed, and a countermeasure experiment is performed for several cycles to find a method and a cause of the leak. Had gone.

Conventionally, the position information of a defect in the depth direction is obtained by cleaving a sample or grinding it by FIB, and then examining the cross section by SEM / SIM (Scanning Ion Micron).
oscopy) or the like has been frequently used.

However, according to the method of observing the defect position information in the depth direction described above, only the information of the position having a metal abnormality can be obtained. Therefore, it is not possible to specify a position where a leak current occurs due to a crystal defect or the like.
Since it is a destructive test, the sample cannot be reused. In addition, it is very difficult to cleave or grind the cross section of the sample by specifying the observation position, which requires a skilled technique.

Furthermore, under the present circumstances, it is also difficult to specify the crystal defect generation position by TEM after the cross section grinding by FIB similarly in terms of technical and time. As described above, in the conventional semiconductor evaluation method, when a defect exists in a semiconductor substrate, it is difficult to specify the position of the defect in the depth direction.

The present invention has been made in view of the above-mentioned problems of the conventional semiconductor evaluation method, and provides position information in the depth direction of a defect position without cutting the sample. It is an object of the present invention to provide a new and improved semiconductor evaluation method and a defect position specifying device capable of three-dimensionally specifying a semiconductor device.

[0023]

According to a first aspect of the present invention, there is provided a semiconductor evaluation method including a defect position specifying step of specifying a defect position generated in a predetermined semiconductor layer in an evaluation target. In the method, the defect position specifying step includes a first step of irradiating the semiconductor layer with the first light while moving the irradiation position, and detecting a relationship between the irradiation position of the first light and the photoelectromotive force generated in the semiconductor layer. A step of irradiating the semiconductor layer with second light having a predetermined inclination with respect to the first light while moving the irradiation position to determine the relationship between the irradiation position of the second light and the photoelectromotive force generated in the semiconductor layer. A configuration including a second step of detecting, and a third step of specifying a defect position in the semiconductor layer from the relationship detected in the first step and the relationship detected in the second step is employed.

According to the first aspect of the present invention having the above-described structure, three-dimensional identification of a defect position in a semiconductor layer can be realized by combining a basic principle of spatial geometry with a relationship between a defect and photovoltaic power. . In general, in a semiconductor layer, a local level is generated at a defect portion, and thus recombination is promoted near a defect. Therefore, the optical path of the irradiation light when passing through the defect position can be specified by the relationship between the irradiation position of the irradiation light on the semiconductor layer and the photoelectromotive force. On the other hand, according to the basic principle of space geometry, any straight line in the three-dimensional space can be specified by the slope of the straight line and one point in the space through which the straight line passes, and any straight line in the three-dimensional space can be specified. A point can be specified as an intersection of two non-parallel straight lines passing through the point.

According to the first aspect of the present invention, the first and the second
In the step (3), the relationship between the irradiation position and the photoelectromotive force is detected for each of the non-parallel first light and second light. Therefore, by analyzing the relationship between the two detected,
The optical path of the first light passing through the defect position and the optical path of the second light passing through the defect position can be specified. Further, if the basic principle of the spatial geometry is used, the defect position is defined as the intersection of the specified first light path and the specified second light path.
Dimensionally specified.

As described above, according to the first aspect of the present invention, the defect position can be specified three-dimensionally without cutting the sample to be evaluated, and the position information in the depth direction of the defect generated in the semiconductor layer can be specified. Is provided. According to the first aspect of the present invention, the semiconductor layer is further irradiated with one or more lights forming a predetermined angle with the first light and the second light, and the irradiation position of the light and the semiconductor layer are irradiated on the semiconductor layer. By detecting the relationship with the generated photovoltaic power, it is possible to improve the accuracy of specifying the defect position.

According to a second aspect of the present invention, the object to be evaluated further includes another semiconductor layer having a first polarity and joined to the semiconductor layer, wherein the semiconductor layer has the first polarity. A configuration having a second polarity of the opposite polarity is employed. In the invention according to claim 2 having such a configuration, a pn junction structure is formed by the semiconductor layer and another semiconductor layer.

Therefore, when a reverse bias is applied to the junction structure to form a depletion layer having a predetermined width at the junction, carriers generated in the depletion layer by light irradiation travel (drift) due to the internal electric field, and the diffusion current is reduced. appear. As a result, outside the evaluation target, the OBIC can be detected as photovoltaic power generated in the semiconductor layer. According to the first aspect of the present invention, another junction structure including a semiconductor layer, for example,
Even if a configuration in which an in-junction is formed in the evaluation target is adopted, the photocurrent can be detected outside the evaluation target.

Next, the invention according to claim 3 employs a configuration in which the group of the irradiation positions of the first light and the group of the irradiation positions of the second light are substantially the same. According to the third aspect of the present invention having such a configuration, in each of the first step and the second step, the relationship between the irradiation position and the photocurrent is determined under the condition that the range of the irradiation position is substantially the same. Can be detected. Therefore, in the third step, highly reliable defect position identification can be efficiently realized.

In the first or second aspect of the present invention, the group of the irradiation positions of the first light and the group of the irradiation positions of the second light are each of the irradiation light (the first light or the second light). 2 light.)
In the range including the irradiation position when the laser passes through the defect position,
It is only necessary that they overlap. Therefore, the relationship between the group of the irradiation positions of the first light and the group of the irradiation positions of the second light may be various other relationships, for example, a relationship in which one includes the other, a relationship in which only a part overlaps, or most overlaps. A relationship where parts do not overlap may be used. Further, in the first to third aspects, the group of the two irradiation positions may be one in which the irradiation positions are continuous or intermittent.

Next, the invention according to claim 4 employs a configuration in which the object to be evaluated is a wafer and the semiconductor layer has an exposed surface exposed on the surface of the wafer. According to the fourth aspect of the present invention having such a configuration, in a semiconductor device manufacturing process, it is possible to perform a collective evaluation of a wafer before each semiconductor device is formed into chips. Therefore, it is possible to efficiently evaluate the semiconductor device.

In the invention according to claim 4,
In consideration of the transmission distance of irradiation light in the semiconductor layer, light scattering on the cleavage plane, and the like, it is preferable that the exposed surface be irradiated with the first light and the second light. However, in the inventions described in claims 1 to 4, a configuration in which the irradiation light is irradiated from a portion other than the exposed surface of the semiconductor layer is also possible. In the inventions described in claims 1 to 3,
Other than the wafer, for example, a semiconductor element or a semiconductor device after chipping can be applied.

Further, in the invention described in claim 4, it is preferable that the semiconductor layer is set in the TEG formed on the wafer. This is because in the TEG, it is easy to suppress the influence on the photovoltaic power due to causes other than the defect. On the other hand, in an actual semiconductor device, the photovoltaic effect is likely to be affected by other factors such as difficulty in equalizing a depletion layer generated in a semiconductor layer due to an applied bias or a circuit structure.

Here, with respect to the irradiation angle of the irradiation light, according to the invention described in claim 5, one of the first light and the second light is irradiated substantially perpendicularly to the exposed surface. Configuration can be adopted.

According to a sixth aspect of the present invention, there is provided a defect position specifying apparatus for specifying a defect position generated in a predetermined semiconductor layer in an evaluation object, wherein the irradiation position is moved. A first light irradiating function of irradiating the semiconductor layer with the first light while causing the second layer to irradiate the semiconductor layer with a second light having a predetermined inclination with respect to the first light while moving the irradiation position. A configuration having a light irradiation function and a detection function of detecting a photoelectromotive force generated in the semiconductor layer is employed.

According to the sixth aspect of the present invention having such a configuration, it is possible to irradiate light at mutually different irradiation angles by the two light irradiation functions (the first light irradiation function and the second light irradiation function). it can. Further, in the invention according to claim 6, for each light irradiation, the relation between the photoelectromotive force generated in the semiconductor layer and the irradiation position can be detected by the detecting means. Therefore, according to the invention of claim 6, it is possible to three-dimensionally specify a defect position through analysis of the relationship between the irradiation position and the photoelectromotive force.

According to the present invention, the first light irradiation means having the first light irradiation function, the second light irradiation means having the second light irradiation function, and the semiconductor layer are provided. And a detecting means for detecting the photovoltaic force generated in the above. Further, light irradiation means for irradiating the semiconductor layer with light while moving the irradiation position, irradiation angle adjustment means for adjusting the irradiation angle of the light irradiation means, and detection means for detecting a photoelectromotive force generated in the semiconductor layer are provided. It is also possible to adopt a configuration provided.

Further, in the invention according to claim 6,
The adjustment of the irradiation angle by the irradiation angle adjusting means may employ either a configuration in which the semiconductor layer is moved or a configuration in which the light irradiation means is moved. As a configuration to move the semiconductor layer,
In order to hold and fix the evaluation object, for example, a configuration using a movable wafer holding means such as a swingable mounting table or a swingable arm can be adopted. As a configuration for moving the light irradiation unit, for example, a configuration in which a light irradiation unit including an optical system including a mirror whose angle can be adjusted, a light irradiation unit including a light source whose angle can be adjusted, or the like can be used. .

In the invention according to claim 6,
The object to be evaluated is a wafer, the semiconductor layer has an exposed surface exposed on the surface of the wafer, and a configuration including a wafer holding means for holding and fixing the wafer such that the exposed surface faces the light irradiation means can be adopted. .

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. In the following description and the accompanying drawings, components having the same function and configuration are denoted by the same reference numerals, and redundant description is omitted.

(1) Semiconductor Evaluation Method First, an outline of a semiconductor evaluation method 100 according to the present embodiment will be described with reference to FIG. Here, FIG. 1 is a flowchart (flow chart) of the semiconductor evaluation method 100 according to the present embodiment.

In the semiconductor evaluation method 100, a failure status detection step 110, a defect position identification step 120, and a failure cause analysis step 130 are sequentially performed. In the semiconductor evaluation method 100, in a failure status detection step 110, a failure mode occurring in an LSI is detected by indirect evaluation using, for example, TEG.

Defect position specifying step 1 according to the present embodiment
In 20, as a stage before analyzing the cause of the defect, for example, a defect position is specified for a predetermined observation sample such as a TEG having a defect or an actual semiconductor element. In such a defect position specifying step 120, a first OBIC step 122 corresponding to the first step and a second OBIC step 122 corresponding to the second step are performed.
IC step 124 and analysis step 126 corresponding to the third step
Is performed.

In the failure cause analysis step 130, the failure cause is analyzed for the object to be evaluated, for example, an LSI, through physical observation of the defect position specified in the defect position specification step 120 and analysis of the defect.

(Defect Position Identification Step 120) Next, the defect position identification step 120 according to the present embodiment will be described with reference to FIG.
4 to 4, a detailed description will be given with an example of specifying the position of the defect 9 in the observation sample 1. FIG. 2 shows the irradiation of the laser beam and the OBI in the defect position specifying step 120.
It is explanatory drawing about the relationship with C. FIG. 3 is an explanatory diagram of the first OBIC step 122, and FIG.
Is an explanatory diagram of a second OBIC step 124. FIG.

As shown in FIG. 2, the observation sample 1 has a first conductivity type semiconductor substrate 3, a second conductivity type diffusion layer 5 laminated on the semiconductor substrate 3, and an observation surface which is an exposed surface of the diffusion layer 5. And 7. In the observation sample 1, a defect 9 is generated in the diffusion layer 5. In the following description, it is assumed that the defect 9 promotes recombination such as a crystal defect or a high-concentration defect having a high impurity concentration. However, those skilled in the art can easily understand that the present embodiment can be applied to the case where the defect 9 is a defect that suppresses recombination such as a low-concentration impurity concentration defect. is there.

In the defect position specifying step 120, the observation sample 1 is subjected to the OB through a pair of extraction electrodes composed of the first electrode 13 of the semiconductor substrate 3 and the second electrode 15 of the diffusion layer 5.
The input side of the OBIC amplifier 11 for amplifying the IC is connected. Further, in the defect position specifying step 120, the OBI
The output side of the C amplifier 11 is connected to the input side of an amplified current detection device 21 for detecting the amplified current of the OBIC by the OBIC amplifier 11. Furthermore, the defect position detection step 1
At 20, a reverse bias is applied to the observation sample 1, and a depletion layer 19 is formed near the junction 17 between the semiconductor substrate 3 and the diffusion layer 5.

When the observation surface 7 of the observation sample 1 configured as described above is irradiated with the laser light P, the diffusion layer 5
Electron-hole pairs are generated by excitation by the light energy of the laser light P. Normally, recombination is unlikely to occur in the depletion layer, and such electrons and holes travel due to an internal electric field generated near the junction 17 between the semiconductor substrate 3 and the diffusion layer 5. As a result, in the observation sample 1, OBIC, which is a diffusion current of an electron-hole pair, is generated.

The OBIC is input to the OBIC amplifier 11 via the first electrode 13 and the second electrode 15. OB
In the IC amplifier 11, the input OBIC is amplified and output as an amplified current. As a result, through the detection of the amplified current by the amplified current detector 21, the irradiation position of the laser beam P on the observation surface 7 and the OBIC generated in the diffusion layer 5
Is detected.

Incidentally, recombination is more likely to occur near the defect 9 than in other regions in the depletion layer 19. Therefore,
When the defect 9 exists on the optical path of the laser light P, compared with the case where the defect 9 does not exist on the optical path of the laser light P,
The generated OBIC and amplified current are reduced. As a result, the irradiation position of the laser light P when the defect 9 exists on the optical path can be specified. In the defect position detecting step 120, an appropriate laser can be applied as a light source of the laser light P in consideration of a transmission distance to the diffusion layer 5 and reflection characteristics. Known lasers include, for example, HeNe
There are a gas laser such as a laser and an Ar laser, a solid laser such as a YAG laser and a glass laser, a liquid laser such as a dye laser, and a semiconductor laser such as GaAs and InP.

(First OBIC Step 122) Next, the first OBIC step 122, which is one of the steps performed in the defect position specifying step 120, is performed.
The BIC process 122 is described with reference to FIGS.
This will be described with reference to (d)).

FIG. 3A shows a first OBIC process 12.
2 shows a schematic sectional view of the observation sample 1 in FIG. FIG.
As shown in (a), in the first OBIC step 122,
The laser light P1 is applied to the observation surface 7 almost vertically from above the observation sample 1 (diffusion layer 5 side). Therefore, the first
In the OBIC step 122, when the laser light P1 is irradiated on the observation surface 7 immediately above the defect 9, the defect 9 exists on the optical path of the laser light P1. In addition, the first OB
In the IC step 122, the irradiation position of the laser beam P1 on the observation surface 7 is continuously scanned.

FIG. 3B shows a first OBIC process 12.
2 shows a schematic plan view of the observation sample 1 in FIG. FIG.
In (b), the position immediately above the defect 9 on the observation surface 7, that is, the irradiation position of the laser beam P1 when the defect 9 exists on the optical path is indicated by b1. The irradiation position b1 is set at d on the observation surface 7.
It is assumed that it exists on the 1-d2 line.

FIG. 3C is a schematic graph showing the relationship between the irradiation position of the laser beam P1 and the OBIC when the irradiation position of the laser beam P1 moves on the line d1-d2. As shown in FIG. 3C, the laser beam P1
1, the laser beam P1 is d1-d.
The detected OBIC is smaller than in the case where the light is irradiated on other than b1 on the two lines. This is because when the area where the defect 9 exists is irradiated with the laser beam P1, the defect 9
This is because many electrons recombine due to the electron-hole pairs excited by the light energy of the laser beam P1.

FIG. 3D shows the first OBIC process 12.
The image of the contrast of the OBIC detected in 2 is shown by the light luminance for each irradiation position of the laser beam P1 on the observation surface 7. As a result, by the first OBIC step 122,
One planar position information on the position of the defect 9 can be obtained.

When the first OBIC step 122 described above is completed, planar position information can be obtained on the position where the defect 9 is generated, as shown in FIG. 3B. However, at this time, regarding the position where the defect 9 occurs,
It is not possible to obtain position information in the depth direction.

(Second OBIC Step 124) Next, the second OBIC step 124 which is another step included in the defect position specifying step 120
The BIC process 124 is described with reference to FIGS.
This will be described with reference to (d)).

FIG. 4A shows a second OBIC process 12.
4 shows a schematic cross-sectional view of the observation sample 1. FIG.
As shown in (a), in the second OBIC step 124,
The laser beam P2 is applied to the observation surface 7 from above the observation sample 1 (diffusion layer 5 side) at a predetermined irradiation angle θ that is not perpendicular. Therefore, in the second OBIC step 124, the irradiation position of the laser beam P2 when the defect 9 exists on the optical path is not directly above the defect 9. In the second OBIC step 124, similarly to the first OBIC step 124, the irradiation position of the laser beam P2 on the observation surface 7 is continuously scanned.

FIG. 4B shows a second OBIC process 12.
4 shows a schematic plan view of the observation sample 1 in FIG. FIG.
In (b), the irradiation position of the laser beam P2 when the defect 9 exists on the optical path is indicated by b2. The b2 corresponds to the observation surface 7
On the d1′-d2 ′ line.

FIG. 4C is a schematic graph showing the relationship between the irradiation position of the laser beam P2 and the OBIC when the irradiation position of the laser beam P2 moves on the line d1'-d2 '. Show. As shown in FIG.
When the irradiation position of No. 2 is b2, the detected OBIC is smaller than in the case where the irradiation position of the laser beam P2 is other than b2 on the d1′-d2 ′ line. This is because, when the region where the defect 9 is present is irradiated with the laser beam P2, many of the electron-hole pairs excited by the light energy of the laser beam P2 recombine due to the presence of the defect 9. This is because

FIG. 4D shows the second OBIC process 12.
The image of the contrast of the OBIC detected at 4 is indicated by the light luminance at each irradiation position of the laser beam P2 on the observation surface 7. As a result, in the second OBIC step 124, for the position of the defect 9, planar position information different from that obtained in the first OBIC step 122 can be obtained.

(1-3) Analysis Step 126 Next, the analysis step 126 will be described with reference to FIG. In the analysis step 126, the first OBIC
Irradiation position bl detected in step 122 and second OBIC
From the irradiation position b2 detected in step 124, FIG.
The depth c at which the defect 9 actually exists as shown in (a) is analytically detected. Specifically, the depth c of the defect 9 is c = b ×
tan θ. Here, b represents the distance between the position b1 and the position b2 as shown in FIG.

As described above, in the analysis step 126, the first
From the planar position information of the defect 9 separately detected in the OBIC step 122 and the second OBIC step 124, position information in the depth direction of the position where the defect 9 occurs can be obtained.
As a result, in the defect position specifying step 120, the defect position 9
Is three-dimensionally specified.

(2) Defect Position Specifying Apparatus Next, a configuration example of the defect position specifying apparatus according to the present embodiment will be described with reference to FIGS. Here, FIG. 5 is a schematic configuration explanatory view of a defect position specifying device 20 which is one device according to the present embodiment, and FIG.
1 is a schematic configuration diagram of a defect position specifying device 30 which is another device according to the present embodiment. The defect position specifying apparatus according to the present embodiment is an apparatus applicable to the defect position specifying step 126 of the semiconductor evaluation method according to the present embodiment.

As shown in FIG. 5, the defect position specifying device 20
Includes a mounting table 24 on which a wafer 40 is mounted, and a laser irradiator 22 which irradiates a laser beam while scanning an irradiation position on an observation surface 42 of the wafer 40. In the defect position specifying device 20, the laser irradiator 22 can adjust the irradiation angle of the laser light to the wafer 40 by changing the output angle of the laser light.

The laser irradiator 22 includes, for example, a structure in which one laser light source and an optical system for adjusting the traveling direction of the laser light output from the laser light source are installed, or two laser light sources arranged at different angles. This can be realized by a configuration including a light source inside. The optical system that adjusts the traveling direction of the laser beam can be easily realized by using various optical phenomena such as reflection, refraction, diffraction, and interference.

As shown in FIG. 6, the defect position specifying device 30 includes a mounting table 34 on which the wafer 40 is mounted and a laser irradiation for irradiating a laser beam while scanning the irradiation position on the observation surface 42 of the wafer 40. And a vessel 32. In the defect position specifying device 30, the mounting table 34 is configured to be swingable. That is, in the defect position specifying device 30, the irradiation angle of the laser beam to the wafer 40 can be adjusted by the swinging operation of the mounting table.

As described above, in the present embodiment,
By irradiating the observation surface of the observation sample with a laser beam at an irradiation angle of 2 (substantially perpendicular and an irradiation angle θ), 2 planar information (information on the observation surface) of the defect position is detected. Furthermore, in the present embodiment, information on the defect position in the depth direction can be obtained by analyzing the two planar information. As a result, according to the present embodiment, since the depth position of the defect can be specified by the nondestructive test, the evaluation of the semiconductor device with greatly improved efficiency can be realized.

Although the preferred embodiment according to the present invention has been described above, the present invention is not limited to such a configuration.
A person skilled in the art can envisage various modified examples and modified examples within the scope of the technical idea described in the claims, and these modified examples and modified examples are also included in the technical scope of the present invention. It is understood to be included.

[0070]

According to the present invention, the three-dimensional location of a defect generated in a semiconductor layer can be easily performed without using a destructive test. Therefore, the present invention can be easily applied to a semiconductor device having a three-dimensional structure for high integration by using, for example, an element isolation technique using a trench structure. As a result, according to the present invention, the inspection efficiency of a semiconductor device such as an LSI is greatly increased.

[Brief description of the drawings]

FIG. 1 is a flowchart of a semiconductor evaluation method to which the present invention can be applied.

FIG. 2 is an explanatory diagram of a defect position specifying step of the semiconductor evaluation method shown in FIG.

FIG. 3 is a first OBIC in a defect position specifying step shown in FIG. 2;
It is explanatory drawing about a process.

FIG. 4 is a second OBIC in the defect position specifying step shown in FIG. 2;
It is explanatory drawing about a process.

FIG. 5 is a schematic structural explanatory view of one defect position specifying device to which the present invention can be applied.

FIG. 6 is a schematic structural explanatory view of another defect position specifying device to which the present invention can be applied.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Observation sample 5 Diffusion layer 9 Defect 20,30 Defect position specifying device 100 Semiconductor evaluation device 120 Defect position specifying process 122,124 OBIC process 126 Analysis process P, P1, P2 Laser beam

Claims (6)

[Claims] 1. A semiconductor evaluation method, comprising: a defect position specifying step of specifying a defect position occurring in a predetermined semiconductor layer in an evaluation target; wherein the defect position specifying step includes: Irradiating the semiconductor layer with the first light and detecting a relationship between an irradiation position of the first light and a photoelectromotive force generated in the semiconductor layer; a first step; Irradiating the semiconductor layer with second light having a predetermined inclination with respect to the second light, and detecting the relationship between the irradiation position of the second light and the photoelectromotive force generated in the semiconductor layer.
And the relation detected in the first step and the second step.
A third step of specifying the defect position of the semiconductor layer from the relationship detected in the step (b). 2. The evaluation object further includes another semiconductor layer having a first polarity and joined to the semiconductor layer; wherein the semiconductor layer has a second polarity opposite to the first polarity. 2. The semiconductor evaluation method according to claim 1, wherein the semiconductor evaluation method has polarity. 3. A group of irradiation positions of said first light and said second light
The semiconductor evaluation method according to claim 1, wherein the group of light irradiation positions is substantially the same. 4. The semiconductor device according to claim 1, wherein the object to be evaluated is a wafer; and the semiconductor layer has an exposed surface exposed on a surface of the wafer. Semiconductor evaluation method. 5. The method according to claim 1, wherein one of the first light and the second light is emitted substantially perpendicularly to the exposed surface. 5. The semiconductor evaluation method according to any one of 4. 6. A defect position specifying device for specifying a defect position generated in a predetermined semiconductor layer in an evaluation object, wherein the first light is applied to the semiconductor layer while moving an irradiation position. A light irradiation function, a second light irradiation function of irradiating the semiconductor layer with a second light having a predetermined inclination with respect to the first light while moving the irradiation position, and a photovoltaic force generated in the semiconductor layer And a detection function for detecting a defect.