JP2000195801A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the in-plane evenness of silicon doping by a method wherein a specified raw material and an organic amino silane raw material obtained by substituting a part of the hydrogen group of this specified raw material for an amino group are at the same time used as a silicon raw material for doping to a compound semiconductor layer. SOLUTION: An organic amino silane raw material obtained by substituting a part of the hydrogen group of SiH4 or Si2H6 for an amino group and the SiH4 or the Si2H6 are at the same time used as silicon doping gas. Since the energy, which is required for decomposing the organic amino silane raw material is small, the amino silane raw material is decomposed at a low temperature. Therefore, when the amino silane raw material is used as a silicon dopant raw material, the doping concentration tends to become high in the peripheral part of a wafer, while since the decomposition temperature of SiH4 or of Si2H6 is high, the doping concentration in the peripheral part of the wafer is easy to reduce. Thereby, by simultaneously using both the raw material gases of the organic amino silane raw material gas and the SiH4 or Si2H6 raw material gas, a uniform silicon doping becomes possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device in which a silicon-doped compound semiconductor layer is formed.

[0002]

2. Description of the Related Art Group III-V compound semiconductor materials such as GaAs have a characteristic band structure in which the effective mass of electrons is small, and are used in high electron mobility transistors (HEs).
MT: High Electron Mobility Transistor and HET: Hot Electron Tra
(HBT: Hetero-Bipolar Transistor) or a high-speed semiconductor device such as a heterojunction bipolar transistor (HBT). Some of these compound semiconductor materials have a direct transition type band structure, and are applied to optical semiconductor devices such as laser diodes.

In semiconductor devices using these compound semiconductor materials, an epitaxial film obtained by laminating a number of layers having different compositions and doping characteristics on a compound semiconductor substrate has been increasingly used. Metal-organic vapor phase epitaxy (MOVPE) with excellent controllability of each layer and realization of steep interface to realize higher performance devices
The method is widely used for forming such an epitaxial film.

High-speed compound semiconductor devices such as HEMT and HBT
Conventionally, an AlGaAs layer is used as an electron supply layer or an emitter layer.
However, in recent years, InGa which can be further improved in performance has been used.
P layers are being used. To the InGaP layer
As an n-type dopant, a device substrate during or after growth can be used.
Si that is difficult to diffuse in process
You. In film formation using the MOVPE method, a dopant is used.
Generally, Si is used as a raw material. _TwoH₆Or SiH_FourIs used
ing.

[0005]

However, InG
P-type compound semiconductors such as aP are made of Si ₂ H ₆ or Si
In the case of doping Si with H ₄ , if the conditions are optimized so that the doping concentration becomes uniform with respect to an As-based compound semiconductor such as GaAs, the conditions are parallel to the wafer as in a horizontal or barrel type furnace. In a furnace in which the raw material gas flows, the concentration tends to greatly decrease in the peripheral portion of the wafer.

On the other hand, Japanese Patent Application Laid-Open No. 7-321041 discloses that the doping concentration of InGaP can be made uniform by using a raw material having a low decomposition temperature such as phenylsilane, but a horizontal or barrel type furnace is required. When it is used, the decomposition temperature is low, and the concentration in the peripheral part tends to be rather high. Conversely, when the conditions are optimized for the P-based compound semiconductor, the in-plane distribution of the As-based compound semiconductor deteriorates.

As described above, when compound semiconductor layers having different group V elements are continuously formed, it is difficult to make the in-plane distribution of doping of these compound semiconductor layers uniform.
For this reason, when a device was created, the device characteristics sometimes varied greatly within the wafer surface. An object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving in-plane uniformity of Si doping in each layer when forming compound semiconductor layers having different group V elements.

[0008]

The object of the present invention is to provide a method of manufacturing a semiconductor device in which a compound semiconductor layer doped with silicon is formed, wherein SiH ₄ or Si ₂ H is used as a silicon raw material for doping the compound semiconductor layer. ₆ and Si
This is achieved by a method for manufacturing a semiconductor device, wherein an organic aminosilane-based raw material in which a part of hydrogen groups of H ₄ or Si ₂ H ₆ is substituted with an amino group is used at the same time.

Further, in the above method for manufacturing a semiconductor device,
As the organic aminosilane-based raw material, SiH_Two
[NR_Two]_Two, SiH_Two[NHR] [NR_Two] Or SiH_Three
[NR _Two(Where R is alkane, alkene, alk
NR, allyl or aryl, NR_TwoThe group is NH_Two, N
Including HR. ) Can be applied. Ma
Further, in the above-described method for manufacturing a semiconductor device,
As the minosilane-based raw material, Si_TwoH_Two[NR_Two]_Four, S
i_TwoH_Three[NR_Two]_ThreeOr Si_TwoH_Four[NR_Two]_Two(However, R is
Alkane, alkene, alkyne, allyl or aryl
NR_TwoThe group is NH_Two, NHR. )
Can be applied.

In the above-described method of manufacturing a semiconductor device, the compound semiconductor layer may be formed by a metal organic chemical vapor deposition method. Further, in the above method of manufacturing a semiconductor device, the compound semiconductor layer may be formed by a growth furnace in which the silicon material flows substantially parallel to a wafer on which the compound semiconductor layer is grown.

In the method of manufacturing a semiconductor device, a horizontal growth furnace can be used as the growth furnace. In the above-described method for manufacturing a semiconductor device, a barrel-type growth furnace can be used as the growth furnace. In the above method for manufacturing a semiconductor device, the compound semiconductor layer may be made of GaAs, AlA
s, InAs, GaP, AlP, GaSb, AlSb,
InSb, GaN, AlN, InN, or a mixed crystal thereof can be used.

Further, the above object is to dope silicon.
Raw material for SiH _FourOr Si_TwoH₆
Alternatively, using an organic aminosilane-based material, the first compound
A step of forming a conductor layer and a step of doping silicon.
SiH as a silicon raw material _FourOr Si_TwoH₆And organic
Using the minosilane-based raw material together with the first compound
A second compound semiconductor layer different from the semiconductor layer in a group V element
Forming a semiconductor device.
This is also achieved by a manufacturing method.

In the above method for manufacturing a semiconductor device, the temperature at which the first compound semiconductor layer is grown may be substantially equal to the temperature at which the second compound semiconductor layer is formed.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [Principle of the Present Invention]
The manufacturing method of the conductor device is SiH_FourAnd Si_TwoH₆Of the hydrogen radical
Raw materials partially substituted with amino groups (hereinafter referred to as organic aminosila
SiH) _FourOr Si_TwoH₆And
Simultaneous use as doping gas for silicon
There are features.

The organic aminosilane-based raw material requires less energy for decomposition, and therefore decomposes at a lower temperature. For this reason, when an organic aminosilane-based material is used as a Si dopant material in a horizontal furnace or a barrel-type furnace, the doping concentration tends to increase in the peripheral portion of the wafer. On the other hand, since SiH ₄ and Si ₂ H ₆ have a high decomposition temperature, the concentration at the peripheral portion of the wafer tends to decrease.
Therefore, by simultaneously using the source gases having such characteristics and appropriately optimizing the flow rates thereof, it is possible to eliminate the disadvantages of the two and to perform uniform Si doping.

Further, as described above, P such as InGaP
When doping Si using Si ₂ H ₆ or SiH ₄ to a system compound semiconductor, optimizing the conditions so that the doping concentration becomes uniform with respect to GaAs, the wafer can be treated like a horizontal or barrel type furnace. On the other hand, in a furnace in which the source gas flows in parallel, the concentration tends to decrease near the wafer. However, when an organic aminosilane-based material is further added as a Si dopant material during the film formation of InGaP and its concentration is appropriately controlled, the doping concentration is increased in the peripheral portion of the wafer by the effect of the organic aminosilane-based material, and as a result, InGaP Uniform doping can also be achieved for the layers.

Therefore, a certain semiconductor layer (for example, GaAs)
The s layer is doped with SiH ₄ or Si ₂ H _{6 under the} condition that uniformity can be obtained.
Si of a semiconductor layer (for example, InGaP layer) having a different group element
If the doping is performed using a mixed gas of SiH ₄ or Si ₂ H ₆ and an organic aminosilane-based material, V can be changed only by changing the flow rate of the supplied material gas without changing the growth temperature of each semiconductor layer. Uniform Si doping can be realized for both semiconductor layers having different elements.

Conversely, a certain semiconductor layer (eg, G
The Si doping of the aAs layer) is performed under the condition that uniformity can be obtained using an organic aminosilane-based material, and the Si doping of a semiconductor layer (for example, an InGaP layer) having a different Group V element is performed by combining the organic aminosilane-based material with SiH. ₄ or a mixed gas with Si ₂ H ₆ ,
Uniform Si doping can be realized for both semiconductor layers having different Group V elements only by changing the flow rate of the supplied source gas without changing the growth temperature of each semiconductor layer.

Examples of the organic aminosilane-based material applicable to the present invention include, for example, SiH ₂ [NR ₂ ] ₂ -based material,
SiH ₂ [NHR] [NR ₂ ] -based raw material, SiH ₃ [N
R ₂ ] type raw material, Si ₂ H ₂ [NR ₂ ] ₄ type raw material, Si ₂ H
₃ [NR ₂ ] ₃ type raw material or Si ₂ H ₄ [NR ₂ ] ₂ type raw material can be used. Note that R represents an organic group such as an alkane, alkene, alkyne, allyl, and aryl.
NR ₂ groups include NH ₂ or NHR.

More specifically, an alkane is used as R.
SiH_Two[NR_Two]_TwoThe raw material of the system is SiH_Two[NH
_Two]_TwoBisaminosilane represented by SiH_Two[NH (C
H_Three)]_Two Bismethylaminosilane, SiH_Two
[NH (C_TwoH_Five)]_TwoBisethylaminosila represented by
, SiH_Two[NH (C_ThreeH₇)]_TwoBispropi shown by
Luminosilane, SiH_Two[NH (C_FourH₉)]_TwoIndicated by
Bisbutylaminosilane, SiH_Two[N (CH_Three)_Two]_Two
Bisdimethylaminosilane represented by the formula: SiH _Two[N
(C_TwoH_Five)_Two]_TwoA bisdiethylaminosilane represented by
SiH_Two[N (C_ThreeH₇)_Two]_TwoBispropyl alcohol represented by
Minosilane, bisdiisopropylaminosilane, SiH
_Two[N (C_FourH₉)_Two]_TwoBisdibutylaminosi represented by
Orchid, bisdiisobutylaminosilane or bisditercia
Libutylaminosilane or the like can be applied.

Further, SiH ₂ using alkane as R
[NHR] [NR ₂ ] raw materials include SiH ₂ [NH
_{(CH 3)] [N (} CH 3) dimethylaminomethyl aminosilane represented by _{2], SiH 2 [NH (} C 2 H 5)]
Diethylaminoethylaminosilane represented by [N (C ₂ H ₅ ) ₂ ], SiH ₂ [NH (C ₃ H ₇ )] [N (C
₃ H ₇ ) ₂ ], dipropylaminopropylaminosilane, diisopropylaminoisopropylaminosilane, or the like.

In addition, SiH using alkane as R_Three
[NR_Two] -Based raw materials include SiH _Three[NH_Two]
Aminosilane, SiH_Three[NH (CH_Three)_Two]
Dimethylaminosilane, SiH_Three[NH (C
_TwoH_Five)_TwoDiethylaminosilane, SiH
_Three[NH (C_ThreeH₇)_TwoDipropylaminosila represented by
Or diisopropylaminosilane, SiH_Three[NH (C_Four
H₉)_TwoDibutylaminosilane and diisobuty!
Luminosilane and di-tert-butylaminosilane
Can be applied.

In addition, Si using alkane as R_TwoH_Two
[NR_Two]_FourThe raw material of the system is Si _TwoH_Two[NH_Two]_FourIndicated by
Tetrakisaminodisilane, Si_TwoH_Two[N (CH
_Three)_Two]_FourTetrakisdimethylaminodisila represented by
, Si_TwoH_Two[N (C_TwoH_Five)_Two] _FourTetrakis indicated by
Diethylaminodisilane, Si_TwoH_Two[N (C_ThreeH₇)_Two]_Four
Tetrakisdipropylaminodisilane represented by
_TwoH_Two[N (C_FourH₉)_Two]_FourTetrakis dibutyl represented by
Aminodisilane or the like can be applied.

In addition, Si using alkane as R_TwoH_Three
[NR_Two]_ThreeThe raw material of the system is Si _TwoH_Three[NH_Two]_ThreeIndicated by
Trisaminodisilane, Si_TwoH_Three[N (C
H_Three)_Two]_ThreeTrisdimethylaminodisilane represented by
Si_TwoH_Three[N (C_TwoH_Five)_Two]_ThreeTris-diethyl represented by
Aminodisilane, Si_TwoH_Three[N (C_ThreeH₇)_Two]_ThreeIndicated by
Trisdipropylaminodisilane, Si_TwoH_Three[N (C
_FourH₉)_Two]_ThreeTris dibutyl amino disilane represented by
Which can be applied.

In addition, Si using alkane as R_TwoH_Four
[NR_Two]_TwoThe raw material of the system is Si _TwoH_Four[NH_Two]_TwoIndicated by
Bisaminodisilane, Si_TwoH_Four[N (CH_Three)_Two]
_TwoBistrisdimethylaminodisilane represented by_Two
H_Four[N (C_TwoH_Five)_Two]_TwoBis-diethylamino represented by
Disilane, Si_TwoH_Four[N (C_ThreeH₇)_Two]_TwoScrews indicated by
Dipropylaminodisilane, Si_TwoH_Four[N (C
_FourH₉)_Two]_TwoBisdibutylaminodisilane, etc.
Can be applied.

As described above, R is an alkane
And R as alkene, alkyne, a
Organic aminosilanes using organic groups such as ril and aryl
Raw materials of the system can also be applied. [First Embodiment] A semiconductor device according to a first embodiment of the present invention
The method of manufacturing the device will be described with reference to FIGS.
FIG. 1 shows an MO used in a method of manufacturing a semiconductor device according to the present invention.
FIG. 2 is a schematic diagram of a VPE device, and FIG.
FIG. 3 is a process sectional view showing a method of manufacturing the device, and FIG._TwoH₆And Si
H_Two[N (i-C_ThreeH₇)_Two]_TwoAnd using silicon dope
The uniformity of silicon concentration in the etched InGaP layer
The graph shown in FIG. _Two[N (i-C_ThreeH₇)_Two]_TwoTo
Silicon in the InGaP layer
FIG. 5 is a graph showing the uniformity of the concentration of silicon, and FIG._TwoH₆For
Silicon in a doped silicon InGaP layer.
It is a graph which shows the uniformity of cone density.

First, the MOVPE device used in the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIG. A susceptor 14 for mounting a semiconductor substrate 12 is provided in a reaction furnace 10 for forming a compound semiconductor layer. A semiconductor substrate 12 is provided around the reactor 10.
Is provided with a lamp heater 16 for heating the lamp.

In the reactor 10, various raw material gases are supplied to the reactor 1.
A source gas supply pipe 18 for introducing into the chamber 0 and an exhaust pipe 20 for exhausting gas in the reaction furnace 10 are connected. Hydrogen gas used as a carrier gas is supplied from a hydrogen cylinder 22 and is supplied to a flow controller (hereinafter referred to as an MFC (ma
The flow is controlled to a predetermined flow rate by an ss flow controller (30) and can be introduced into the source gas supply pipe 18.

S which is a silicon material for doping
i ₂ H ₆ (disilane) is supplied from the Si ₂ H ₆ cylinder 24, and is controlled to a predetermined flow rate by the MFC 34.
It is diluted with hydrogen gas controlled to a predetermined flow rate by the FC 32 and can be introduced into the source gas supply pipe 18. PH ₃ (phosphine), which is a phosphorus material,
After being supplied from the PH ₃ cylinder 26 and controlled to a predetermined flow rate by the MFC 38, it is diluted by the hydrogen gas controlled to the predetermined flow rate by the MFC 36 and can be introduced into the source gas supply pipe 18.

AsH ₃ (arsine), which is a raw material of arsenic, is A
After being supplied from the sH ₃ cylinder 28 and controlled to a predetermined flow rate by the MFC 42, it is diluted by a hydrogen gas controlled to a predetermined flow rate by the MFC 40 and can be introduced into the source gas supply pipe 18. The gallium raw material TEG (triethyl gallium) is supplied to the raw material container 4
4, is bubbled and vaporized by a hydrogen gas whose flow rate is controlled by the MFC 46, and is introduced into the raw material gas supply pipe 18.

Similarly, the indium raw material TMI (T
(Limethylindium) is sealed in the raw material container 48.
And hydrogen gas whose flow rate is controlled by the MFC 50.
Is bubbled and vaporized and led to the raw material gas supply pipe 18.
Is to be entered. Also for doping
SiH as a silicon raw material_Two[N (i-C_ThreeH₇)_Two]
_Two(Bisdiisopropylaminosilane) in the raw material container 5
2 and the flow rate is controlled by MFC54.
Is bubbled and vaporized by the hydrogen gas
It is introduced into the supply pipe 18.

On the other hand, a vacuum pump 58 is connected to the exhaust pipe 20 via a pressure control valve 56 so that the pressure in the reactor 10 can be maintained at a predetermined pressure. A gas purifier 60 is connected to an exhaust pipe of the vacuum pump 58. Thus, the MOVPE device used in the method for manufacturing the semiconductor device according to the present embodiment is configured.

Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. In the embodiment described below, a case will be described as an example in which a non-doped GaAs layer, a silicon-doped InGaP layer, and a silicon-doped GaAs layer are sequentially deposited on a GaAs substrate. The present invention is not limited to this, and can be applied to formation of various silicon-doped compound semiconductor layers.

First, the GaAs substrate 70 is introduced into the reaction furnace 10 and placed on the susceptor 14. Next, the pressure inside the reaction furnace 10 is reduced to a predetermined pressure by the vacuum pump 58. Next, the GaAs substrate 7 is heated by the lamp heater 16.
0 is raised to a predetermined film formation temperature. The substrate temperature is, for example, 700 ° C.

Next, TEG and AsH ₃ , which are raw materials for forming a GaAs layer, are introduced into the reactor 10. For example, the flow rate of TEG is set to 1.9 × 10 ⁻⁴ mol / m.
in, the flow rate of AsH ₃ is 5.7 × 10 ⁻³ mol / min.
(V / III ratio is 30: 1) and the growth pressure is 60 Torr. Thereby, the raw material introduced into the reactor 10 is G
Thermal decomposition and reaction occur on the surface of the aAs substrate 70, and an i-GaAs layer 72 is formed on the GaAs substrate 70.
(A)).

Next, an InGaP layer is placed in the reactor 10.
TMI, TEG, PH as raw materials for forming_ThreeWhen,
A material for doping silicon into the InGaP layer
Some Si_TwoH₆And SiH_Two[N (i-C_ThreeH₇)_Two]_TwoAnd the place
Introduce at a constant flow rate. For example, the flow rate of TMI is 2.1 ×
10^-Fivemol / min, flow rate of TEG is 3.4 × 10 ^-Five
mol / min (Group III total flow rate is 5.5 × 10^-Fivemol
/ Min), PH_ThreeFlow rate of 2.2 × 10^-2mol / m
in (V / III ratio 400: 1), Si_TwoH₆The flow rate
4.4 × 10^-9mol / min, SiH_Two[N (i-C_Three
H₇)_Two]_TwoFlow rate of 1.8 × 10^-8mol / min,
The long pressure is set to 60 Torr. This introduced
The raw material thermally decomposes and reacts on the surface of the i-GaAs layer 72,
On the i-GaAs layer 72, silicon-doped n-In
A GaP layer 74 is formed (FIG. 2B).

Next, TEG and AsH ₃ , which are raw materials for forming GaAs, and Si ₂ H _6, which is a raw material for doping silicon in the GaAs layer, are placed in the reactor 10.
Are introduced at a predetermined flow rate. For example, the flow rate of TEG is 1.9 × 10 ⁻⁴ mol / min, and the flow rate of AsH ₃ is 5.
7 × 10 ⁻³ mol / min (V / III ratio is 30: 1),
The flow rate of Si ₂ H ₆ is 3.0 × 10 ⁻⁸ mol / min, and the growth pressure is 60 Torr. As a result, the raw material introduced into the reactor 10 is thermally decomposed and reacted on the surface of the InGaP layer 74, and a silicon-doped n-GaAs layer 76 is formed on the InGaP layer 74 (FIG. 2C). ).

In this manner, the i-G
aAs layer 72 and silicon-doped n-InGaP layer 74
And a silicon-doped n-GaAs layer 76 can be formed. The n-InGaP layer 7 thus formed
When the silicon concentration in No. 4 was measured, as shown in FIG. 3, the silicon concentration was almost uniform over the surface, and the variation was about 1%. Also, n-GaAs
When the silicon concentration in the layer 76 was measured, the silicon concentration was substantially uniform over the plane, and the variation was about 2%.

On the other hand, other film forming conditions except for the doping gas
Are the same and Si_TwoH₆Using only as doping gas
When an nGaP layer was formed, as shown in FIG.
Concentration at the periphery of the wafer is higher than the center of the wafer
There was a tendency. In addition, SiH _Two[N (i-C_ThreeH₇)_Two]_Two
InGaP layer was formed using only doping gas
However, as shown in FIG.
The concentration around the wafer tended to increase.

As described above, when the InGaP layer 74 is formed under the film forming conditions for ensuring the uniformity of the doping of the n-GaAs layer 76, Si ₂ H ₆ or SiH ₂ [N (i
When the n-InGaP layer 74 is formed using any one of -C ₃ H ₇ ) ₂ ] ₂ as a doping gas, the doping uniformity is deteriorated, but Si ₂ H ₆ and SiH ₂ [N (i
-C ₃ H ₇ ) ₂ ] ₂ as n-I
By forming the nGaP layer 74, the uniformity of doping could be improved.

As described above, according to the present embodiment, Si ₂ H ₆ and SiH ₂ [N
Since _{(i-C 3 H 7)} 2] using both the _2, it is possible to improve the uniformity of the doping. Therefore, by using the method of manufacturing a semiconductor device according to the present invention, the uniformity of device characteristics in a wafer surface can be improved, and the manufacturing yield can be improved.

In the above embodiment, Si ₂ H ₆ and SiH ₂ [N (i-C ₃
Although the case where H ₇ ) ₂ ] ₂ is applied is shown, the same effect can be obtained by using SiH ₄ (monosilane) instead of Si ₂ H ₆ . In addition, organic aminosilane-based raw materials are:
Not only SiH ₂ [N (i-C ₃ H ₇ ) ₂ ] ₂ but also any of the above-mentioned raw materials can be applied.

[Second Embodiment] The method for fabricating a semiconductor device according to a second embodiment of the present invention will be explained with reference to FIGS. FIG. 6 is a schematic sectional view showing the structure of the semiconductor device formed by the method for manufacturing a semiconductor device according to the present embodiment, and FIGS. 7 to 9 are process sectional views showing the method for manufacturing the semiconductor device according to the present embodiment.

In the present embodiment, a case will be described in which the method of manufacturing the semiconductor device according to the first embodiment is applied to the manufacture of a HEMT. When the thickness of each layer is uniform, the in-plane distribution of the threshold voltage of the HEMT is determined by the uniformity of doping. Therefore, if the present invention is applied to silicon doping of the semiconductor layer constituting the HEMT, a uniform in-plane distribution of the threshold voltage can be obtained, and the yield of the manufactured device can be improved.

First, the structure of the semiconductor device manufactured by the method for manufacturing the semiconductor device according to the present embodiment will be explained with reference to FIG. On the GaAs substrate 80, i-G
A buffer layer 82 of aAs is formed. On the buffer layer 82, an electron transit layer 84 made of i-InGaAs is formed. On the electron transit layer 84, n-
An electron supply layer 86 made of InGaP is formed.
On the electron supply layer 86, a contact layer 88 made of n-GaAs is formed. A recess region 90 is formed in the contact layer 88, and a gate electrode 92 is formed on the electron supply layer 86 exposed in the recess region 90. Source / drain electrodes 94 are respectively formed on the contact layers 88 on both sides of the gate electrode. Thus, a HEMT in which the electron supply layer 86 is formed of an InGaP layer and the electron transit layer 84 is formed of InGaAs is formed.

Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. First, the GaAs substrate 80 is introduced into the reactor 10 and the susceptor 14
Place on top. Next, the pressure inside the reaction furnace 10 is reduced to a predetermined pressure by the vacuum pump 58.

Next, the GaAs is heated by the lamp heater 16.
The temperature of the s substrate 80 is raised to a predetermined film forming temperature. The substrate temperature is, for example, 700 ° C. Next, in the reaction furnace 10,
TEG and AsH as raw materials for forming a GaAs layer
₃ and introduce. For example, the flow rate of TEG is set to 1.9 × 10
^-4 mol / min, the flow rate of AsH ₃ is 5.7 × 10 ^-3 m
ol / min (V / III ratio: 30: 1), growth pressure: 6
0 Torr. As a result, the raw material introduced into the reactor 10 is thermally decomposed and reacted on the surface of the GaAs substrate 80, and the i-G film having a thickness of about 600 nm is formed on the GaAs substrate 80.
A buffer layer 82 of aAs is formed (FIG. 7).
(A)).

Next, TMI, TEG, AsH ₃ , which are raw materials for forming an InGaAs layer, are
Is introduced. For example, the flow rate of TMI is 1.9 × 10 ⁻⁵ m
ol / min, the flow rate of TEG is 9.5 × 10 ⁻⁵ mol /
min (total group III flow rate is 1.1 × 10 ⁻⁴ mol / mi
n), the flow rate of AsH ₃ was 5.7 × 10 ⁻³ mol / min.
(The V / III ratio is 41: 1) and the growth pressure is 60 Torr. As a result, the raw materials introduced into the reaction furnace 10 are thermally decomposed and reacted on the surface of the buffer layer 82, and
An electron transit layer 84 made of i-InGaAs with a thickness of about 10 nm is formed on 2 (FIG. 7B).

Next, an InGaP layer is placed in the reactor 10.
TEG, TMI, PH as raw materials for forming_ThreeWhen,
A material for doping silicon into the InGaP layer
Some Si_TwoH₆And SiH_Two[N (i-C_ThreeH₇)_Two]_TwoAnd the place
Introduce at a constant flow rate. For example, the flow rate of TMI is 2.1 ×
10^-Fivemol / min, flow rate of TEG is 3.4 × 10 ^-Five
mol / min (Group III total flow rate is 5.5 × 10^-Fivemol
/ Min), PH_ThreeFlow rate of 2.2 × 10^-2mol / m
in (V / III ratio 400: 1), Si_TwoH₆The flow rate
4.4 × 10^-9mol / min, SiH_Two[N (i-C_Three
H₇)_Two]_TwoFlow rate of 1.8 × 10^-8mol / min,
The long pressure is set to 60 Torr. This introduced
The raw material thermally decomposes and reacts on the surface of the electron transit layer 84,
On the traveling layer 84, a silicon-doped layer having a thickness of about 30 nm is formed.
An electron supply layer 86 made of n-InGaP is formed.
(FIG. 7 (c)).

Next, TEG and AsH ₃ , which are raw materials for forming GaAs, and Si ₂ H _6, which is a raw material for doping the GaAs layer with silicon, are placed in the reactor 10.
Are introduced at a predetermined flow rate. For example, the flow rate of TEG is 1.9 × 10 ⁻⁴ mol / min, and the flow rate of AsH ₃ is 5.
7 × 10 ⁻³ mol / min (V / III ratio is 30: 1),
The flow rate of Si ₂ H ₆ is 3.0 × 10 ⁻⁸ mol / min, and the growth pressure is 60 Torr. As a result, the raw material introduced into the reaction furnace 10 is thermally decomposed and reacted on the surface of the electron supply layer 86, and a contact layer 88 made of silicon-doped n-GaAs with a thickness of about 70 nm is formed on the electron supply layer 86. Is formed (FIG. 8A).

At this time, the electron supply layer 86 and the contact layer 88 are formed of semiconductor layers made of different V-group elements. As shown in the first embodiment, both the semiconductor layers ensure uniformity of silicon doping. It can be formed while performing. Next, the contact layer 88 in the region where the gate electrode is to be formed is selectively removed by ordinary lithography and etching. Thus, a recess region 90 is formed in the contact layer 88 (FIG. 8).
(B)).

Next, for example, an AuGe / Ni film is deposited and patterned to form a source / drain electrode 94 formed on the contact layer 88 on both sides of the recess region 90 and an electron supply layer 86 in the recess region 90. The formed gate electrode 92 is formed (FIG. 9). Thus, the HEMT shown in FIG. 6 can be formed.

As described above, according to the present embodiment, the HEM
Since the present invention is applied to doping of the electron supply layer with T, the HEMT can be formed while suppressing the in-plane distribution of the threshold voltage. As a result, the yield of devices to be manufactured can be improved. In the above-described embodiment, the case where the present invention is applied to the manufacture of the HEMT has been described. However, the present invention can be similarly applied to a high-speed device such as an HBT or an optical semiconductor device.

In the first and second embodiments, the I
Although the present invention is applied to the case where the nGaP layer is doped with silicon, the present invention is not limited to the silicon doping of the InGaP layer. Group V element is As, Sb, N
The same can be applied to the silicon doping of III-V compound semiconductors. More specifically, GaAs, AlAs, InAs, GaP, AlP,
The present invention can be applied to GaSb, AlSb, InSb, GaN, AlN, or InN or a mixed crystal thereof.

Further, in the first and second embodiments, the MOVPE apparatus using the horizontal furnace shown in FIG. 1 has been described as an example. The same effect can be obtained also in the reaction furnace. For example, the present invention can be similarly applied to a MOVPE apparatus having a barrel type reaction furnace as shown in FIG.

[0056]

As described above, according to the present invention, in a method of manufacturing a semiconductor device in which a compound semiconductor layer doped with silicon is formed, SiH ₄ or Si _{2 is used} as a silicon raw material for doping the compound semiconductor layer. H ₆ and SiH ₄
Alternatively, since an organic aminosilane-based raw material in which a part of hydrogen groups of Si ₂ H ₆ is substituted with an amino group is used at the same time, in-plane uniformity of silicon doping can be improved. Therefore, by using the method of manufacturing a semiconductor device according to the present invention, the uniformity of device characteristics in a wafer surface can be improved, and the manufacturing yield can be improved.

[Brief description of the drawings]

FIG. 1 shows an M used in a method of manufacturing a semiconductor device according to the present invention.
It is a schematic diagram of an OVPE apparatus.

FIG. 2 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a graph showing the uniformity of silicon concentration in an InGaP layer doped with silicon using Si ₂ H ₆ and SiH ₂ [N (i-C ₃ H ₇ ) ₂ ] ₂ .

FIG. 4 is a graph showing the uniformity of silicon concentration in an InGaP layer doped with silicon using SiH ₂ [N (i-C ₃ H ₇ ) ₂ ] ₂ .

FIG. 5 shows In doped with silicon using Si ₂ H ₆ .
4 is a graph showing the uniformity of silicon concentration in a GaP layer.

FIG. 6 is a schematic cross-sectional view showing a structure of a semiconductor device manufactured by a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the second embodiment of the present invention;

FIG. 8 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the second embodiment of the present invention.

FIG. 9 is a process sectional view (part 3) illustrating the method for fabricating the semiconductor device according to the second embodiment of the present invention.

FIG. 10 is a schematic view showing the structure of a barrel type reaction furnace.

[Explanation of symbols]

10 ... reactor 12 ... semiconductor substrate 14 ... susceptor 16 ... lamp heater 18 ... raw material gas supply pipe 20 ... exhaust pipe 22 ... H ₂ gas cylinder 24 ... Si ₂ H ₆ gas cylinder 26 ... PH ₃ bomb 28 ... AsH ₃ cylinder 30 ... MFC 32 ... MFC 34 ... MFC 36 ... MFC 38 ... MFC 40 ... MFC 42 ... MFC 44 ... TEG source container 46 ... MFC 48 ... TMI material container _{50 ... MFC 52 ... SiH 2 [} N (i-C 3 H 7) ₂ ] ₂ raw material container 54 MFC 56 pressure control valve 58 vacuum pump 60 gas purifier 70 GaAs substrate 72 i-GaAs layer 74 n-InGaP layer 76 n-GaAs layer 80 GaAs substrate 82 Buffer layer 84 Electron traveling layer 86 Electron supply layer 88 Contact layer 90 Recess region 92 Gate electrode 94 Source Drain electrode

Continued on the front page F term (reference) 5F045 AA04 AB10 AB11 AB13 AB14 AB40 AC02 AC08 AC09 AC19 BB04 CA07 DA52 DA53 DP04 DP16 5F073 CA06 CA14 CB19 DA05 DA11 5F102 GB01 GC01 GD01 GJ05 GK05 GL04 GM04 GN05 GQ01 HC01 HC05

Claims (10)

[Claims] 1. A method for manufacturing a semiconductor device for forming a compound semiconductor layer doped with silicon, wherein SiH ₄ or Si ₂ H ₆ , SiH ₄ or Si _{2 is used} as a silicon source for doping the compound semiconductor layer. A method for manufacturing a semiconductor device, comprising simultaneously using an organic aminosilane-based raw material in which a part of hydrogen groups of H ₆ is substituted with an amino group. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the organic aminosilane-based raw material is SiH ₂ [N
R ₂ ] ₂ , SiH ₂ [NHR] [NR ₂ ] or SiH ₃ [N
R ₂ ] (where R represents an alkane, alkene, alkyne, allyl or aryl, and the NR ₂ group includes NH ₂ and NHR). 3. The method for manufacturing a semiconductor device according to claim 1, wherein the organic aminosilane-based material is Si ₂ H ₂ [N
R ₂ ] ₄ , Si ₂ H ₃ [NR ₂ ] ₃ or Si ₂ H ₄ [NR ₂ ]
₂ (where R represents an alkane, alkene, alkyne, allyl or aryl, and the NR ₂ group includes NH ₂ and NHR). 4. The method for manufacturing a semiconductor device according to claim 1, wherein said compound semiconductor layer is formed by metal organic chemical vapor deposition. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the compound semiconductor layer is formed by a growth furnace in which the silicon material flows substantially parallel to a wafer on which the compound semiconductor layer is grown. A method for manufacturing a semiconductor device, comprising: 6. The method for manufacturing a semiconductor device according to claim 3, wherein the growth furnace is a horizontal growth furnace. 7. The method for manufacturing a semiconductor device according to claim 3, wherein the growth furnace is a barrel-type growth furnace. 8. The method for manufacturing a semiconductor device according to claim 1, wherein said compound semiconductor layer is made of GaAs, AlAs, or InA.
s, GaP, AlP, GaSb, AlSb, InSb,
A method for manufacturing a semiconductor device comprising GaN, AlN, InN or a mixed crystal thereof. 9. A step of forming a first compound semiconductor layer using SiH ₄ or Si ₂ H ₆ or an organic aminosilane-based material as a silicon material for doping silicon; As a raw material, Si
Forming a second compound semiconductor layer different from the first compound semiconductor layer by using H ₄ or Si ₂ H ₆ and an organic aminosilane-based material at the same time. Semiconductor device manufacturing method. 10. The method of manufacturing a semiconductor device according to claim 9, wherein a temperature at which said first compound semiconductor layer is grown, and a temperature at which said second compound semiconductor layer is grown.
Wherein the temperature at which the compound semiconductor layer is formed is substantially equal to the temperature at which the compound semiconductor layer is formed.