JP2000193594A - Circuit pattern inspecting method and its device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable the conditions of inspections to be speedily and easily optimized by storing searched conditions, extracting differences by comparison through the use of the stored conditions, and displaying the differences extracted by the comparison. SOLUTION: The surface of a substrate 24 on which a circuit pattern is formed is irradiated with charged particles, and a signal which occurs from the surface of the substrate 24 by the irradiation is detected by a secondary electron detecting part 22. A control part 21 detects defects in the pattern by storing the detected signal as a digital image in a storage means 81, comparing the stored image with an image expected to be the same image, extracting differences, and displaying the differences extracted by the comparison on an image display part 88. In other words, by detecting the image of a specified region on the surface of the substrate 24, storing it as a digital image, subjecting the stored digital image to image processing one time or a plurality of times under changed conditions, and determining the appropriateness of the conditions of the image processing, the control part 21 searches for comparison conditions capable of extracting differences, stores the searched conditions, extracts the differences by the comparison through the use of the stored conditions, and displays the differences extracted by the comparison.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for manufacturing a substrate having a fine circuit pattern such as a semiconductor device or a liquid crystal, and more particularly to a technique for inspecting a pattern of a semiconductor device or a photomask. The present invention relates to a pattern inspection technology and a comparative inspection technology using electron beams.

[0002]

2. Description of the Related Art An inspection of a semiconductor wafer will be described as an example.

A semiconductor device is manufactured by repeating a process of transferring a pattern formed mainly on a photomask on a semiconductor wafer by lithography and etching. In the manufacturing process of semiconductor devices, the quality of lithography, etching, and other processing, and the occurrence of foreign matter greatly affect the yield of semiconductor devices. Therefore, manufacturing is performed to detect abnormalities or defects early or in advance. A method for inspecting a pattern on a semiconductor wafer in the process has been conventionally implemented.

As a method of inspecting a defect existing in a pattern on a semiconductor wafer, a defect inspection apparatus that irradiates a semiconductor wafer with white light and compares the same type of circuit patterns of a plurality of LSIs using an optical image is put into practical use. For example, in an inspection method using an optical image, as described in JP-A-3-167456, an optically illuminated region on a substrate is imaged by a time delay integration sensor, and the image is There is disclosed a method of detecting a defect by comparing with design information input in advance.

[0005] Further, with the miniaturization of circuit patterns, the complexity of circuit pattern shapes, and the diversification of materials, it has become difficult to detect defects using optical images. Methods for comparing and inspecting circuit patterns have been proposed. J. Vac. Sci. Tech. B, Vol. 9, No.
6, pp. 3005-3009 (1991), J. Vac. Sci. Tech. B,
Vol. 10, No. 6, pp. 2804-2808 (1992), and
No. 5-258703 and US Pat.
A conductive substrate (such as an X-ray mask) is irradiated with an electron beam having an electron beam current of 0 times or more (10 nA or more), and any of generated secondary electrons, reflected electrons, and transmitted electrons is detected, and its signal is detected. Discloses a method for automatically detecting a defect by comparing and inspecting an image formed from an image. As described above, the optical pattern inspection and the electron beam scanning type wafer automatic pattern inspection, which has higher defect detection performance than the optical pattern inspection, perform fine pattern inspection and remove various defects generated during the circuit pattern formation process. Now detectable.

In the above defect inspection, images of adjacent and equivalent circuit patterns are formed and compared to detect defects automatically. In the inspection, wafers of various pattern layouts or patterns of various materials are used. It is necessary to respond to. In order to accurately compare adjacent patterns, it is necessary to determine the arrangement of the patterns, that is, the arrangement of chips (dies) and shots on the wafer in advance, and set them as inspection conditions for the wafer to be inspected. Further, in order to form an image suitable for inspection using various materials, it is necessary to set the brightness of the image and the contrast of the pattern / base to appropriate values and set the inspection conditions for the wafer to be inspected. However, in the above-mentioned conventional apparatus, there is no description about the procedure and operation method for setting these inspection conditions, the operation is complicated, and it is necessary to set 1 to 1 appropriate inspection conditions for a new wafer to be inspected. It took several hours. In a semiconductor manufacturing line, since a pattern inspection is performed for a plurality of products (that is, a plurality of circuit pattern arrangements) and a plurality of processes (that is, a plurality of materials and a plurality of detailed circuit pattern shapes), a huge number of inspection conditions are required. Has to be set, and as a result, there has been a problem that an enormous amount of time is required for each operation in the inspection, in particular, the inspection condition setting operation.

To solve the above problem, Japanese Patent Application Laid-Open No. 63-32604 discloses a technique for performing data processing and parameter setting concurrently with inspection work. And a method of transmitting and receiving signals between the control unit and the mechanism unit. However, in this method, although there is a description about signal transmission and reception, there is no description about operability and a data structure for parameters of an inspection apparatus having a complicated and large number of input parameters.

[0008]

As described in the above-mentioned prior art, as a method of complementing the optical appearance inspection and the optical inspection method for various fine circuit patterns including a semiconductor device, an electron beam is used. 2. Description of the Related Art An appearance inspection method using a method of scanning a sample surface and detecting secondary charged particles generated has been proposed.

However, in various inspections in which an image of a circuit pattern on a substrate is acquired and compared with an adjacent equivalent pattern, an arrangement of circuit patterns formed on a wafer serving as a substrate, that is, an arrangement of shots or the like is considered. It is necessary to set the chip (die) arrangement therein and the arrangement of memory cells, peripheral circuits, logic circuits, test patterns and the like therein as inspection conditions in advance, and furthermore, the pattern shape of the wafer to be inspected, It is necessary to set irradiation light conditions, detection conditions, image comparison conditions, defect determination conditions, and the like according to the material. Each time the semiconductor device process conditions are changed, these conditions also need to be changed appropriately. In such a case, there are the following problems. For example, when a large number of parameters are sequentially input and set, the operation screen is sequentially switched according to the input, but the order and items are unknown to the operator. For this reason, items that do not need to be input are displayed on the screen once and then checked before switching to the next screen, which is inefficient. Also, when confirming or re-entering already input data, you cannot return to the previous screen, or the current input stage is unknown, so the hierarchy of the screen to return is unknown, so if you do not go through many operations the previous screen There was a problem that it could not return to. Further, in another conventional apparatus, a plurality of parameter input screens can be displayed in a window format on the operation workstation. However, in this method, since a plurality of windows are displayed in an overlapping manner, the screen is hidden below. As for the screen, the information cannot be seen, and it is difficult to perform the screen selection operation. Due to these problems, a large number of input items must be created for each product type / process as described above, so even if the inspection itself is high speed, the preparation efficiency is low and time is required. It was difficult to apply inspections to new products and new processes. In addition, when setting the inspection conditions, it is necessary to set the conditions using an inspection apparatus. As a result, the inspection time is reduced, and the throughput is reduced. Further, even if the speed of the inspection is increased, if subsequent visual confirmation is performed by the same inspection apparatus, there is a problem that the time required for the inspection is reduced, and as a result, the throughput is reduced.

A first object of the present invention is to set various conditions necessary for inspection in a technology for inspecting a fine circuit pattern using an image formed by irradiating white light, laser light, or an electron beam. It is an object of the present invention to provide a technique for improving the operability efficiency when performing such operations.

A second object of the present invention is to provide an operation screen display method and an operation screen layout for improving the operability when setting the inspection conditions.

A third object of the present invention is to provide an inspection and inspection condition setting operation method and function using an operation screen for setting the inspection conditions and the like.

A fourth object of the present invention is to solve the above-mentioned problems, to provide a technique capable of setting various conditions for inspection efficiently in a short time, and to provide a technique for inspecting a circuit pattern with high accuracy at an early stage. By applying it to various types of multi-step semiconductor devices and other fine circuit patterns, process defects of semiconductor devices etc. can be extracted faster than conventional methods, and the inspection results can be reflected in the manufacturing conditions to improve the reliability of semiconductor devices etc. An object of the present invention is to provide an inspection method that contributes to increasing the defect rate and reducing the defect rate.

Further, in the conventional apparatus, it cannot be said that the screen function is fully utilized. Therefore, the inspection of the substrate is not always easy, and the usability is poor. Also, it could not be said that appropriate inspection conditions could be set. In particular, in an inspection apparatus using an electron beam, the state of the substrate changes depending on the number of times of irradiation with the electron beam, and the inspection conditions are different in each state. If the usability and the procedure are not appropriate, the state of the board will be changed when the inspection conditions are set, and even if the changed conditions are set appropriately, the conditions under which the electron beam is not irradiated during the actual inspection Since the inspection is performed, it cannot be said that appropriate conditions are set.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and an object of the present invention is to provide a board inspection method and a board inspection apparatus which improve the screen function of the board inspection apparatus and are easy to use. In particular, it is an object of the present invention to provide a method and an apparatus capable of quickly and easily optimizing inspection conditions.

[0016]

In order to achieve the above object, according to the present invention, a charged particle is irradiated on a substrate surface on which a circuit pattern is formed, and a signal generated from the substrate surface by the irradiation is detected and detected. Storing the signal as a digital image, comparing the stored image with an image expected to be the same image, extracting differences, and displaying the extracted differences by comparison to detect pattern defects. In a circuit pattern inspection method, an image of a specified area on a substrate surface is detected and stored as a digital image, and the stored digital image is subjected to image processing one or more times under different conditions, and the appropriateness of image processing conditions Search for a comparison condition that allows extraction of a difference by judging, storing the searched condition, extracting a difference by comparison using the stored condition, and extracting by comparison And displaying the differences that were.

In the present invention, the surface of the substrate on which the circuit pattern is formed is irradiated with light or charged particles, a signal generated from the surface of the substrate by the irradiation is detected, and the detected signal is stored as a digital image. In a circuit pattern inspection method for detecting a pattern defect by comparing the extracted image with an image expected to be the same image and extracting a difference, and displaying the difference extracted by the comparison, Detects an image in a specified area, stores it as a digital image, extracts differences by comparing the stored digital image one or more times under different conditions, and determines the appropriateness of the image processing conditions from the extraction result Searching for the comparison condition that enables the extraction of the difference by performing the search, storing the searched condition, extracting the difference by the comparison using the stored condition, and extracting the difference by the comparison. Characterized in that it displays the difference.

Further, according to the present invention, light or charged particles are irradiated on a substrate surface on which a circuit pattern is formed, a signal generated from the substrate surface by the irradiation is detected, and the detected signal is stored as a digital image. In a circuit pattern inspection method for detecting a pattern defect by comparing a stored image with an image expected to be the same image and extracting a difference, and displaying the difference extracted by the comparison, an operation screen Instruct the image detection of the specified area on the substrate surface above, store it as a digital image according to the instruction, extract the difference by comparing the stored digital image by specifying the conditions on the operation screen, and extract the result Is displayed on the operation screen, a search for the comparison condition from which the difference can be extracted by judging the appropriateness of the image processing condition is searched, the searched condition is stored, and the stored condition is stored. Extraction of difference by comparison with, and displaying the differences extracted by the comparison.

The present invention irradiates a substrate surface on which a circuit pattern of a wafer is formed with light, or light and a charged particle beam, detects a signal generated from the substrate by the irradiation, and converts a signal obtained by the detection. In a circuit pattern inspection method for imaging and storing an image, comparing the stored image with an image formed from another identical circuit pattern, and displaying an image processing result on the circuit pattern from the comparison result, a wafer map Obtain the image of the specified location above, perform image processing on the obtained image under the specified conditions, display the image processing result, change the setting condition, repeat the image processing, perform the inspection setting condition Is determined.

The present invention irradiates a substrate surface on which a circuit pattern of a wafer is formed with light or laser light and a charged particle beam, detects a signal generated from the substrate by the irradiation, and obtains a signal obtained by the detection. Image and memorize,
In the circuit pattern inspection method of comparing the stored image with another image formed from the same circuit pattern and displaying an image processing result on the circuit pattern based on the comparison result, the image of the designated location on the wafer map is displayed. Acquire, perform image processing on the acquired image under the specified conditions, and display the result of the image processing, change the setting conditions, and irradiate light or laser light once or repeatedly, charged particles The line is characterized in that image processing is repeatedly performed on an image obtained by irradiating once, and the inspection setting condition is determined.

According to the present invention, charged particles are irradiated onto a wafer substrate surface having a plurality of circuit patterns originally formed to have the same shape, and secondary charged particles generated from the wafer substrate surface by the irradiation are detected. Digital images of a plurality of circuit patterns formed to have the same shape on the substrate surface are sequentially obtained by using the detected signals of the secondary charged particles, and the digital images of the wafer substrate surface obtained in this order are used. In the circuit pattern inspection method for detecting a defect of a circuit pattern, a map of the wafer and a defect image of a defect location at a location designated on the map are displayed in parallel.

The present invention is characterized in that an inspection area or a memory hill area is displayed on the map.

The present invention is characterized in that the map displays inspection information such as a defect position, information on a wafer chip, a current stage position, and a scale indicating the size of the map in association with the map.

The present invention is characterized by performing defect blutering for selecting defects to be displayed or rearranging their order.

According to the present invention, the map or the defect image is enlarged and displayed.

According to the present invention, a charged particle is irradiated onto a wafer substrate surface having a plurality of circuit patterns originally formed to have the same shape, and secondary charged particles generated from the wafer substrate surface by the irradiation are detected. Digital images of a plurality of circuit patterns formed to have the same shape on the substrate surface are sequentially obtained by using the detected signals of the secondary charged particles, and the digital images of the wafer substrate surface obtained in this order are used. In the circuit pattern inspection method for detecting a defect of the circuit pattern, a digital image of the circuit pattern is subjected to image processing to extract the defect, and the lateral shift and brightness set as the sensitivity condition are taken on the XY axes, and the defect number data is obtained. To Z
It is characterized by displaying a graph as an axis.

The present invention is characterized in that when the distance between an extracted individual defect and a defect already classified is smaller than a predetermined value, the classified class is assigned to the class and the defect count data is obtained after the assignment. I do.

According to the present invention, there is provided irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light or laser light and a charged particle beam, detection means for detecting a signal generated from the substrate by the irradiation, Storage means for imaging a signal detected by the detection means and storing the image, a comparing means for comparing the stored image with another image formed from the same circuit pattern, and an image on the circuit pattern from the comparison result In a circuit pattern inspection apparatus including a display unit for displaying a processing result, a unit for setting a temporary inspection region on a recipe creation screen, a unit for setting an inspection region by the unit, and a method for setting the inspection region. Instruction means for instructing an inspection.

According to the present invention, the surface of a substrate on which a circuit pattern of a wafer is formed is irradiated with light or a laser beam and a charged particle beam, a signal generated from the substrate by the irradiation is detected, and a signal obtained by the detection is detected. Image and memorize,
In the circuit pattern inspection method of comparing the stored image with another image formed from the same circuit pattern and displaying an image processing result on the circuit pattern based on the comparison result, a temporary inspection during recipe creation is performed. A region is set, and the state of the recipe being created is displayed on the screen while checking the inspection result in the set region.

According to the present invention, there is provided an irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light, or light and a charged particle beam, a detection means for detecting a signal generated from the substrate by the irradiation, Storage means for imaging a signal detected by the means and storing the image, comparison means for comparing the stored image with another image formed from the same circuit pattern, and image processing on the circuit pattern from the comparison result In a circuit pattern inspection apparatus including a display unit for displaying a result, an image acquisition unit of a designated location on a wafer map, an image processing condition setting unit, and an acquired image acquired by the image acquisition unit, Perform image processing according to the image processing conditions set by the setting means,
Means for confirming the image processing result on the screen.

According to the present invention, there is provided irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light or laser light and a charged particle beam, detecting means for detecting a signal generated from the substrate by the irradiation, Storage means for imaging a signal detected by the detection means and storing the image, a comparing means for comparing the stored image with another image formed from the same circuit pattern, and an image on the circuit pattern from the comparison result In a circuit pattern inspection apparatus having a display unit for displaying a processing result, an image acquisition unit of a designated place on a wafer map, an image processing condition setting unit, and an acquired image acquired by the image acquisition unit. Means for performing image processing according to the image processing conditions set by the setting means, and confirming defect information on the circuit pattern. That.

According to the present invention, there is provided an irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light or a laser beam and a charged particle beam; a detection means for detecting a signal generated from the substrate by the irradiation; Storage means for imaging a signal detected by the detection means and storing the image, a comparing means for comparing the stored image with another image formed from the same circuit pattern, and an image on the circuit pattern from the comparison result In a circuit pattern inspection apparatus having a display unit for displaying a processing result, an image acquisition unit of a designated place on a wafer map, an image processing condition setting unit, and an acquired image acquired by the image acquisition unit. Means for performing image processing according to the image processing conditions set by the setting means and confirming inspection parameters.

According to the present invention, there is provided irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light or laser light and a charged particle beam, detection means for detecting a signal generated from the substrate by the irradiation, and Storage means for imaging a signal detected by the detection means and storing the image, a comparing means for comparing the stored image with another image formed from the same circuit pattern, and an image on the circuit pattern from the comparison result In a circuit pattern inspection apparatus having a display unit for displaying a processing result, an image acquisition unit of a designated place on a wafer map, an image processing condition setting unit, and an acquired image acquired by the image acquisition unit. Image processing is performed according to the image processing conditions set by the setting means, and image processing results, which are inspection parameters and defect information on a circuit pattern, are obtained. And means for confirming, by extracting the difference by comparison with the confirmed condition, and displaying the difference extracted by said comparison.

[0034]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an example of an inspection method and an apparatus according to an embodiment of the present invention will be described in detail with reference to the drawings.

(Embodiment 1) In this embodiment, an inspection method and an inspection apparatus for forming an image using an electron beam and comparing images between adjacent equivalent circuit patterns to detect the presence or absence of a defect are provided. This section describes how to set various parameters required for. Here, a case where a circuit pattern of a semiconductor device formed on a wafer is inspected will be described.

First, the configuration of the circuit pattern inspection apparatus 16 in this embodiment is shown in FIG. Circuit pattern inspection device 1
6 is an inspection room 17 in which the room is evacuated, and an inspection room 17
A preliminary chamber (not shown in this embodiment) for transporting a sample substrate (substrate to be inspected) 24 is provided therein, and this preliminary chamber is configured to be evacuated independently of the inspection chamber 17. ing. The circuit pattern inspection device 16 includes a control unit 21 and an operation unit 20 in addition to the inspection room 17 and the spare room. The inside of the inspection room 17 is roughly divided into the electron optical system 1
8, secondary electron detector 35, sample chamber 23, optical microscope 19
It is composed of The electron optical system 18 includes an electron gun 25,
It comprises an electron beam extraction electrode 26, a condenser lens 27, a blanking deflector 28, a scanning deflector 30, a diaphragm 29, an objective lens 31, a reflecting plate 32, and an ExB deflector 33. The secondary electron detector 35 of the secondary electron detector 22 is arranged above the objective lens 31 in the inspection room 17. The output signal of the secondary electron detector 35 is
The digital signal is amplified by a preamplifier 36 installed outside the device and converted into digital data by an AD converter 37. The sample chamber 23
Sample stage 45, X stage 46 as stage and Y
It comprises a stage 47, a position monitor length measuring device 48, and a substrate height measuring device 49 for inspection. The optical microscope 19 is installed near the electron optical system 18 in the room of the inspection room 17 and at a position away from the electron optical system 18 so as not to affect each other. The distance between the electron optical system 18 and the optical microscope 19 is known. It is. Then, the X stage 46 or the Y stage 47 moves between the electron optical system 18 and the optical microscope 19,
It reciprocates a known distance. An optical microscope (light microscope) 19 includes a white light source 50, an optical lens 51, and a CCD.
It is constituted by a camera 52. White light source 50, CC
The D camera 52 and the like may be configured to be installed outside the evacuated inspection room 17. The operation unit 20 includes a first image storage unit 53, a second image storage unit 54, a comparison operation unit 55, and a defect determination processing unit 56. The image display unit 88 of the control unit monitor displays the electron beam image captured by the image storage units 53 and 54, the optical image captured by the CCD camera 52, and the difference image after being compared by the comparison calculation unit 55. Can be arbitrarily selected and displayed. Operation commands and operation conditions of each unit of the device are input and output from the control unit 21. In the control unit 21, conditions such as an acceleration voltage at the time of generation of an electron beam, an electron beam deflection width, a deflection speed, a signal capture timing of a secondary electron detection device, and a sample stage moving speed are arbitrarily or selected according to the purpose. It has been entered so that it can be set. The control unit 21 uses the correction control circuit 58 to control the position monitor length measuring device 48 and the substrate height measuring device 49 to be inspected.
The deviation of the position or height is monitored from the signal of (1), a correction signal is generated from the result, and the correction signal is sent to the objective lens power supply 70 and the scanning deflector 30 so that the electron beam is always irradiated to the correct position.

In order to obtain an image of the substrate 24 to be inspected, the substrate 24 to be inspected is irradiated with a narrowed electron beam 34 to generate secondary electrons 71, which are scanned by the electron beam 34 and the stage 46. , 47, the image of the surface of the substrate 24 is obtained. The circuit pattern inspection apparatus of the present embodiment is configured to form an image by scanning only once with a high-current electron beam of, for example, 100 nA, which is about 100 times or more that of a normal SEM, thereby realizing high-speed image acquisition. Can be.

As the electron gun 25, a diffusion-supply type thermal field emission electron source is used. By using this electron gun 25, a stable electron beam current can be secured as compared with a conventional tungsten (W) filament electron source or a cold field emission electron source, for example. An image can be obtained, and the electron beam current can be set large. In order to set a large electron beam current, a Schottky electron source can be used for the electron gun. Thereby, a high-speed inspection for acquiring a high S / N electron beam image by one scan can be realized. The electron beam 34 is extracted from the electron gun 25 by applying a voltage between the electron gun 25 and the extraction electrode 26. The acceleration of the electron beam 34 is performed by the electron gun 2
5 by applying a high voltage negative potential. As a result, the electron beam 34 travels in the direction of the sample stage 45 with energy corresponding to the potential, is converged by the condenser lens 27, is further narrowed down by the objective lens 31, and is placed on the stages 46 and 47 on the sample stage 45. Irradiation is performed on the mounted substrate to be inspected 24 (a substrate having a fine circuit pattern such as a semiconductor wafer, a chip or a liquid crystal or a mask). In addition,
A scanning deflector 59 for generating a scanning signal and a blanking signal is connected to the blanking deflector 28, and a lens power supply 70 is connected to the condenser lens 27 and the objective lens 31, respectively. A negative voltage can be applied to the substrate 24 to be inspected by the high voltage power supply 73. By adjusting the voltage of the high-voltage power supply 73, the primary electron beam can be decelerated, and the irradiation energy of the electron beam to the inspection target substrate 24 can be adjusted to an optimum value without changing the potential of the electron gun 25.

The secondary electrons 71 generated by irradiating the electron beam 34 on the substrate 24 to be inspected
Is accelerated by the negative voltage applied to Inspection substrate 2
Above 4, an ExB deflector 33 is arranged, and the accelerated secondary electrons 71 are deflected in a predetermined direction. The amount of deflection can be adjusted by the voltage applied to the ExB deflector 33 and the strength of the magnetic field. Further, this electromagnetic field can be changed in conjunction with a negative voltage applied to the sample. The secondary electrons 71 deflected by the ExB deflector 33 collide with the reflector 32 under predetermined conditions. The reflector 32 has a conical shape integrally with a shield pipe of a deflector for an electron beam (hereinafter, referred to as a primary electron beam) for irradiating a sample. When the accelerated secondary electrons 71 collide with the reflecting plate 32, the reflecting plate 32 generates second secondary electrons 72 having an energy of several V to 50 eV.

The secondary electron detector 22 includes a secondary electron detector 35 inside the evacuated inspection room 17, and a preamplifier 36, an AD converter 37, and a light conversion unit 3 outside the inspection room 17.
8, optical transmission means 39, electric conversion means 40, high voltage power supply 4
1, preamplifier drive power supply 42, AD converter drive power supply 4
3, a reverse bias power supply 44. As already described, the secondary electron detector 35 of the secondary electron detector 22 is disposed above the objective lens 31 in the inspection room 17. Secondary electron detector 35, preamplifier 36, AD
Converter 37, light conversion means 38, preamplifier drive power supply 4
2. The AD converter drive power supply 43 is floating at a positive potential by the high voltage power supply 41. The second secondary electrons 72 generated by colliding with the reflection plate 32 are guided to the secondary electron detector 35 by the attraction electric field. Secondary electron detector 3
5 indicates that the secondary electrons 71 generated while the electron beam 34 is being irradiated on the substrate 24 to be inspected are then accelerated and
The second secondary electrons 72 generated by the collision with the
Is detected in synchronization with the scan timing. The output signal of the secondary electron detector 35 is
The digital signal is amplified by a preamplifier 36 installed outside the device and converted into digital data by an AD converter 37. AD converter 37
Is configured so that the analog signal detected by the secondary electron detector 35 is converted into a digital signal immediately after being amplified by the preamplifier 36 and transmitted to the operation unit 20 via the control unit 21. Since the detected analog signal is digitized immediately after detection and then transmitted, a signal having a higher S / N ratio than conventional devices can be obtained.

On the stages 46 and 47, the substrate 24 to be inspected is provided.
Are mounted, and the stages 46 and 47 are used during the inspection.
Is stationary, and the electron beam 34 is two-dimensionally scanned. The stage 46, 47 is moved continuously at a constant speed in the Y direction at the time of inspection, and the electron beam 74 is linearly scanned in the X direction. You can choose one of the methods. When inspecting a specific relatively small area, the former method in which the stage is stationary and inspection is effective, and when inspecting a relatively large area, the method in which the stage is continuously moved at a constant speed is effective. is there. When it is necessary to blank the electron beam 34, the electron beam 34 is deflected by the blanking deflector 28, and the electron beam 34 can be controlled so as not to pass through the aperture 29.

In this embodiment, a length measuring device based on laser interference is used as the position monitor measuring device 48. The positions of the X stage 46 and the Y stage 47 can be monitored in real time and transferred to the control unit 21. Also, various data of the X stage 46 and the Y stage 47 are similarly configured to be transferred from each driver to the control unit 21. The control unit 21 controls the electron beam 34 based on these data.
The region and the position where the electron beam is irradiated can be accurately grasped, and the positional deviation of the irradiation position of the electron beam 34 is corrected by the correction control circuit 58 in real time as needed. In addition, an area irradiated with an electron beam can be stored for each substrate to be inspected.

An optical height measuring device (substrate to be inspected measuring device) 49 is an optical measuring device other than an electron beam, such as a laser interferometer or a reflection measuring device for measuring a change in the position of reflected light. An optical measuring device is used, and is configured to measure the height of the substrate to be inspected 24 mounted on the stages 46 and 47 in real time. In the present embodiment, the elongated white light that has passed through the slit is irradiated onto the substrate 24 to be inspected through a transparent window, the position of the reflected light is detected by a position detection monitor, and the amount of change in height from the position change is calculated. The calculation method was used. Based on the measurement data of the optical height measuring device 49, the focal length of the objective lens 31 for narrowing down the electron beam 34 is dynamically corrected, and the non-inspection region can always be irradiated with the electron beam 34. It has become.
Further, the warpage and the height distortion of the substrate 24 to be inspected are measured in advance before the electron beam irradiation, and based on the data, the objective lens 3 is measured.
It is also possible to configure so as to set a correction condition for each inspection area.

The control section 21 has storage means 81 for storing a signal obtained by converting an analog signal from the secondary electron detector 35 into a digital signal, and an image processing circuit 82 for digitally processing the digital signal stored in the storage means 81. , An inspection condition setting unit 83 for setting processing parameters of the image processing circuit 82, a defect buffer 84 for holding defect information as a processing result of the image processing circuit 82, and an overall control unit 85 for controlling the whole.

The operation unit 20 is connected to the monitor 9 as shown in FIG.
5, a keyboard 96 and a mouse 97 are provided. The screen of the monitor 95 includes a map unit 87 for displaying the position of the substrate and instructing movement, an image display unit 88 for displaying image information, an image acquisition instruction unit 89, an image processing instruction unit 90, and a processing condition setting unit 91. It is composed.

With these configurations, the inspection conditions are set by operating as follows.

That is, the current stage position is displayed on the map section 87, and the light microscope image of the optical microscope 19 is displayed on the image display area 88. By clicking on the map section 87,
Stages 46 and 47 are moved to select a place for setting conditions. By clicking the image acquisition instructing section 89, the electron beam 34 is irradiated on the substrate 24 to be inspected, and the secondary electrons 7 generated
1 is detected by the secondary electron detector 35, and the detected signal is AD
The data is converted into a digital signal by the converter 37, and a digital image of a predetermined area is obtained in the storage means 81.

The processing conditions are set by the processing condition setting section 91,
Click the image processing instruction unit 90. Inspection condition setting unit 8
Inspection conditions 3 are set, and the digital image stored in the storage means 81 is subjected to image processing in the image processing circuit 82 under the set conditions to extract defects and stored in the defect buffer 84.
The map 87 is enlarged and displayed so that the image-acquired area can be visually recognized, and the position of the defect stored in the defect data buffer 84 is displayed. By clicking the displayed point, an image on the storage unit 81 of the defect position is displayed on the image display unit 88. By repeatedly clicking the map unit 87, a defect to be originally detected is detected, and the operator determines whether an extra defect is not detected.

If the judgment result shows that the inspection conditions are inappropriate,
The processing condition is set again by the processing condition setting unit 91, and the image processing instruction unit 90 is clicked to execute the inspection. By repeating these operations, an inspection condition suitable for the inspection is searched.
When the condition check at one place is completed, the map unit 87 is reduced in size as necessary, and the image display unit 88 is changed to the optical microscope 1.
Switching to the light microscope image display at 9 and reselecting the condition setting location, the process from image acquisition to condition setting is repeated. These operations assist the operator in setting conditions.

When the inspection conditions are set, image processing conditions can be set using an image of the substrate obtained by one irradiation of the electron beam, so that appropriate conditions are set. Only one irradiation with an electron beam is desirable. Thus, it is possible to provide an easy-to-use board inspection method and a board inspection apparatus. In particular, it is possible to quickly and easily optimize the inspection conditions.

Various parameters necessary for executing the inspection in the present embodiment are shown below.

In order to execute the inspection, there are parameters specific to the substrate to be inspected, parameters for determining the operating conditions of the apparatus, and the like. The parameter specific to the substrate to be inspected is roughly 2
Divided into types. One is a parameter called a “type file”, which does not change depending on the layer during the manufacturing process. Contents include, for example, wafer size,
Orientation flat or notch shape, semiconductor product exposure shot size, chip (die) size, shot and chip arrangement, shot and chip as effective areas of inspection area, chip number as origin, memory cell area (number of areas And the coordinates of each area), the size of the repetition unit of the memory cell, and the like. These are tabulated as the "type file". The other is a parameter called a “process file”, which needs to be adjusted because the state of the surface material and shape differs depending on the layer in the course of the manufacturing process. The contents include, for example, electron beam irradiation conditions (irradiation energy when irradiating the sample with an electron beam), various gains and offset values of the detection system, gradation conversion values for adjusting the brightness of the image for each sample, and alignment. Fixed as the alignment mark coordinates and alignment mark image to be executed, the chip to be inspected, the area within the chip, the inspection area condition such as the sampling rate, the pixel size at the time of inspection, and the image processing conditions for detecting defects Selection of threshold value / floating threshold value, filter at the time of image input or processing, allowable value of positional deviation, allowable value of brightness variation at the time of image comparison, etc. The number of defects or defect density, the number of defective chips or the percentage of defective chips, etc., are registered as the above “process file”. It has been. At the time of inspection, inspection conditions corresponding to a specific semiconductor product and a specific manufacturing process can be called by designating the “type file” and “process file”.

In the conventional inspection apparatus, a "type file" in which common information relating to a specific semiconductor device product is tabulated and a "process file" in which information peculiar to each inspection step are tabulated are appropriately divided. For example, even if inspection conditions have already been set for a specific semiconductor product on a wafer in another process, it is difficult to divert an already created condition when setting inspection conditions for another process There was a problem. For example, it is necessary to input parameters common to the same product type, for example, chip matrix and memory cell area setting, every time the inspection process changes. In the present application, the "type file" and the "process file" are appropriately separated as described above, and as shown in FIG. 3, a file structure such that one semiconductor product has a plurality of process files below the type file as shown in FIG. Therefore, for example, when setting inspection conditions for wafers of the same product but different processes, it is possible to divert conditions for parameters common to a specific product, such as a chip size, in an inspection file already created. become,
It is no longer necessary to set and enter the same parameter multiple times. Further, the screen operation has been facilitated, which has made it possible to increase the efficiency of creating inspection conditions.

The above-mentioned "type file" and "process file"
Are collectively referred to as a “recipe” below. A series of operations for inputting and registering these various parameters is hereinafter referred to as “recipe creation”.

Hereinafter, a method of creating a recipe and an operation screen for realizing the method will be described. FIG. 4 shows a screen example of the inspection apparatus. The screen is roughly divided into five areas. The area <1> is arranged at the top of the screen, and the current date and time are displayed on the left. A device name and a device ID are displayed beside them, a product file name and a process file name are displayed as recipe names on the right side, and an operator name is displayed on the rightmost side. An area <2> is placed below it,
"Guidance" for explanation of operation and status in area <2>
Is displayed. An area <3> is arranged at the center of the screen, and the display content changes depending on the operation and the progress state. An area <4> is arranged on the right side of the screen, and buttons for operations commonly required on a plurality of screens are displayed. The buttons correspond to, for example, “print”, “file save”, “start”, “end”, and the like. When this button is clicked on the screen by clicking with a mouse or the like, each operation is executed. For example, if you press "Print",
Perform a hard copy of the display screen. "Save File"
Pressing displays a screen for saving the recipe currently being created, that is, a screen for specifying the name of the type file and process file to be saved. At the lower part of the screen, an area <5> is arranged, and the mode name that divides the mode according to the operation content is displayed. For example, if you press “Inspection”, it will be in the mode to execute the automatic inspection, if you press “Recipe”, it will be in the mode to enter the above parameters, and if you press “Utility”, you will manage the device-specific parameters and the electronic optics / mechanical system. -A mode for adjusting the detection system and image processing system. Among these area arrangements, areas <1>,
The area <5> is configured based on the screen standard. In this standard, the date is displayed at the upper left of the screen, the operator name is displayed at the right, and the operation mode name is displayed at the lower part of the screen.

FIG. 5 shows a flow of recipe creation. First,
In the initial screen, “recipe creation” is selected from the modes in the area <5> (flowchart S6 in FIG. 5), and the button is pressed. Then, the screen is switched to a screen for recipe creation. On the first screen of the recipe creation mode, the sequence to load the wafer to be inspected and create a recipe, and change only the numerical value of a specific parameter condition for the already created recipe, that is, set the numerical value without loading the wafer Is selected (flowchart S7 in FIG. 5). In the present embodiment, a method of loading a wafer to be inspected and creating a recipe will be described. The wafer cassette loaded with the wafer to be inspected is set in the loader of the inspection apparatus (flowchart S8 in FIG. 5), and the conditions for recipe creation, that is, whether a new kind file and process file are created, or the already created file is changed. It is specified whether or not to perform the operation (flowchart S9 in FIG. 5). When "new creation" is selected, the type file and the process file input by default are called on the screen. When a change is made to a registered product type file or process file, the registered product type or process file is called. When these designations are completed, the wafer is loaded by pressing a wafer load button, ie, a button for designating the start of recipe creation, on the screen. Simultaneously with the start of the wafer loading, the electron beam irradiation conditions are set (flowchart S10 in FIG. 5). Each time the electron beam condition is changed, “beam calibration” is performed to adjust the focus and astigmatism of the electron beam each time (see flowchart S1 in FIG. 5).
1) is required. For this reason, in the inspection method and the recipe creation method of the present embodiment, the electron beam irradiation conditions are specified in advance (the flowchart S10 in FIG. 5) before the beam calibration (the flowchart S11 in FIG. 5) is performed. . When the electron beam irradiation conditions are input and the wafer loading is completed, a retarding voltage is applied to the sample table and the sample so that the conditions specified by the electron beam irradiation conditions are satisfied. Then, in the beam calibration (flowchart S11 in FIG. 5), the stage automatically moves so that the position of the electron beam calibration pattern stuck on the sample stage is directly below the electron beam irradiation optical system, and the electron beam is adjusted. Is irradiated on the calibration pattern. After the magnification and distortion are corrected on the calibration pattern and the focus and the astigmatism are adjusted with the knobs, the process proceeds to the next step. Next, the designated position on the sample is irradiated with an electron beam, the image contrast on the sample is confirmed, and the focus and the astigmatism on the sample are adjusted again (flowchart S12 in FIG. 5).
At this time, if the sample is continuously irradiated with the electron beam, contamination of the sample is adhered to the sample or the contrast of the sample is changed due to charging. Is obtained and displayed on the screen. If the contrast between the pattern portion and the base cannot be obtained on this screen, change of the electron beam irradiation condition is designated (flowchart S13 in FIG. 5).
I do. Then, the electron beam irradiation conditions are changed (the flowchart S10 in FIG. 5), and the beam calibration is performed again (FIG. 5).
After the flow chart S11), the contrast can be similarly confirmed (flow chart S12 in FIG. 5). The electron beam irradiation conditions and the focus / astigmatism conditions input here are stored as parameters in a process file.

After the electron beam conditions are determined, the contrast is confirmed, and the focus and astigmatism are adjusted on the sample, the size and arrangement of shots and chips on the wafer are input (FIG. 5).
Step S14) is performed. When the shot size and the shot matrix are input and the arrangement of the chips in the shot is input, the presence or absence of a shot or a chip in the peripheral portion of the wafer is designated. The shot and chip arrangement set here are stored as parameters in the type file.

Next, alignment conditions are set (flow chart S15 in FIG. 5). FIG. 6 shows an outline of the inspection method and the alignment method of the inspection apparatus according to the present embodiment.
Two chips (130 and 131 in FIG. 6) arranged in parallel are designated. When the chip is specified, the stage is moved to the position specified as the first chip (130 in FIG. 6). A pattern formed for alignment or a pattern suitable for alignment (132 in FIG. 6) is searched for in the optical microscope image, and when found, the corresponding portion is designated. Then, an optical microscope image and an electron beam image of the pattern are acquired, and the image is registered as an image (133 in FIG. 6) to be stored for alignment, that is, registered as an alignment parameter in a process file, and the coordinates of the pattern (X1 , Y1) are similarly registered. Next, it is moved to the second chip (131 in FIG. 6) and the second chip (1 in FIG. 6).
The equivalent pattern section (132 in FIG. 6) in 31) is searched, and the coordinates (X3, Y3) of that location are similarly registered. Thus, an image necessary for executing the alignment and the position of the alignment pattern on the wafer are determined. Next, an offset value between the designated alignment pattern coordinates and the chip origin is input and used as an alignment parameter in the process file. Thus, after the execution of the alignment, the origin of each chip for calculating various coordinates in the recipe creation is determined. In the recipe creation, since there are many parameters for specifying the coordinates for executing various processes on the wafer, the alignment conditions are first determined and registered as parameters in the process file, and then the alignment is executed (the flowchart of FIG. 5). S
15).

After the alignment conditions are set and the alignment is executed, the process proceeds to the setting of the memory cell area in the chip (flow chart S16 in FIG. 5). The memory cell area setting needs to be set only for a memory product or a product having a memory cell in a chip. An arbitrary chip is selected, and the position of each memory cell mat in the chip is searched and designated by an optical microscope. Then, the same position is displayed again as an electron beam image, and coordinate registration with higher magnification and higher accuracy is performed. When the position designation of the memory mat is completed, a repetition unit, that is, a pitch, is input for the repetition pattern in the memory mat (S16). The repetition pitch is
Numerical values can be input, and an image of a pattern can be acquired and displayed on the screen at a high magnification, and a unit can be repeatedly input using a cursor or the like to perform automatic measurement. The data and the repetition pitch of the memory cell area thus input are registered as parameters in the product type file.

Next, an inspection area is designated (flowchart S17 in FIG. 5). In the specification of the inspection area, two types of the inspection chip and the inspection area in the chip can be specified. Under the default conditions, all chips and all areas set as effective areas on a wafer are to be inspected. If it is desired to inspect only the area, it can be arbitrarily specified. Further, an inspection sampling rate can be specified for the specified area. When the sampling rate is 100%, the entire inspection area specified is inspected. For example, sampling rate 50%
In the case of (1), only 50% of the designated inspection area is skipped every scanning, that is, for example, one scanning width is 100 μm.
In the case of m, the next 10
Inspection is performed by skipping 0 μm so that the inspection area becomes striped. The inspection area data thus input is stored as a parameter in the process file.

Designation of inspection area (flow chart S in FIG. 5)
17) is completed, the calibration setting for adjusting the brightness of the image at the time of inspection (flow chart S1 in FIG. 5)
Move to 8). The calibration is for acquiring an image and performing gain adjustment and brightness correction according to the signal amount from the brightness distribution. First, an arbitrary chip is selected from the screen, and coordinates for acquiring an image for performing calibration in the chip are designated and registered. Then, the automatic calibration is actually executed, and the result is confirmed. The input contents, that is, the coordinate values for performing the calibration, the brightness gain and the offset value, are registered as parameters in the process file.

When the setting of the calibration conditions and the calibration (flowchart S18 in FIG. 5) are completed, an image is actually acquired under various conditions set up to now, and image processing conditions for detecting a defect are set. Then, the process proceeds to the step (Step S19 in FIG. 5). First, when acquiring an image, the type of filter to be applied to the detection signal is selected. For example, a plurality of filters such as a filter for suppressing noise and a filter for enhancing a difference in brightness are registered, and a desired filter is selected from the registered filters. Then, an image of a small area in one chip is actually acquired under the same conditions as the inspection. In this case, the location where the image is obtained can be arbitrarily specified. Here, the small region refers to, for example, an image region having a width of 100 μm, which is the scanning width of an electron beam, and a length of one chip. After acquiring the image, enter the threshold value for determining the defect, display the image of the location determined to be defective in the acquired image, and check whether the defect is actually detected or not After confirming whether
Adjust the threshold to an appropriate value. The threshold value is input, image processing is executed, the state of defect detection or erroneous detection is confirmed, and the threshold value is input again to determine the optimal inspection condition. This series of operations is called “small area trial inspection”. The threshold may be determined by a combination of thresholds of a plurality of items. The parameters such as thresholds and filters set here are stored as parameters in the process file.

Various parameters necessary for inspection can be set by the above various inputs. However, in an actual semiconductor wafer, process variations within a wafer surface and process variations between wafers or between production lots may occur. Therefore, setting the image processing conditions only in the small area trial inspection (the flowchart S19 in FIG. 5) is not sufficient, and it is necessary to finally determine the threshold value of the defect determination in consideration of the variation. Therefore, after completion of the threshold setting, an arbitrary area is further set in the whole surface of the wafer to be inspected, and the inspection is executed under the conditions set up to now (flowchart S20 in FIG. 5), and the defect detection level and the erroneous detection level are set. After confirming the above, if the conditions are finally appropriate, the various parameters input so far are registered in the type file and the process file. This step is called a final test inspection.

When the input in the various steps up to now is completed, the result is designated by specifying the type file name and the process file name and saved (flowchart S21 in FIG. 5), and the wafer is unloaded (flowchart S22 in FIG. 5). To complete a series of setting operations for recipe creation (flowchart S2 in FIG. 5).
3) Yes.

The above is the general flow of recipe creation. In the above flow, each process between each condition setting item from electron beam irradiation condition selection (flow chart S10 in FIG. 5) to final trial inspection (flow chart S20 in FIG. 5) is as follows.
By selecting a tab displaying an item name in the screen, it is possible to freely advance or return to an arbitrary processing item.

In the preparation of recipes, there are many items in which an image or the like is obtained using an actual semiconductor product wafer itself and parameters are determined from the image. However, as described above, depending on the item, only the numerical value may be changed. For example, when changing the inspection area (inspection chip), the inspection target wafer is not required. The following describes an example of the relationship between the content of condition settings and changes assumed in recipe creation and the processing items required in the recipe creation mode at that time. Type file,
When a new condition file is created for both the process file, the conditions are entered for all the items described above. If a recipe is created for a wafer that has the same recipe as the product and process for which the recipe has already been created, and the recipe is created for a wafer with a different process, the data of the existing product file can be applied as it is to the chip array and memory cell area. Regarding other electron beam irradiation conditions, alignment conditions, calibration conditions, inspection areas, filters and threshold values for image processing, optimal conditions are set for the material and surface shape of the wafer to be inspected. If the alignment mark is changed on a wafer of a product or process for which a recipe has already been created, the coordinates of the alignment mark and the image to be saved,
It is only necessary to change a part of the file such as the offset from the origin. Therefore, existing file conditions can be used as they are for the electron beam irradiation conditions, chip arrangement, calibration conditions, inspection areas, and the like. Further, when only the setting of the inspection area is changed, it is not necessary to load the wafer, only the inspection area is changed, and the other inspection conditions can be used. With conventional inspection equipment, when creating, changing, or modifying recipes,
The wafer must always be loaded into the inspection device. In the present embodiment, in the case of only changing the numerical value, in order to enable the change without loading the wafer, as shown in the flow of FIG. By specifying "change only", the kind file and process file required for the inspection can be called without loading the wafer, and only the numerical value can be changed for specific parameters that can be handled only by changing the numerical value. In this way, by separating the recipe creation sequence for items that need to be loaded with wafers and items that do not need to be loaded, recipes can be created and changed for unnecessary items without loading the wafer to be inspected.

FIGS. 7 to 18 show examples of screens in the inspection mode and the recipe creation mode of the inspection apparatus of this embodiment.

The procedure of the first embodiment is shown in FIG. 6 and the layout of the control unit monitor 95 is shown in FIGS. 7 to 10 and FIGS. 11 to 14.

The inspection apparatus has a recipe creation mode, an inspection mode, a defect confirmation mode, and a utility mode. The recipe creation mode is a function for setting inspection conditions in advance. The inspection mode is a mode in which inspection and defect confirmation of inspection results are executed according to the conditions set in the recipe creation. The mode and the utility mode perform various auxiliary functions. The inspection mode and the recipe creation mode, which are typical modes, will be described.

In the inspection mode, in FIG. 7, after the inspection condition input S61 is performed, the substrate to be inspected is loaded S62 by a substrate loading mechanism (not shown), and the alignment S63 for measuring the arrangement of the substrate is performed. Is performed, and a stripe inspection S65 for acquiring an image and extracting defects by image processing is performed. Next, the defect extracted in the stripe inspection S65 is confirmed in the step of defect confirmation S66, and the result output S6
In step 7, defect information and a confirmation result are output. After the inspection, the substrate is unloaded S by a substrate unload mechanism (not shown).
68.

These operations will be described in detail. That is, FIG. 8 shows the layout of the control unit monitor 95 in the initial state. A time display area <1>, a device ID display area <2>, an inspection target board name display area <3>, an operator name display area <4>, and a message area <5> for displaying various messages are arranged at an upper part of the screen. are doing. In the lower part of the screen, an inspection mode instruction button <6> for instructing the start of inspection, a defect confirmation mode instruction button <7> for instructing defect confirmation, a recipe creation mode instruction button <8> for instructing recipe creation, and a utility call are issued. A utility mode instruction button <9> and a system end button <10> for instructing system end are arranged.

In the inspection mode, the inspection is started by clicking the inspection instruction button <6>. When the inspection is started, the layout of the control unit monitor 95 shifts to FIG. 9, and the inspection conditions are input. In the figure, a message prompting input of inspection conditions is output to a message area <1>, a cassette display area <2> for displaying a substrate mounted on the apparatus is displayed, and an operator sets a substrate <2> to be inspected to a cassette. Is selected, and the inspection condition of the substrate <2> is changed to the inspection condition setting area <4>.
To enter. By selecting the inspection start button <5> after these operations, the type and process information specified by the inspection conditions are read, and the inspection conditions are set in the image processing circuit 82 by the inspection condition setting means 83 based on the type and process information. . The substrate 64 is loaded on the stages 46 and 47 by the loader S62 according to the type and process information.

After the load S62 is completed, an alignment S63 for measuring the position of the pattern based on the pattern information on the substrate 24 to be inspected and a calibration S for measuring the detected light amount
Perform 64.

Next, a stripe inspection S65 is performed. Prior to the description of the stripe inspection, the layout of the substrate and the operation during the stripe inspection will be briefly described with reference to FIG.

The substrate 200 (24 in FIG. 1) is divided into a plurality of chips 201. A plurality of these are designated as inspection target chips 202. When inspecting the inspection target chip 202, the stages 46 and 47 are inspected in synchronization with the movement in the Y direction. The inspection accompanying this movement is called one stripe and is indicated as 203 on the drawing. After completion of one stripe inspection, the stages 46 and 47 are moved in the X direction to perform the next one stripe inspection. By repeating this, all the chips to be inspected 202 are inspected.

The stages 46 and 47 are moved to the stripe inspection start position, and the inspection area is sequentially scanned. Stage 4
The electron beam 34 emitted from the electron source 25 is scanned in the X direction by the deflector 59 in synchronization with the scanning in the Y direction 6 and 47. At this time, the secondary electrons generated from the substrate 200 are detected by the secondary electron detection unit 22, and the detection signal is converted into a digital image by the AD converter 37 and stored in the storage unit 81. At the same time, the images stored in the storage means are sequentially read out by the image processing circuit 82, and a difference between the target image and an image expected to be the same image as the target image is calculated to extract a location having a large difference as a defect. . The extracted defect is stored in the defect data buffer 84. The stored defect data is read by the overall control unit. When the scanning in the Y direction of the stages 46 and 47 is completed, the stages 46 and 47 are moved in the X direction by the width scanned by the blanking deflector 28. FIG. 1 shows the stage movement <4>. As a result, one stripe inspection, which is an inspection for 1Y stage scanning, can be performed.

By repeating one stripe inspection sequentially, all the regions to be inspected can be inspected. After the inspection of all the areas is completed, defect data stored in the overall control unit is subjected to defect confirmation S66. FIG. 11 shows a GUI layout of the control unit monitor 95 in the defect confirmation S66. In this figure, the map <7> shows the distribution of defects and the defects of interest <4>,
The image of the noted defect <4> is displayed on the image display section <8>,
The information on the defect of interest <4> is displayed as defect information <5>.

An image switching button <1> is displayed below the image display section <8>. By clicking the image switching button <1>, an image of a light microscope and a SEM image of a defective portion are switched and displayed. Can be. The operator judges the image displayed on the image display section <8> and writes the judgment defect into the classification code <3> in the defect information <5>. The defect ID
<2> is the serial ID of the defect, and the defect of interest <4> can be changed by rewriting the defect ID. When the defect of interest is changed, the display is also changed.

When the necessary classification number has been written, the defect confirmation S66 is terminated by clicking the end button <6>, and the defect data and the classification code written in the defect confirmation are output as a file in the result output S67. If necessary, information equivalent to the information output to the file is output to a storage medium such as a line management system or Mo that manages the lines. After the result output S67 is completed, the substrate 24 to be inspected is unloaded S68, the inspection is terminated, and the screen returns to the initial screen in FIG. Although the inspection of only one substrate has been described, the inspection of a plurality of substrates can be continuously performed by designating a plurality of substrates in the condition input S61.

FIG. 11 shows a recipe creation mode. In the figure, the recipe creation mode includes inputting conditions S101, loading an inspection target substrate S102, and sequentially setting the following items. These are basically done in order,
It can be performed in any order.

1) Contrast setting S103 for setting the conditions of the electron optical system.

2) Matrix setting S104 for setting board layout information.

3) Alignment setting for measuring the arrangement of substrates and alignment setting S1 for trial of alignment
05.

4) Cell area setting S106 for designating a memory cell area on the substrate.

5) Inspection area setting S1 for setting an inspection area
07.

6) Calibration for confirming the amount of light detected by the substrate and calibration setting S108 for trial of calibration.

7) Trial test S109 for setting and trial of test conditions.

8) Final test inspection S110 for finally confirming the set inspection conditions. After these settings are completed, the substrate is unloaded S11.

Only the relevant portions of these operations will be described in detail. That is, by clicking the recipe creation mode instruction button <8> in the layout diagram 8 of the control unit monitor 95 in the initial state, the screen is transited to the recipe condition input screen in FIG. In the figure, a message prompting input of a condition is output to a message area <1>, a set display area <2> for displaying a board mounted on the apparatus is displayed, and a current setting item is displayed and selected at the top of the screen. Selection tab <7>, product and process setting areas <3> and <4>, electron beam irradiation condition setting area <5> for setting conditions of the electron optical system, and load for instructing loading of the substrate 24 to be inspected. Button <6> is arranged.

The operator selects one of the cassettes for the board 24 to be inspected for which a recipe is to be prepared, and inputs the type and process name of the board 24 into <3> and <4>. If the type process information is already set by selecting the load button <6> after these operations, the type and process information are read as default conditions, and if new, the system is set. Read initial values as default conditions. The substrate 24 to be inspected is loaded on the stages 46 and 47 by a loader according to the type and process information. Road S102
After finishing, make various settings. Here, a description will be given of a test test S109 for setting related test conditions and a final test test S110 for finally checking the set test conditions.

In the test inspection S109, when the selection tab <7> made valid after the loading is selected, the layout of the control unit monitor 95 shifts to FIG. In the layout of FIG. 14, a map part <1> for displaying the current position and the defect of the substrate is shown.
And an image display unit <2> for displaying an image of a current position or a defective portion, and an image acquisition button <3> for instructing image acquisition.
A virtual inspection button <4> for instructing a defect extraction by image processing of the image acquired by the image acquisition button <3>, a setting button <5> for finalizing the setting, and a cancel button <6> for canceling the setting. And a sensitivity condition setting section <7> for setting image processing conditions.

FIG. 14, which is the layout of the initial state, shows the whole substrate to be inspected 24 and the current stage 4 in the map <1>.
6 and 47 are displayed, and the image display <2> shows the light microscope 1
Nine images are displayed. Here, the substrate 24 to be inspected is divided into a plurality of chips in a grid. Map <1>
By clicking, the positions of the stages 46 and 47 are changed, and the place where the condition setting is set is selected. By clicking the image acquisition button <3> after the selection, an image for a chip at the current position of one stripe inspection is acquired.

The stages 46 and 47 are moved to the scanning start position, the stages 46 and 47 are scanned in the Y direction, and the electron beam 34 emitted from the electron gun 25 is synchronized with the scanning in the Y direction by the scanning deflector 30 for X-ray scanning. Scan in the direction. At this time, the inspection target substrate 2
The secondary electrons 71 generated from 4 are detected by the secondary electron detector 35, the detection signal is converted into a digital image by the AD converter 37, and stored in the storage means 81. Sensitivity condition setting section <7>
Are set, and the layout of the control unit monitor 95 is changed as shown in FIG.
Transition to. In FIG. 14, when the virtual inspection button <4> is clicked, the condition of the sensitivity condition setting section <7> is set in the image processing circuit 82 by the inspection condition setting means 83, and the storage means 8
The digital image stored in 1 is subjected to image processing under the set conditions to extract a defect and stored in the defect buffer 84.

FIG. 15 shows a stripe map <1>, an image display section 88 for displaying images of individual defect positions, a total defect display area <8> for displaying the total number of defects, and an actual defect for displaying the actual number of defects. A display area <9> and a defect information display area <10> for displaying information of individual defects and inputting a classification code.
And the graph button <1 to call the graph display option
4>. The stripe map <1> is obtained by dividing an area for one chip of one stripe elongated in the Y direction into four and arranging them horizontally.

The position of the defect stored in the defect buffer 84 is indicated by a dot of the defect <11> on the map. By clicking on the displayed point, the storage means of the defect position <11>
The upper image is displayed in the image display section 88, and the defect information is displayed in the defect information display area 89. By inputting the classification code, the defect <11> on the stripe map <1> is changed to the X point of the true defect <12> after classification or the □ point for the non-target defect <13> after classification, True defects <1 after classification of actual defects
2) and the total number of defects are changed to (the number of detected defects−the total number of non-target defects after classification <13>). Here, the once-determined true defect <12> after classification and the non-target defect <13> after classification are stored. Defects within a certain distance during subsequent inspections are stored in advance with the classification code <10>. Is given. The display map 87 and the input of the classification code are repeated to display the distribution of defects on the stripe map <1>, the number of classified defects displayed in the total defect display area <8>,
The number of true defects displayed in the actual defect display area <9> is referred to. As a result, the operator determines whether or not a defect to be detected is detected, and whether an extra defect is detected.

If the inspection condition is inappropriate as a result of the determination, the inspection condition is set again in the sensitivity condition setting section <7>, and the inspection is executed by clicking the virtual inspection button <4>. By repeating these operations, an inspection condition suitable for the inspection is searched. When the condition check at one place is completed, the map section 87 is displayed on the entire substrate as necessary, and the image display area 88 is displayed.
Is switched to the light microscope image display by the optical microscope 19, the condition setting place is selected again, and the process from image acquisition to condition setting is repeated.

When these conditions are determined to some extent, the layout of the control unit monitor 95 is shifted to FIG. 16 by clicking the graph button <14> in the figure. FIG.
Is a sensitivity display area <1> for displaying the lateral shift and the brightness set value set in the sensitivity condition setting section <7> in FIG.
A graph range setting area <14> for setting an inspection condition setting range and a setting step for drawing a graph, and setting of lateral displacement and brightness on the XY axes, the number of true defects after classification, or (total defect number−classification) 3D with post-target defect count) as the Z-axis
It comprises a 3D graph <13> for displaying a graph, a calculation button <12> for instructing graph drawing, and a return button <15> for returning from the graph option. Upon transition to the layout of FIG. 15, the setting value of the sensitivity condition setting unit <7> of FIG. 15 is set in the above-described sensitivity display area <1>, and the sensitivity condition setting of FIG. 15 is set as an initial value in the graph range setting area <14>. The set value of the section <7>, step is displayed as 1. The operator rewrites the graph range setting area <14> and clicks the calculation button <12>. When the button is clicked, the image processing conditions are sequentially changed in steps set within the range set in the graph range setting area <14>, and the following processing is performed. 1) Image processing circuit 8 via inspection condition setting means 83
2, the digital image stored in the storage means 81 is subjected to image processing under the set conditions to extract a defect, and stored in the defect buffer 84. 2) The contents of the defect buffer are read out, and if the distance (comparative difference) between the individual defect and the already classified defect is equal to or smaller than a certain value, the defect is classified. 3) The number of true defects or (total number of defects-number of non-target defects after classification) is obtained after the assignment, and is set as defect number data of the inspection condition. After the processing is completed, the image is displayed as a 3D graph in the 3D graph <13>.

The final test inspection S110 will be described.
When the selection tab <7> in FIG. 13 that is enabled after the loading is completed, the layout of the control unit monitor 95 transits to FIG. The layout shown in FIG. 17 includes a map section 87 for setting a chip to be inspected on the board 24 to be inspected, a sampling rate setting area <3> for setting a sampling rate, a map section 87, and a sampling rate setting area <3>. A setting button <2> for validating the set chip to be inspected and the sampling rate, a cancel button <4> for canceling the setting, a stripe inspection S65, and a defect confirmation S66.
Start button <5> for starting the game, the total number of chips,
The information display area <6> displays the number of test chips, the area to be tested, and the expected time of the stripe test.

FIG. 17 shows a map 87 in the initial state.
And the sampling rate setting area <3> display the chip to be inspected and the sampling rate designated by the inspection area setting S107, and the information display area <6> displays the value determined by the chip to be inspected and the sampling rate. I have. The operator reverses the validity / invalidity of the chip to be inspected by dragging the area on the map, and changes the sampling rate by reselecting the sampling rate display of the sampling rate setting area <3> from the candidates. After making the change, click the Set button <2> to make the change effective, and click the Cancel button <4> to cancel the change.
Returns the screen to its initial state. By clicking the start button <5> after setting or canceling, the stripe inspection S65 and the defect confirmation S66 in the inspection mode are started, and the operator confirms the validity of the inspection conditions on the screen layout diagram 10 of the defect confirmation S66. Clicking the end button <6> in FIG. 10 returns to the screen layout diagram 17 of the final trial inspection S110.

A first modification of the first embodiment will be described. The image display unit 88 on the layout of the test inspection shown in FIG. 13 can display not only the image of the defective part but also the intermediate result of the processing such as the difference image in the image processing circuit 82 at the same time. Thereby, the processing result can be more visually confirmed.

A second modification of the first embodiment will be described with reference to FIG. 18 showing a layout. The layout includes a map section <1> for displaying the current position of the substrate and the defect, an image display section <2> for displaying an image of the current position or the defective section,
An image acquisition button <3> for instructing image acquisition, a setting button <5> for confirming the settings, a cancel button <6> for canceling the settings, and a sensitivity condition setting unit <7> for setting image processing conditions. The layout in the initial state is shown in FIG. In the figure, the map of the substrate to be inspected 24
The entire position and the current positions of the stages 46 and 47 are displayed.
The image of the light microscope 19 is displayed on the image display section <2>. Click the map <1> to enter Stage 4
The positions of 6, 47 are changed, and the place where the condition setting is set is selected. By clicking the image acquisition button <3> after the selection, an image for a chip at the current position of one stripe inspection is acquired. The stages 46 and 47 are moved to the scanning start position, the stages 46 and 47 are scanned in the Y direction, and the electron beam 34 emitted from the electron gun 25 is scanned in the X direction by the scanning deflector 30 in synchronization with the scanning in the Y direction. I do. At this time, the inspection target substrate 2
The secondary electrons 71 generated from 4 are detected by the secondary electron detection unit 22, and the detection signal is converted into a digital image by the AD converter 37 and stored in the storage unit 81. Sensitivity condition setting section <7>
Are set, and the layout of the control unit monitor 95 is changed as shown in FIG.
Transition to. FIG. 19 shows a stripe map <1>, an image display unit <2> for displaying an intermediate result of image processing such as a difference image, an image display button <2> for instructing display of an acquired image, and an intermediate result of image processing. And a difference image display button <3> for instructing the display of the difference image. By clicking on the stripe map <1>, the designated point <4> is displayed as a dot on the map, and the acquired image of the designated point <4> is displayed on the image display section <2>. By clicking the difference image display button <3>, the image processing intermediate result is displayed on the image display unit 88. By clicking the image display button <2>, the acquired image is displayed on the image display section 88. By changing the sensitivity condition setting section <5> for setting the image processing conditions while the image processing result is being displayed on the image display section 88, the image processing is performed again and the intermediate result is displayed again. As a result, the operator determines whether or not a defect to be detected is detected, and whether an extra defect is detected. Although the description has been given of displaying the intermediate results of the image processing, it is needless to say that equivalent image processing may be performed or image processing advantageous for determining the image processing conditions may be performed and displayed. According to this modification, the inspection condition can be determined based on the image of the area other than the defective portion, and the condition can be set in a place where there is no defect.

A third modification of the first embodiment will be described. That is, in the 3D graph <13> of FIG. 16, the range in which the number of true defects is the maximum value and (the total number of defects-the number of non-target defects after classification) is equal to the number of true defects and the center thereof are obtained, and the inspection is performed. Conditions and differential inspection conditions are displayed together. According to this modification, inspection conditions can be more visually indicated.

A fourth modification of the first embodiment will be described. FIG. 20 shows a GUI layout of the control unit monitor 95 at the time of the defect confirmation S66. Wafer map <1> and defect <6> for enlarged display of the wafer and easy confirmation of the position of defect <6>
A defect filter for selecting a defect to be displayed on the wafer map <1> or for changing the display order based on the image display unit <2> for displaying the image of the unit and the defect feature amount and the feature of the position distribution. Although not displayed on the screen to display the filter instruction section <3> in place of the defect filter instruction section, defect information <5> for displaying defect information in FIG. 11 and a defect filter instruction section < Replacement button <7> for replacing 3> with defect information <5> in FIG.
Image adjustment button <4> for changing the adjustment state of the image displayed on the image display unit, image storage button <5> for storing the displayed image on the disc and the auxiliary storage device, and a recipe. An inspection result save button <8> for saving the result of a trial inspection during creation is provided, and an overflow display <9> indicating that the defect data could not be processed in hardware or software.

By clicking the replacement button <7>, a defect filter instruction section <3> is displayed. By specifying a filter condition, defects displayed on the map <1> are narrowed down to necessary ones. By changing the order of the defects displayed in <5>, sorting is performed in descending order of importance. By clicking the replacement button <7>, information on the defect is displayed in the defect information <5>, and an image corresponding to the defect position is displayed in the image display section <2>. If necessary, click the image adjustment button <4> to adjust image quality such as contrast adjustment, signal amount adjustment, histogram flattening, focus position adjustment, astigmatism adjustment, differentiation, etc., or detection condition change It is assumed that necessary information can be easily obtained from the displayed image by making improvements.
In addition to the image quality improvement, an image histogram, a waveform display of a designated portion, an image gradation value display, an overlap display of a result of a defect extraction process on a display image or an instruction of a defect position, a difference image of an intermediate result of the defect extraction process, etc. The image information display and the defect extraction process are performed by displaying the image. Generally, inspection results are not stored during recipe creation, but inspection results can be stored by clicking the inspection result storage button <8>. The stored test results can be output to an analyzer, a review device, or the like via an auxiliary storage device or a network. By clicking the image save button <4>, the image currently displayed on the image display section <2> is stored in an auxiliary storage device such as a disk or Mo. When storing, information for associating with the inspection result is stored together with the image data.

The information displayed on the wafer map <1> includes defect, chip information, inspection area, memory cell area,
A scale indicating the size of the map of the current stage position and an overflow display <9> are set. The overflow display <9> is displayed when a large number of defects have occurred such as when a scratch or a huge foreign substance has adhered to the wafer, and the wafer cannot be processed by hardware or software. As a result, it can be seen that there are more defects than the displayed number of defects, and necessary judgment can be made without being confused by the apparent defect distribution.

[0106] Since the map can be enlarged by these, the defect distribution can be easily identified, the defect shape can be easily identified by enlarging the image, the important defect can be easily selected by the defect filter, and the image adjustment button can be easily adjusted. Defective parts can be identified, and necessary information can be stored by storing images and storing results.

It is needless to say that this function can be applied to the defect confirmation in the final trial inspection as part of the recipe creation or the defect confirmation after the inspection in the inspection sequence.
The functions of map enlargement, display contents, display image enlargement, image quality adjustment, and image storage can be applied to all screens.

[0108]

According to the present invention, chip inspection and wafer removal frequency inspection can be performed quickly while looking at the screen, and defects throughout the product or defects in a specific area can be quickly detected. Changes in conditions can be reliably detected and fed back to the process.

Further, according to the present invention, inspection defects after the fine pattern forming step / resist development, the fine pattern forming step / etching, the hole pattern forming step, and the cleaning can be quickly detected by screen display.

By applying the present inspection to the substrate product process, defects which could not be detected by the above-described conventional technology, that is, abnormalities in product devices and conditions, etc., can be quickly determined by referring to the screen formed by the screen forming and displaying means. As a result, it is possible to quickly detect abnormalities in the substrate manufacturing process, thereby reducing the defect rate of semiconductor devices and other substrates and increasing productivity. In addition, by applying the above inspection,
Since the occurrence of an abnormality can be detected quickly, the occurrence of a large number of defects can be prevented beforehand, and as a result, the occurrence of the defects can be reduced, so that the reliability of the semiconductor device and the like can be improved. The efficiency of development of new products can be improved, and the manufacturing cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a device configuration of a circuit pattern inspection device.

FIG. 2 is a partial configuration diagram of FIG. 1;

FIG. 3 is a diagram illustrating a hierarchy of an inspection condition file.

FIG. 4 is a diagram showing a screen configuration at the time of inspection.

FIG. 5 is a diagram showing an inspection flow.

FIG. 6 is a view showing an alignment method.

FIG. 7 is a diagram showing an inspection condition setting (recipe creation) flow.

FIG. 8 is an operation screen diagram of an inspection mode.

FIG. 9 is an operation screen diagram of an inspection mode.

FIG. 10 is an operation screen diagram of an inspection mode.

FIG. 11 is an operation screen diagram of an inspection mode.

FIG. 12 is a diagram showing a recipe creation flow.

FIG. 13 is a diagram showing a screen configuration when a recipe is created.

FIG. 14 is a diagram showing a screen configuration when a recipe is created.

FIG. 15 is a diagram showing a screen configuration when a recipe is created.

FIG. 16 is a diagram showing a screen configuration when a recipe is created.

FIG. 17 is a diagram showing a screen configuration when a recipe is created.

FIG. 18 is a diagram showing a screen configuration when a recipe is created.

FIG. 19 is a diagram showing a screen configuration when a recipe is created.

FIG. 20 is a scanning screen diagram of an inspection mode according to another embodiment.

[Explanation of symbols]

16 ... Circuit pattern inspection device, 17 ... Inspection room, 18 ... Electronic optical system, 19 ... Optical microscope, 20 ... Operation unit, 21 ... Control unit, 22 ... Secondary electron detection unit, 23 ... Sample room, 24 ... Inspection Substrate, 25: electron gun, 26: electron beam extraction electrode,
27: condenser lens, 28: blanking deflector,
Reference numeral 29: diaphragm, 30, 59: scanning deflector, 31: objective lens, 32: reflector, 33: ExB deflector, 34: electron beam, 35: secondary electron detector, 36: preamplifier, 37 ...
AD converter, 38: light conversion means, 39: light transmission means, 4
0: Electric conversion means, 41: High voltage power supply, 42: Preamplifier drive power supply, 43: AD converter drive power supply, 44: Reverse bias power supply, 45: Sample stage, 46: X stage, 47: Y stage, 48: Position monitor Length measuring device, 49: height measuring device for inspected substrate, 50: white light source, 51: optical lens, 52:
CCD camera, 53: first image storage unit, 54: second image storage unit, 55: comparison operation unit, 56: defect determination processing unit, 5
8: correction control circuit, 70: objective lens power supply, 71: secondary electron, 72: second secondary electron, 95: control unit monitor, 1
00: inspection flow display area; 101: guidance display area.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasutsugu Usami 882-Chair, Oaza-shi, Hitachinaka-city, Ibaraki Pref., Ltd.Measurement Division, Hitachi, Ltd. No. 20 No. 1 F term in the Semiconductor Business Division of Hitachi, Ltd. (Reference) 2G051 AA51 AA65 AB02 AC01 BA01 BA10 BA20 BB09 CA03 CA07 CA20 CC07 CD04 CD06 DA01 DA07 DA09 EA02 EA08 EA11 EA12 EA14 EB01 EB02 EB09 EC01 EC04 ED01 ED01 FA04

Claims (23)

[Claims] 1. A substrate having a plurality of circuit patterns originally formed to have the same shape is irradiated with charged particles.
A digital image of a plurality of circuit patterns formed to have the same shape on the substrate surface by using a signal of the detected secondary charged particles, detecting secondary charged particles generated from the substrate surface by the irradiation. And a circuit pattern inspection method for detecting a defect of the circuit pattern by using the digital image of the substrate surface obtained sequentially, obtaining a digital image of a designated area of the substrate surface, and setting conditions for the digital image. The image processing is performed one or more times while changing the conditions, and the conditions for comparing the sequentially obtained digital images are obtained based on the result of performing the image processing once or more times while changing the conditions, and the obtained conditions are stored. Using the stored conditions, comparing the sequentially obtained digital images to extract defects, and displaying the extracted image of the defective portion on a screen. Road pattern inspection method. 2. The method according to claim 1, wherein the light is applied to the substrate surface on which the circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. In a circuit pattern inspection method for detecting a pattern defect by displaying a difference extracted by the comparison and displaying the difference extracted by the comparison, an image of a specified area on the substrate surface is detected, stored as a digital image, and stored. A difference is extracted by one or more comparisons with respect to the obtained digital image under different conditions, and the appropriateness of the image processing condition is determined from the extraction result to search for the comparison condition that allows the difference to be extracted. Storing the searched condition, extracting a defect by comparison using the stored condition, and displaying an image of the defective portion extracted by the comparison. Over emissions inspection method. 3. The method according to claim 1, wherein the light is applied to the substrate surface on which the circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. Circuit pattern inspection method for detecting a pattern defect by extracting a difference by displaying the difference extracted by the comparison, and instructing an image detection of a specified area of the substrate surface on the operation screen. By extracting conditions by comparing the stored digital image by specifying conditions on the operation screen, displaying the extracted result on the operation screen, and determining whether the image processing conditions are appropriate. Search for the comparison condition that enables the difference to be extracted by the judgment, store the searched condition, extract the defect by comparison using the stored condition, and extract by the comparison. Circuit pattern inspection method and displaying images of defect portion. 4. The method according to claim 1, wherein light is applied to the surface of the substrate on which the circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. Circuit pattern inspection method for detecting a pattern defect by extracting a difference by displaying the difference extracted by the comparison, and instructing an image detection of a specified area of the substrate surface on the operation screen. By extracting conditions by comparing the stored digital image by specifying conditions on the operation screen, displaying the defect position as the extraction result on the operation screen, By instructing acquisition of an image of a defect position, an image stored as a digital image of the defect position is displayed, and differences can be extracted under the determined image processing conditions. A circuit pattern for instructing a condition for the comparison, storing the instructed condition, extracting a defect by comparison using the stored condition, and displaying an image of the defective portion extracted by the comparison. Inspection methods. 5. The method according to claim 5, wherein light is applied to the substrate surface on which the circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. A circuit pattern inspection method for detecting a pattern defect by extracting a difference and displaying the difference extracted by the comparison. Setting image processing conditions using the stored image; applying the image processing conditions set by the setting to a digital image obtained from a detection signal of an area wider than the designated area to extract a difference by comparison Then, the set image processing condition is confirmed by displaying the difference extracted by the comparison, the confirmed condition is stored, and the comparison is performed using the stored condition. A circuit pattern inspection method, wherein a defect is extracted and an image of a defective portion extracted by the comparison is displayed. 6. The method according to claim 6, wherein light is applied to the surface of the substrate on which the circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. A circuit pattern inspection method for detecting a pattern defect by extracting a difference and displaying the difference extracted by the comparison. Setting an image processing condition using the stored image; applying the image processing condition set by the setting to a digital image obtained from a detection signal of an area wider than the designated area to extract a difference due to comparison And displaying all or a part of the positions where the differences extracted by the comparison have occurred, and reacquiring a digital image of a detection signal at a position selected from the displayed positions. Confirming the image processing conditions set using the reacquired image, storing the confirmed conditions, extracting a defect by comparison using the stored conditions, and extracting an image of the defective portion extracted by the comparison. A circuit pattern inspection method characterized by displaying: 7. A light beam on a substrate surface on which a circuit pattern is formed.
Alternatively, the charged particles are irradiated, a signal generated from the substrate surface by the irradiation is detected, the detected signal is stored as a digital image, and the stored image is compared with an image expected to be the same image. In a circuit pattern inspection method for detecting a pattern defect by displaying a difference extracted by the comparison and displaying the difference extracted by the comparison, a detection signal of a specified area of the substrate surface on an operation screen is stored as a digital image. Setting image processing conditions using the stored image; applying the image processing conditions set by the setting to a digital image obtained from a detection signal of an area wider than the designated area; extracting a difference by comparison Then, the position where the difference extracted by the comparison has occurred is displayed, the digital image of the detection signal at the position selected from the displayed position is reacquired, and the reacquired digital image is obtained. Check the set the image processing conditions using an image, stores the confirmed conditions, by extracting a pattern defect by comparison with the stored condition, the circuit pattern inspection method and displaying. 8. A wafer substrate surface having a plurality of circuit patterns originally formed to have the same shape is irradiated with charged particles, and the irradiation generates from the wafer substrate surface.
Detecting secondary charged particles, sequentially obtaining digital images of a plurality of circuit patterns formed so as to have the same shape on the substrate surface by using the signals of the detected secondary charged particles, and sequentially obtaining the wafer substrate A circuit pattern inspection method for detecting a defect of a circuit pattern using a digital image of a surface, wherein a map of the wafer and a defect image of a defect location at a location designated on the map are displayed in parallel. Circuit pattern inspection method. 9. The circuit pattern inspection method according to claim 8, wherein an inspection area or a memory hill area is displayed on the map. 10. The map according to claim 8, wherein the map displays inspection information such as a defect position, wafer chip information, a current stage position, and a scale indicating the size of the map. Characteristic circuit pattern inspection method. 11. The circuit pattern inspection method according to claim 8, wherein a defect to be displayed is selected or defect filtering for rearranging the order is performed. 12. The circuit pattern inspection method according to claim 8, wherein the map or the defect image is enlarged and displayed. 13. A method for irradiating charged particles on a wafer substrate surface having a plurality of circuit patterns originally formed to have the same shape, detecting secondary charged particles generated from the wafer substrate surface by the irradiation, Using a signal of the detected secondary charged particles, digital images of a plurality of circuit patterns formed so as to be originally the same shape on the substrate surface are sequentially obtained,
In the circuit pattern inspection method for detecting a defect of the circuit pattern using the digital image of the wafer substrate surface obtained sequentially, the digital image of the circuit pattern is subjected to image processing to extract the defect, and the sensitivity condition and the data of the number data of the defect are extracted. A circuit pattern inspection method characterized by displaying a graph indicating a relationship. 14. The method according to claim 13, wherein when the distance between each of the extracted defects and the already classified defect is equal to or less than a predetermined value, the classified class is assigned to the class, and defect number data is obtained after the assignment. A circuit pattern inspection method characterized by the above-mentioned. 15. Irradiating means for irradiating charged particles on a substrate surface on which a circuit pattern is formed, detecting means for detecting a signal generated from the substrate surface by the irradiating means, and digitally converting the signal detected by the detecting means. Storage means for storing the image as an image, comparison means for comparing the stored image with an image expected to be the same image to extract a difference, and display means for displaying the difference extracted by the comparison means A circuit pattern detection device comprising: a means for designating an image detection position on a substrate surface; an image acquisition means for detecting and storing an image at a position designated by the designation means; and setting conditions to be used for the comparison means. Condition setting means, image processing means for performing image processing on the image obtained by the image obtaining means under the conditions set by the condition setting means, and processing results of the image processing means Processing condition display means for displaying conditions, designating means for designating conditions under which a difference can be extracted from the processing result, condition storage means for storing conditions set by the designating means, A circuit pattern inspection apparatus comprising a setting unit. 16. Irradiation of light such as laser light or a charged particle beam onto the surface of a substrate on which a circuit pattern of a wafer is formed;
A signal generated from the substrate due to the irradiation is detected, a signal obtained by the detection is imaged and stored, and the stored image is compared with another image formed from the same circuit pattern. In a circuit pattern inspection method for displaying an image processing result on a circuit pattern from the above, an image at a specified location on a wafer map is obtained, and the obtained image is subjected to image processing under specified conditions,
A circuit pattern inspection method characterized by displaying an image processing result, changing a setting condition, repeatedly performing image processing, and determining an inspection setting condition. 17. A method of irradiating a substrate surface on which a circuit pattern of a wafer is formed with light such as laser light or a charged particle beam,
A signal generated from the substrate due to the irradiation is detected, a signal obtained by the detection is imaged and stored, and the stored image is compared with another image formed from the same circuit pattern. In a circuit pattern inspection method for displaying an image processing result on a circuit pattern from the above, an image at a specified location on a wafer map is obtained, and the obtained image is subjected to image processing under specified conditions,
In addition, the results of image processing are displayed and the setting conditions are changed to irradiate light once or repeatedly, and the charged particle beam is irradiated once to repeatedly perform image processing on the image obtained, and the inspection setting conditions A circuit pattern inspection method, characterized in that: 18. Irradiating means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light, laser light or charged particle beam, detecting means for detecting a signal generated from the substrate by the irradiation, and detecting means Means for imaging and storing the signal detected by the above, a comparing means for comparing the stored image with an image formed from another identical circuit pattern, and an image processing result on the circuit pattern from the comparison result Circuit pattern inspection apparatus comprising: display means for displaying a display means for setting a temporary inspection area on a recipe creation screen; means for setting an inspection area by the means; and instructing inspection of the set area. A circuit pattern inspection apparatus comprising: 19. A light or laser beam or a charged particle beam is irradiated on a substrate surface of a wafer on which a circuit pattern is formed,
A signal generated from the substrate due to the irradiation is detected, a signal obtained by the detection is imaged and stored, and the stored image is compared with another image formed from the same circuit pattern. In the circuit pattern inspection method that displays the image processing result on the circuit pattern from, the temporary inspection area is set during recipe creation, and the state of the recipe being created is checked while the inspection result is confirmed in the set area. A circuit pattern inspection method characterized by displaying on a screen. 20. Irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light, laser light or charged particle beam, detection means for detecting a signal generated from the substrate by the irradiation, and detection means Means for imaging and storing the signal detected by the above, a comparing means for comparing the stored image with an image formed from another identical circuit pattern, and an image processing result on the circuit pattern from the comparison result A circuit pattern inspection apparatus comprising: a display unit for displaying an image of a designated place on a wafer map; a setting unit of image processing conditions; and an image acquired by the image acquiring unit and the setting unit. Means for performing image processing according to the image processing conditions set by (1) and confirming the image processing result on a screen. Emissions inspection equipment. 21. Irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light, laser light or charged particle beam, detection means for detecting a signal generated from the substrate by the irradiation, and detection means Means for imaging and storing the signal detected by the above, a comparing means for comparing the stored image with an image formed from another identical circuit pattern, and an image processing result on the circuit pattern from the comparison result A circuit pattern inspection apparatus comprising: a display unit for displaying an image of a designated place on a wafer map; a setting unit of image processing conditions; and an image acquired by the image acquiring unit and the setting unit. Means for performing image processing according to the image processing conditions set by (1) and confirming defect information on the circuit pattern. Turn inspection apparatus. 22. Irradiation means for irradiating light, laser light or charged particle beam on a substrate surface on which a circuit pattern of a wafer is formed, detection means for detecting a signal generated from the substrate by the irradiation, and detection means Means for imaging and storing the signal detected by the above, a comparing means for comparing the stored image with an image formed from another identical circuit pattern, and an image processing result on the circuit pattern from the comparison result A circuit pattern inspection apparatus comprising: a display unit for displaying an image of a designated place on a wafer map; a setting unit of image processing conditions; and an image acquired by the image acquiring unit and the setting unit. Means for performing image processing according to the image processing conditions set by (1) and confirming inspection parameters. Apparatus. 23. Irradiation means for irradiating a substrate surface on which a circuit pattern of a wafer is formed with light, laser light or charged particle beam, detection means for detecting a signal generated from the substrate by the irradiation, and detection means Means for imaging and storing the signal detected by the above, a comparing means for comparing the stored image with an image formed from another identical circuit pattern, and an image processing result on the circuit pattern from the comparison result A circuit pattern inspection apparatus comprising: a display unit for displaying an image of a designated place on a wafer map; a setting unit of image processing conditions; and an image acquired by the image acquiring unit and the setting unit. Performs image processing according to the image processing conditions set by the above and confirms the image processing results, which are defect information on circuit parameters and inspection parameters. That means and extracts the difference by comparison with the confirmed condition, the circuit pattern inspection method characterized by displaying a difference extracted by the comparison.