JP2000188515A - Frequency modulation reception circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an FM reception circuit that can demodulate a video signal with excellent quality in an FM batch conversion type optical video transmission system where the signal quality can be improved and its circuit can be made small. SOLUTION: An amplifier section 44, an FM demodulation section 35 and a buffer amplifier section 37 that require processing of a high frequency signal especially are integrated in one chip, and the FM demodulation section 35 adopts a delay detection type FM demodulator optimum to the circuit integration. A first stage limiter amplifier 44 of the delay detection type FM demodulator outputs biphase output signals of in phase and opposite phase, then the circuit is miniaturized by minimizing the circuit configuration and the wiring for delay detection. Thus, impedance at connected parts of each section can be matched with high accuracy and deterioration in a distortion characteristic of a video signal can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency modulation receiving circuit, and more particularly to a frequency modulation receiving circuit in a batch conversion type optical video transmission system.

[0002]

2. Description of the Related Art Conventionally, as a system for distributing a video signal or the like to a subscriber's home in a general home, there is a frequency modulation (hereinafter abbreviated as FM) batch conversion type optical video transmission system using optical communication. . The video signal transmitted by this system is multi-channel amplitude modulation (Amplitud
e Modulation (AM) signal and a multi-channel quadrature amplitude modulation (QAM) signal. These modulated signals are collectively converted into FM electric signals. This FM electric signal is further converted into an optical signal and distributed to each subscriber's home in a general household by optical communication. At each subscriber's house in a general home, an optical network terminator (hereinafter, abbreviated as ONU), which is an optical receiver in the FM batch conversion type optical video transmission system.
Is installed. This ONU demodulates the received optical signal into a multi-channel video signal.

In such an FM batch conversion type optical video transmission system, 1 GHz (hereinafter referred to as G
Hz. ) To 6 GHz. Therefore, an FM receiving circuit that handles such a broadband signal is required to have a transfer characteristic free from distortion.

FIG. 7 shows an outline of the configuration of a conventionally proposed FM receiving circuit. In this FM receiving circuit, an FM receiving signal input from an input terminal 10 is amplified by an amplifier 11 at a predetermined amplification factor. The amplified signal amplified by the amplifier 11 is controlled to a fixed level by an automatic gain control (hereinafter, abbreviated as AGC) attenuator 12. The AGC attenuator 12 monitors the output level of the AGC
By varying the insertion loss of the attenuator 12, constant control of the output level is performed. The fixed-level received signal whose signal level is thus fixed is demodulated by the FM demodulator 14 into a video signal or the like. The video signal and the like demodulated by the FM demodulator 14 are amplified by the buffer amplifier 15 and output from the output terminal 16.

As described above, in the FM receiving circuit, a stable demodulation is performed by the FM demodulator 14 by inputting a demodulated signal controlled to a constant level. This F
As the M demodulator 14, for example, there is a delay detection type FM demodulator.

FIG. 8 shows the outline of the configuration of a conventionally proposed differential detection type FM demodulator. In this delay detection type FM demodulator, an input signal input from an input terminal 17 is input to a limiter amplifier 18. Limiter amplifier 1
8 amplifies the input signal to a predetermined amplitude limit value. The amplified signal amplified by the limiter amplifier 18 to a predetermined amplitude limit value is input to the delay circuit 19 and the logic circuit 20.
The delay circuit 19 can delay the input signal by a fixed delay time τ. On the other hand, the logic circuit 20 can selectively output two types of logical operation results in response to the switching signal 22 input from the switching signal input terminal 21.

The average voltage value Vout of the output signal of the delay detection type FM demodulator is generally expressed as follows, where E is the amplitude of the detection signal and T is the period of the output signal. Note that the detection signal in FIG. 8 corresponds to the output signal of the logic circuit 20. Vout = E · τ / T (1)

That is, referring to the equation (1), when the amplitude E and the delay time τ of the detection signal are fixed, the average voltage value Vout of the output signal is proportional to the frequency of the output signal which is the reciprocal of T. This makes it possible to realize FM detection by conversion between frequency and output voltage. Logic circuit 2
At 0, the logical product of the amplified signal amplified by the limiter amplifier 18 and a signal obtained by logically inverting the amplified signal and delaying by a delay time τ is calculated. In this case, one pulse of the width τ is generated at every rise of the amplified signal by the limiter amplifier 18 within the period T. On the other hand, it is assumed that the logic circuit 20 performs an exclusive OR operation. in this case,
One pulse having a width τ is generated at each rise and fall of the amplified signal by the limiter amplifier 18 within the period T.

FIG. 9 shows an outline of the operation waveform of each part of the FM demodulator shown in FIG. 8 when the exclusive OR is calculated by the logic circuit 20. 2A shows the operation waveform of the amplified signal 23 by the limiter amplifier 18, FIG. 2B shows the operation waveform of the delay signal 24 generated by the delay circuit 19, and FIG. 2C shows the operation waveform of the output signal 25 of the logic circuit 20. ing. By calculating the exclusive OR of the amplified signal 23 and the delayed signal 24 in this manner, the output signal 25 is output during the rising and falling of the amplified signal 23 within the period T.
Two pulses each having a width τ are generated.

Returning to FIG. 8, the description will be continued. According to the equation (1), as the number of pulses generated in the cycle T increases, the average voltage value Vout increases in proportion thereto. That is, the detection sensitivity is improved. On the other hand, as the cycle T becomes shorter, that is, as the frequency becomes higher, it becomes more difficult to generate a large number of pulses in one cycle, so that the detection characteristics deteriorate. Therefore, in the FM detection circuit shown in FIG. 8, the number of pulses generated by the logic circuit 20 is changed according to the frequency band of the received FM signal. When the received FM signal has a low frequency, the logic circuit 20 performs an exclusive OR operation to improve the detection sensitivity as much as possible. On the other hand, when the FM signal has a high frequency,
In the logic circuit 20, a logical product is calculated so that the generated pulse can be detected as accurately as possible, thereby avoiding deterioration of the detection characteristic. Such switching is performed by the switching signal 21. This allows
An FM detection circuit capable of supporting a wide frequency range is realized.

The output signal of the logic circuit 20 detected as described above is applied to a low-pass filter (Low Pass Filter: L).
PF) 26 removes high-frequency components and outputs the output terminal 27
Output from A technique relating to an FM detection circuit capable of supporting a wide frequency band using such a logic circuit suitable for integration is disclosed in, for example, Japanese Patent Application Laid-Open No. 10-117111, “FM detection circuit”.

[0012]

However, the FM receiving circuit shown in FIG. 7 requires a control circuit 13 for controlling the AGC attenuator 12. This control circuit 1
3 is a filter (not shown) for monitoring a level of an output signal, a filter for reducing a carrier frequency component from an FM reception signal to extract an intermediate frequency (Intermediate Frequency: IF) signal, and a level detection. Circuit included. Therefore, it has been difficult to reduce the size of the FM receiving circuit. In addition, even if an attempt is made to integrate using the FM detection circuit shown in FIG. 8 as an FM demodulator, each component is connected by an electrical connector or a microstrip line. It is desirable that the frequency characteristic is flat in the band of the FM signal, but the distortion characteristic, which is the quality characteristic of the demodulated video signal, is deteriorated due to the reflection by the connection part of the electric component. The impedance matching required to connect these components without loss makes it difficult to reduce the size of the device, which is preferable for handling ultra-high frequency signals. Further, the demodulation characteristic of the FM demodulator used in the FM receiving circuit is 1 GHz to 6 GHz.
Wide band and linear characteristics such as z are required, but characteristic deterioration at these connection parts is inevitable. However, the FM receiving circuit applied to the subscriber device of the FM batch conversion type optical video transmission system is required to have low power consumption, small size, and low cost.

SUMMARY OF THE INVENTION An object of the present invention is to provide an FM receiving circuit for demodulating a good quality video signal in an FM batch optical video transmission system by improving the signal quality and miniaturizing the circuit.

[0014]

According to the present invention, (a) a limiter amplifier for amplifying an input signal to a predetermined amplitude level, and (b) a rising edge of an amplified signal amplified by the limiter amplifier. Alternatively, a differentiating circuit for detecting a falling edge and generating a pulse corresponding thereto, and (c) an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component and amplifying a pulse signal generated by the differentiating circuit Are provided in the frequency modulation receiving circuit.

That is, according to the first aspect of the present invention, the rise or fall of the input signal amplified by the limiter amplifier to the predetermined amplitude level regardless of the input level is detected by the differentiating circuit, and the corresponding signal is detected. Pulse is generated. Since the pulse generated by the differentiating circuit is amplified by an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component, the harmonic component is removed, and the average voltage value is proportional to the number of pulses in the cycle. A signal level detection signal is generated. By using an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component in this manner, the number of components can be reduced as compared with the conventional FM receiving circuit, and the size and cost of the circuit can be reduced. become able to.

According to the second aspect of the present invention, (a) a limiter amplifier for amplifying an input signal to a predetermined amplitude level to generate an amplified signal having the same phase and opposite phase as the input signal; A delay circuit for delaying one of an in-phase and an in-phase amplified signal generated by the amplifier; and (c) the other amplified signal of the amplified signal generated by the limiter amplifier and a delay by the delay circuit (D) an AND circuit that outputs a pulse generated by an AND operation with the amplified signal;
An amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component and amplifying a pulse signal generated by the AND circuit is provided in the frequency modulation receiving circuit.

That is, in the invention according to claim 2, the limiter amplifier generates an amplified signal having the same phase and the opposite phase as the input signal amplified to a predetermined amplitude level regardless of the input level of the input signal. One of the amplified signals is delayed by the delay circuit, and the AND circuit generates a pulse generated by the AND operation of the other amplified signal and the amplified signal delayed by the delay circuit.
The pulse generated by the AND circuit is amplified by an amplifier having a low-pass frequency characteristic that removes a predetermined high-frequency component, so that a harmonic component is removed and an average proportional to the number of pulses in a cycle is removed. A detection signal having a signal level having a voltage value is generated. An additional circuit for pulse generation by using an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component and generating an in-phase and inverted-phase amplified signal with a limiter amplifier as described above. Therefore, the number of components can be further reduced, and downsizing and cost reduction of the circuit can be reduced.

According to the third aspect of the present invention, (a) a limiter amplifier for amplifying an input signal to a predetermined amplitude level, and (b) a rising edge of the amplified signal amplified by the limiter amplifier is detected and detected. A first differentiating circuit for generating a corresponding first pulse, and (c) a second differentiating circuit for detecting a falling edge of the amplified signal amplified by the limiter amplifier and generating a second pulse corresponding thereto (D) a coupler that combines the first and second pulses generated by the first differentiating circuit and the second differentiating circuit; And (f) a filter for removing a predetermined high-frequency component of the amplified signal amplified by the amplifying means.

That is, according to the third aspect of the present invention, the rising edge of the input signal amplified by the limiter amplifier to the predetermined amplitude level regardless of the input level is detected by the first differentiating circuit. Pulse is generated. Similarly, the falling edge is detected by the second differentiating circuit, and a corresponding pulse is generated.
The first and second pulses detected by these differentiating circuits are combined by a combiner. The pulse combined by the coupler is amplified at a predetermined amplification rate by the amplifying means, and a predetermined high-frequency component is removed by the filter. Therefore, the harmonic component is removed, and the average voltage value is proportional to the number of pulses in the cycle. Is generated at the signal level having the following. As described above, since the input signals can be parallelized to increase the number of pulses generated in one cycle by the two differentiating circuits, the detection sensitivity can be doubled.

According to a fourth aspect of the present invention, there are provided (a) a first and a second limiter amplifier for amplifying an input signal to a predetermined amplitude level to generate an amplified signal having the same phase as and the opposite phase to the signal; (B) a first delay circuit for delaying one of the in-phase and inverted-phase amplified signals generated by the first limiter amplifier, and (c) generated by the first limiter amplifier. A first AND circuit that outputs a first pulse generated by a logical AND operation of the other amplified signal of the amplified signals and the amplified signal delayed by the first delay circuit;
(D) a second delay circuit for delaying one of the in-phase and amplified signals generated by the second limiter amplifier; and (e) an amplified signal generated by the second limiter amplifier A second pulse for outputting a second pulse generated by a logical AND operation between the other amplified signal and the amplified signal delayed by the second delay circuit;
And (f) a combiner for combining the first and second pulses generated by the first AND circuit and the second AND circuit, and (g) combining by the combiner. Amplifying means for amplifying the pulse signal obtained at a predetermined amplification factor and (h) a filter for removing a predetermined high-frequency component of the amplified signal amplified by the amplifying means are provided in the frequency modulation receiving circuit.

In other words, according to the present invention, the first and second limiter amplifiers respectively have the same phase and the opposite phase as the input signal amplified to a predetermined amplitude level regardless of the input level of the input signal. Generate a signal. One of the amplified signals generated by the first limiter amplifier is delayed by the first delay circuit, and the other amplified signal is delayed by the first AND circuit and the amplified signal is delayed by the first delay circuit. A first pulse generated by an AND operation with the signal is generated. One of the amplified signals generated by the second limiter amplifier is delayed by a second delay circuit, and the other of the amplified signal and the second amplified signal is delayed by a second AND circuit.
And a second pulse generated by an AND operation with the amplified signal delayed by the delay circuit. Then, the first and second pulses generated by the first and second AND circuits are combined by a coupler, amplified at a predetermined amplification rate by amplifying means, and then filtered by a predetermined high-frequency component. Therefore, the harmonic component is removed, and a detection signal having a signal level having an average voltage value proportional to the number of pulses in the cycle is generated. As described above, the number of additional circuits for generating pulses with the in-phase and out-of-phase amplified signals of the input signal generated by the first and second limiter amplifiers is reduced, and the number of pulses generated in one cycle by further parallelizing Is increased, so that the number of components can be reduced and the detection sensitivity can be doubled.

According to a fifth aspect of the present invention, in the frequency modulation receiving circuit of the third or fourth aspect, the amplifying means and the filter have a low-pass frequency characteristic for removing a predetermined high-frequency component and generate a pulse signal. It is characterized by being an amplifier for amplification.

That is, according to the fifth aspect of the present invention, the amplifying means and the filter according to the third or fourth aspect of the present invention include
By amplifying the signal with an amplifier having a low-pass frequency characteristic that removes a predetermined high-frequency component, the harmonic component is removed from the pulse signal, and the signal level having an average voltage value proportional to the number of pulses in the cycle is obtained. A detection signal is generated. By using an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component,
In addition to the effects of the invention described in claim 3 or 4, the number of components can be reduced as compared with the conventional FM receiving circuit, and the size and cost of the circuit can be reduced.

According to a sixth aspect of the present invention, in the frequency modulation receiving circuit according to the first to fifth aspects, the frequency modulation receiving circuit is integrated on the same chip.

That is, according to the invention described in claim 6, since the components are integrated in the same chip, the impedance matching of the connection parts of the respective parts, which has been conventionally required, can be performed with high accuracy. Therefore, the reflection of the signal at the connection portion can be almost ignored, and the degradation of the distortion characteristic of the video signal can be suppressed. In addition, since it is not necessary to set the input / output impedance to 50 [Ω] at each connection part, the input / output impedance required in the input / output part in each component is 50%.
[Omega] buffer circuit is not required, and the circuit can be reduced in size and power consumption can be reduced.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

First Embodiment

FIG. 1 shows an FM according to the first embodiment of the present invention.
3 shows an outline of a configuration of a receiving circuit. This FM
In the receiving circuit 30, an input signal 32 input from an input terminal 31 is supplied to an amplifier 33. This input signal 3
Reference numeral 2 denotes a broadband FM signal obtained by FM-modulating a multi-channel video signal by an FM transmission circuit (not shown). In the amplifying unit 33, the supplied broadband input signal 3
Amplify 2. Then, the signal is supplied to the FM demodulation unit 35 as an amplified signal 34. The FM demodulation unit 35 demodulates a wideband input signal into an original multi-channel video signal by a delay type FM detection method. The multi-channel video signal 36 output from the FM demodulation unit 35 is amplified by the buffer amplification unit 37. Then, it is output from the output terminal 39 as a video signal 38. Further, the FM receiving circuit according to the first embodiment includes:
Amplifier 33, FM demodulator 35, and buffer amplifier 37
Are integrated and arranged in the same chip.

First, the ONU will be described assuming that the FM receiving circuit is applied to an ONU which is an optical receiving device in an FM batch modulation type optical video transmission system. Next, the main components of the FM receiving circuit will be described.

FIG. 2 shows an outline of the configuration of an ONU to which the FM receiving circuit shown in FIG. 1 is applied. However, the same parts as those of the FM receiving circuit shown in FIG. The ONU 40 includes a light receiving module 41
And an FM receiving circuit 30. Light receiving module 4
1, an optical signal intensity-modulated with a broadband FM signal via an optical fiber 42 is input. This optical signal is a broadband FM signal obtained by FM-modulating a multi-channel video signal by an FM transmission circuit (not shown).
The light receiving module 41 has a photoelectric conversion function of converting into an electric signal of an amplitude level according to the input optical signal power. Broadband F photoelectrically converted by the light receiving module 41
The M signal 43 is supplied to the FM receiving circuit 30. The FM receiving circuit 30 can demodulate the broadband FM signal 43 into a multi-channel video signal and output it as a video signal 38.

FIG. 3 shows an outline of the main components of the FM receiving circuit 30 applied to such an ONU 40. However, the same parts as those of the FM receiving circuit shown in FIG. The FM receiving circuit 30 includes a limiter amplifier 44, an FM demodulator 35, and a buffer amplifier 37.
And The limiter amplifier 44 amplifies the input broadband FM signal 43 to a predetermined amplitude limit value, and outputs the same as an in-phase output signal 45 having the same phase as the broadband FM signal 43 and an opposite-phase output signal 46 having the opposite phase. Is available. This predetermined amplitude limit value is an amplitude value necessary for the subsequent FM demodulation unit 35 to operate normally. Both the in-phase output signal 45 and the in-phase output signal 46 amplified to the predetermined amplitude limit value are input to the FM demodulation unit 35.

The FM demodulation unit 35 is a delay detection type FM demodulator, and is provided with a delay circuit 47 and a two-input logical product (hereinafter, AND).
Abbreviated. ) Circuit 48. This FM demodulation unit 3
The in-phase output signal 45 input to 5 is input to the delay circuit 47. The inverted-phase output signal 46 input to the FM demodulation unit 35 is input to one input terminal of a two-input AND circuit 48. The delay circuit 47 can output an in-phase output delay signal 49 obtained by delaying the input in-phase output signal 45 by a fixed delay time τ. This in-phase output delay signal 49 is a two-input AND circuit 4
8 is input to the other input terminal. The two-input AND circuit 48 performs a logical product operation of the in-phase output delay signal 49 and the anti-phase output signal 46, and supplies the output signal as an FM demodulated signal 50 to the buffer amplifier 37. Buffer amplifier 3
7 amplifies the FM demodulated signal 50 at a predetermined amplification rate and outputs it as a video signal 38.

In such an FM receiving circuit, the frequency band of the video signal is 90 megahertz (hereinafter abbreviated to MHz) to 8 in order to be applied to the FM batch conversion type optical video transmission system.
The frequency band of the buffer amplifier 37 must also cover the band of 90 MHz to 800 MHz so as to correspond to 00 MHz. In general, in a delay detection type FM demodulator, FM
Demodulation is performed by pulsing the signal and extracting only the demodulated signal by the LPF. In the FM demodulation circuit shown in FIG. 3, by using an amplifier having a frequency characteristic of a low-pass characteristic similar to that of the conventional LPF for the buffer amplifier 37,
A demodulated output is obtained.

Next, referring to FIG. 4, the F shown in FIG.
The operation of the M receiving circuit 30 will be described.

FIG. 4 shows the operation waveform of each part of the FM receiving circuit 30 shown in FIG. 11A shows the operation waveform of the broadband FM signal 43, FIG. 10B shows the operation waveform of the in-phase output signal 45, FIG. 10C shows the operation waveform of the in-phase output signal 46, and FIG. Operation waveform of the output delay signal 49,
FIG. 3D shows an operation waveform of the FM demodulation signal 50. That is, the FM receiving circuit 30 in the first embodiment
The broadband FM signal 43 as shown in FIG. 3A is photoelectrically converted by the light receiving module 41 and supplied to the FM receiving circuit 30. The limiter amplifier 44 amplifies this to the level of the predetermined amplitude limit value. This limiter amplifier 44 has a wide band F of its input shown in FIG.
An in-phase output signal 45 having the same phase as the M signal 43 and an opposite-phase output signal 46 having the opposite phase shown in FIG. The in-phase output signal 45 is generated by a delay circuit 47 to generate an in-phase output delay signal 49 delayed by a fixed delay time τ as shown in FIG.
It is output to the D circuit 48. 2-input AND circuit 48
Calculates the logical product of the in-phase output delay signal 49 and the in-phase output signal 46 to generate a pulse-like FM demodulated signal 50 as shown in FIG. The FM demodulated signal 50 is input to the buffer amplifier 37, amplified at a predetermined amplification rate, and output to the outside as a video signal 38. This buffer amplifier 37
Is an LPF that does not transmit a frequency component in a predetermined high frequency band
And generates a video signal 38 having a voltage value in which only the low frequency components of the FM demodulated signal 50 are averaged. This averaged voltage value corresponds to the broadband F
It is also proportional to the number of pulses in the cycle T of the M signal 43, and the greater the number of pulses in the cycle T, the better the detection sensitivity.

As described above, the FM receiving circuit according to the first embodiment has an amplifying unit 3 which particularly needs to handle a high frequency signal.
3. The FM demodulation unit 35 and the buffer amplification unit 37 are integrated on the same chip. And the FM demodulation unit 3
In FIG. 5, a delay detection type FM demodulator optimal for integration is configured. Further, in the delay detection type FM demodulator, a first-stage limiter amplifier 44 outputs a two-phase output signal of the same phase and the opposite phase to constitute a differentiating circuit for detecting the rise of the FM reception signal. This allows
The circuit configuration and wiring for delay detection can be minimized, and the circuit can be miniaturized. Furthermore, such FM
By applying the receiving circuit, it is possible to perform the impedance matching of the connection part of each part, which has been conventionally required, with high accuracy. Therefore, the reflection of the signal at the connection portion can be almost ignored, and the degradation of the distortion characteristic of the video signal can be suppressed. Also, since it is not necessary to make the input / output impedance 50 [Ω] at each connection part,
Conventionally, a buffer circuit of 50 [Ω], which is required for the input / output unit in each component, is not required, and the circuit can be reduced in size and power consumption can be reduced.

Second Embodiment

The FM receiving circuit according to the second embodiment has the same principle structure as the FM receiving circuit according to the first embodiment, but is characterized in that it is designed to improve the demodulation sensitivity. That is, the limiter amplifier and F
The demodulation sensitivity is improved by parallelizing each of the M demodulation units and increasing the number of pulses generated within the cycle T of the broadband FM signal.

FIG. 5 shows an outline of the main components of the FM receiving circuit according to the second embodiment. However, Figure 3
The same parts as those of the FM receiving circuit according to the first embodiment shown in FIG. The FM receiving circuit 60 according to the second embodiment includes a limiter amplifier 61
, An FM demodulation unit 62, and a buffer amplification unit 37. The limiter amplifier 61 includes two limiter amplifiers 6.
3 _1, 63 is provided with a _2, broad-band FM signal 43 is input which is photoelectrically converted by both light receiving module. The limiter amplifier 63 ₁ receives the broadband FM signal 43
Is amplified to a predetermined amplitude limit value, and this can be output as an in-phase output signal 64 ₁ having the same phase as the broadband FM signal 43 and an opposite-phase output signal 65 ₁ having the opposite phase. Limiting amplifier 63 ₂ also amplifies the wideband FM signal 43 up to a predetermined amplitude limiting value, which broadband F
An in-phase output signal 64 ₂ M signal 43 and the phase, so that it can be output as a negative-phase output signal ₆₅₂ of the reverse phase. The predetermined amplitude limit value at which the broadband FM signal 43 is amplified by the limiter amplifiers 63 ₁ and 63 ₂ is:
This is an amplitude value necessary for the subsequent FM demodulation unit 62 to operate normally. These phase output signals 64 _1, 64 ₂ and the negative-phase output signal 65 _1, 65 ₂ is inputted to the FM demodulation unit 62.

The FM demodulation section 62 has two parallel delay detection type F
M demodulators, and delay circuits 66 ₁ , 66 ₂ corresponding to the limiter amplifiers 63 ₁ , 63 ₂ of the limiter amplifier 61, respectively.
And two-input AND circuits 67 ₁ and 67 ₂ . The in-phase output signal 64 ₁ input to the FM demodulation unit 62 is
The signal is input to the delay circuit 66 ₁ . The FM demodulation unit 6
The negative-phase output signal 65 ₁ input to 2 is input to one input terminal of a two-input AND circuit 67 ₁ . The delay circuit 66 ₁ is adapted to an in-phase output signal 64 ₁ input, thereby outputting the phase output delay signal 68 ₁ which is delayed by a predetermined delay time tau. The in-phase output delay signal 68 ₁ is input to the 2-input AND circuit 67 ₁ other input terminal. 2-input AND circuit 67 ₁ performs logical product operation of the in-phase output delay signal 68 ₁ and the negative-phase output signal 65 ₁ and outputs the coupler 70 and its output signal as an AND circuit output signal 69 _1. On the other hand, the common mode output signal 64 ₂ which is inputted to the FM demodulator 62 is input to the 2 one input terminal of the input AND circuit 67 _2. The FM demodulation unit 6
Negative-phase output signal ₆₅₂ which is input to the 2 is input to the delay circuit 66 _2. The delay circuit 66 ₂ is a negative-phase output signal ₆₅₂ which is input, thereby making it possible to output a negative-phase output delay signal 68 ₂ which is delayed by a predetermined delay time tau. The negative-phase output delay signal 68 _2, 2-input AND
Is input to the other input terminal of the circuit 67 _2. The two-input AND circuit 67 ₂ performs a logical AND operation of the negative-phase output delay signal 68 ₂ and the in-phase output signal 64 ₂ , and outputs the AND signal.
It is output to the combiner 70 as a circuit output signal 69 ₂ . The combiner 70 combines the AND circuit output signals 69 ₁ and 69 ₂ with the F
An M demodulated signal 50 is generated and supplied to the buffer amplifier 37. The buffer amplifier 37 amplifies the FM demodulated signal 50 at a predetermined amplification rate and outputs the amplified signal as a video signal 38.

Next, referring to FIG. 6, the F shown in FIG.
The operation of the M receiving circuit 60 will be described.

FIG. 6 is a block diagram of the FM receiving circuit 60 shown in FIG.
5 shows operation waveforms of the unit. Figure (a) is a wide band
The operation waveform of the frequency FM signal 43, FIG.
64 ₁The operation waveform of FIG.₁Movement
FIG. 7D shows the in-phase output delay signal 68.₁Operating wave
FIG. 14E shows an AND circuit output signal 69.₁Operation waveform
Are respectively shown. Further, FIG.
No.64_TwoThe operation waveform of FIG._Twoof
The operation waveform, FIG._TwoBehavior
Waveform, FIG. 7I shows an AND circuit output signal 69._TwoOperating wave
(J) shows the operation waveform of the FM demodulated signal 50.
Is shown. That is, in the second embodiment, FIG.
The broadband FM signal 43 as shown in
Therefore, the signal is photoelectrically converted and supplied to the FM receiving circuit 62.
You.

The limiter amplifier 63₁Is the broadband FM signal
43 is amplified to the level of the predetermined amplitude limit value.
This limiter amplifier 63₁Is the input shown in FIG.
In-phase output signal 64 in phase with power broadband FM signal 43
₁And the negative-phase output signal 65 shown in FIG.₁And out
You can help. In-phase output signal 6
4₁Is the delay circuit 66₁As a result, as shown in FIG.
In-phase output delay signal 68 delayed by a fixed delay time τ₁
Is generated, and the two-input AND circuit 67₁Output to
You. 2-input AND circuit 67₁Is the common-mode output delay signal 68₁
And reverse phase output signal 65 ₁The logical product of is calculated, and FIG.
A pulsed AND circuit output signal 69 as shown₁Generate a
I do. On the other hand, the limiter amplifier 63_TwoIs the broadband FM signal
43 is amplified to the level of the predetermined amplitude limit value.
This limiter amplifier 63_TwoIs the input shown in FIG.
In-phase output signal 64 in phase with power broadband FM signal 43
_TwoAnd the reverse-phase output signal 65 shown in FIG._TwoAnd out
You can help. Negative phase output signal 6
5_TwoIs the delay circuit 66_TwoAs a result, as shown in FIG.
Antiphase output delay signal 68 delayed by a fixed delay time τ_Two
Is generated, and the two-input AND circuit 67_TwoOutput to
You. 2-input AND circuit 67_TwoIs a negative-phase output delay signal 68 _Two
And in-phase output signal 64_TwoThe logical product of is calculated, and FIG.
A pulsed AND circuit output signal 69 as shown_TwoGenerate a
I do.

The AND circuit output signals 69 ₁ and 69 ₂ are combined by a combiner 70, and the FM demodulated signal 50 shown in FIG.
Generate The FM demodulated signal 50 is supplied to the buffer amplifier 37
And is amplified at a predetermined amplification rate and output to the outside as a video signal 38. This buffer amplifier 37 has the same frequency characteristics as an LPF that does not transmit a predetermined high-frequency band frequency component, and a video signal 38 having a voltage value in which only the low-frequency component of the FM demodulation signal 50 is averaged. Generate This averaged voltage value is the broadband FM signal 4
It is also proportional to the number of pulses in the period T of 3; the greater the number of pulses in the period T, the better the detection sensitivity. Therefore,
Since the number of pulses in the period T is doubled as compared with the FM receiving circuit in the first embodiment, the detection sensitivity can be doubled.

As described above, the FM receiving circuit according to the second embodiment applies the principle configuration of the FM receiving circuit according to the first embodiment, and controls the FM demodulation unit to detect the rise and fall of the broadband FM signal, respectively. It is made parallel by the differentiating circuit to detect. By realizing this through integration that is optimal for use of the same circuit such as parallelization, it is possible to provide an FM receiver circuit with improved demodulation sensitivity without increasing the circuit area so much even when parallelized. Become like

In the first embodiment, the in-phase output signal having the same phase as the broadband FM signal is delayed by the delay circuit 47. However, the present invention is not limited to this. It may be.

In the first and second embodiments, the buffer amplifier having the frequency band as the LPF is used so that the buffer amplifier plays the role of the LPF. It is not limited to this.

In the second embodiment, the rise and fall of the broadband FM signal photoelectrically converted by the light receiving module are detected by using a delay circuit to generate a pulse. The differentiating circuit to be detected is not limited to this.

[0050]

As described above, according to the first aspect of the present invention, by using an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component, the number of parts can be reduced as compared with the conventional FM receiving circuit. , And miniaturization and cost reduction of the circuit can be reduced.

According to the second aspect of the present invention, an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component is used, and a limiter amplifier generates an in-phase and an in-phase amplified signal with respect to an input signal. By doing so, it is possible to reduce the number of additional circuits for pulse generation, so that the number of components can be further reduced, and downsizing and cost reduction of the circuit can be reduced.

According to the third aspect of the present invention,
Since the number of pulses generated in one cycle by the two differentiating circuits can be increased by parallelizing the input signals, the detection sensitivity can be doubled.

Further, according to the fourth aspect of the present invention, the first
And an additional circuit for generating a pulse with an amplified signal having the same phase and opposite phase as the input signal generated by the second limiter amplifier, and increasing the number of pulses generated in one cycle by further parallelizing. As a result, the number of components can be reduced and the detection sensitivity can be doubled.

Further, according to the fifth aspect of the present invention, by using an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component, in addition to the effects of the third or fourth aspect of the present invention, As compared with the FM receiving circuit, the number of components can be reduced, and downsizing and cost reduction of the circuit can be reduced.

According to the sixth aspect of the present invention, by integrating the components in the same chip, it is possible to perform the impedance matching of the connection portions of the respective parts, which has been conventionally required, with high accuracy. Therefore, the reflection of the signal at the connection portion can be almost ignored, and the degradation of the distortion characteristic of the video signal can be suppressed. Also,
Since it is not necessary to set the input / output impedance to 50 [Ω] at each connection part, a buffer circuit of 50 [Ω], which was conventionally required at the input / output part in each component, becomes unnecessary, and the circuit can be made smaller and lower. Power consumption can be reduced.
In particular, by handling in-phase and out-of-phase amplified signals, a plurality of very simple circuits can be used, which is suitable for reducing the circuit area and simplifying wiring by integration.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an outline of a configuration of an FM receiving circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating an outline of a configuration of an ONU to which the FM receiving circuit according to the first embodiment is applied.

FIG. 3 is a block diagram illustrating an outline of a main part of a configuration of an FM receiving circuit according to the first embodiment;

FIG. 4 is an operation waveform diagram illustrating an operation of each unit of the FM receiving circuit according to the first embodiment.

FIG. 5 is a block diagram illustrating an outline of a main part of a configuration of an FM receiving circuit according to a second embodiment of the present invention.

FIG. 6 is an operation waveform diagram illustrating an operation of each unit of the FM receiving circuit according to the second embodiment.

FIG. 7 is a block diagram illustrating an outline of a configuration of a conventionally proposed FM receiving circuit.

FIG. 8 is a block diagram showing an outline of a configuration of a conventionally proposed FM detection type demodulator.

FIG. 9 is an operation waveform diagram showing the operation of each unit of the FM demodulator proposed conventionally.

[Explanation of symbols]

30, 60 FM receiving circuit 31 Input terminal 32 Input signal 33 Amplifying unit 34 Amplified signal 35, 62 FM demodulation unit 36 Multi-channel video signal 37 Buffer amplification unit 38 Video signal 40 ONU 41 Light receiving module 42 Optical fiber 43 Broadband FM signal 44, 63 ₁ , 63 ₂ Limiter amplifiers 45, 64 ₁ , 64 _{2 In-} phase output signals 46, 65 ₁ , 65 ₂ Negative-phase output signals 47, 66 ₁ , 66 ₂ Delay circuits 48, 67 ₁ , 67 ₂ 2-input AND circuits 49, 68 _{1 In-} phase output delay signal 50 FM demodulation signal 61 Limiter amplifier 68 ₂ Negative-phase output delay signal 69 ₁ , 69 ₂ AND circuit output signal 70 Coupler

Claims (6)

[Claims] 1. A limiter amplifier for amplifying an input signal to a predetermined amplitude level, and a differentiating circuit for detecting a rise or a fall of the amplified signal amplified by the limiter amplifier and generating a pulse corresponding to the rise or fall. An amplifier having low-pass frequency characteristics for removing a predetermined high-frequency component and amplifying a pulse signal generated by the differentiating circuit. 2. A limiter amplifier for amplifying an input signal to a predetermined amplitude level to generate an amplified signal having the same phase and opposite phase as the input signal, and an in-phase and opposite-phase amplified signal generated by the limiter amplifier. A delay circuit that delays one of the amplified signals, and a signal that is generated by a logical AND operation of the other amplified signal and the amplified signal delayed by the delay circuit among the amplified signals generated by the limiter amplifier. A frequency modulation receiver comprising: an AND circuit for outputting a pulse; and an amplifier having a low-pass frequency characteristic for removing a predetermined high-frequency component and amplifying a pulse signal generated by the AND circuit. circuit. 3. A limiter amplifier for amplifying an input signal to a predetermined amplitude level, and a first pulse for detecting a rising edge of an amplified signal amplified by the limiter amplifier and generating a first pulse corresponding to the rising edge. A differentiating circuit, a second differentiating circuit for detecting a fall of the amplified signal amplified by the limiter amplifier and generating a second pulse corresponding thereto, the first differentiating circuit, and the second differentiating circuit A combiner for combining the first and second pulses generated by the circuit; an amplifying means for amplifying the pulse signal combined by the combiner at a predetermined amplification factor; and an amplified signal amplified by the amplifying means. And a filter for removing a predetermined high-frequency component. 4. A first and a second limiter amplifier for amplifying an input signal to a predetermined amplitude level to generate an amplified signal having the same phase and the opposite phase with the signal, and the first limiter amplifier generates the amplified signal. A first delay circuit that delays one of the amplified signals of the same phase and the opposite phase, and the other amplified signal of the amplified signals generated by the first limiter amplifier and the first amplified signal. A first AND circuit that outputs a first pulse generated by an AND operation with the amplified signal delayed by the delay circuit; and any one of an in-phase and an amplified signal generated by the second limiter amplifier A second delay circuit for delaying one of the amplified signals, and the other of the amplified signals generated by the second limiter amplifier and the second amplified signal. A second AND circuit that outputs a second pulse generated by an AND operation with the amplified signal delayed by the extension circuit; and the first AND circuit and the second AND circuit A combiner for combining the generated first and second pulses; amplifying means for amplifying the pulse signal combined by the combiner at a predetermined amplification factor; and a predetermined signal of the amplified signal amplified by the amplifying means. A frequency modulation receiving circuit comprising: a filter for removing a high-frequency component. 5. The frequency according to claim 3, wherein said amplification means and said filter are amplifiers having low-pass frequency characteristics for removing a predetermined high-frequency component and amplifying said pulse signal. Modulation receiving circuit. 6. The frequency modulation receiving circuit according to claim 1, wherein the frequency modulation receiving circuit is integrated on the same chip.