JP2000182036A - Data processing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform a data processing at high speed by shortening stand-by time as a whole in plural processing parts. SOLUTION: Ten processings from processings 1 to 10 are executed for inputted data by an MPU(microprocessing unit) 1 and an MPU 2. The processings 1 to 8 can be executed by the MPU 1 and the processings 3 to 10 can be executed by the MPU 2. The processings 3 to 8 are specified processings to be executed by both of the MPU 1 and the MPU 2. When the processings are completed, a request signal ACK to request the data is transmitted to the MPU 1 by the MPU 2. The specified processings are executed until the request signal ACK is received from the MPU 2 and after the request signal ACK is received, a transmission signal REQ and the data DATA are transmitted to the MPU 2 by the MPU 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing system, and in particular, performs a series of processes on input data by a plurality of serially connected processing units sharing a series of processes and executing the processes asynchronously. It relates to a data processing system.

[0002]

2. Description of the Related Art Conventionally, there has been known an asynchronous data processing apparatus in which a plurality of MPUs (microprocessing units) sequentially perform a plurality of processes on input data. In a conventional data processing device, a plurality of MPUs perform a part of a plurality of processes, perform data processing asynchronously, and perform a series of processes on input data by transferring data between the MPUs. is there.

FIG. 15 is a block diagram for explaining data input / output between MPUs in a conventional data processing apparatus. In the figure, two MPUs, MPU21 and MPU22,
4 shows input / output of data when the ten processes of processes 1 to 10 are executed. The MPU 21 executes five processes from process 1 to process 5, and the MPU 22 executes five processes from process 6 to process 10, which are processes subsequent to process 5. Therefore, the data input to the MPU 21 is subjected to the five processings of processing 1 to processing 5 and
The data is passed to U22, and the MPU 22 performs the processing of processing 6 to processing 10 on the data processed by the MPU 21.

[0004] Two control signals, a request signal ACK and a transmission signal REQ, are transmitted and received between the MPU 21 and the MPU 22 to transfer data DATA. The request signal ACK is a signal for requesting data DATA,
It is transmitted from the MPU 22 to the MPU 21. Transmission signal RE
Q is a signal for transmitting data DATA, and M
It is transmitted from PU1 to MPU2.

The request signal ACK is sent from the MPU 22 to the MPU 2
When the data is transmitted to No. 1, the MPU 22 is in a state where the execution of the processes 6 to 10 on the previous data has been completed. When the transmission signal REQ is transmitted from the MPU 21 to the MPU 22, the request signal ACK is received from the MPU 22, and the execution of the processing 1 to processing 5 for the data DATA to be transmitted is completed.

Therefore, the conditions under which the MPU 21 can transmit the transmission signal REQ to the MPU 22
The case where the request signal ACK is received from the PU 22
The condition is that the execution of the processes 1 to 5 has been completed. On the other hand, the state in which the MPU 22 can transmit the request signal ACK means that the MPU 22 performs processing 6 to processing 1
The condition is that the execution of the process 0 has been completed. MP
Data DATA is transmitted from the MPU 21 to the MPU 22 only when the conditions of both the U 21 and the MPU 22 are satisfied.

FIG. 16 is a diagram showing a temporal change in the operating state of the MPU 21 and MPU 22. In the figure, time is shown in the horizontal direction and time elapses in the right direction of the drawing. From the upper stage, the state of MPU21, MPU2
2 is shown. The bottom row shows the time during which all of the processes 1 to 10 are performed on the input data A and the input data B.

The MPU 21 executes the processing 1 to processing 5 on the input data A (A (1-5)), and immediately after transmitting the transmission signal REQ to the MPU 22, performs processing on the next input data B. 1 to processing 5 (B (1-5)),
The apparatus enters a standby state until a request signal ACK is received from the MPU 22. Upon receiving the request signal ACK from the MPU 22,
The transmission signal REQ is transmitted to the MPU 22 to transmit the processed input data B. Thereafter, processing 1 to processing 5 are executed on the input data C.

[0009] The MPU 22 receives a transmission signal R from the MPU 21.
After receiving the EQ, the MPU 21 executes the processing 6 to the processing 10 on the input data A that has been processed (A (6-1).
0)). When the processing for the input data A is completed, a request signal ACK is transmitted to the MPU 21 and the
It is in a standby state until a transmission signal REQ is received from U21. Thereafter, after receiving the transmission signal REQ from the MPU 21, the input data B processed by the MPU 21 is received, and the processing 6 to the processing 10 are executed on the received input data B (B (6-10)).

The processing is executed by MPU 21 and MPU 22, respectively, so that input data A and input data B
In this case, the times when the processes 1 to 10 are performed are different times as shown in FIG.

[0011]

In image processing for performing a plurality of processes on image data, if pixel data in the image data is different, the load on each process will be different. This is due to the fact that the contents of processing differ depending on the pixel data. For example, shading correction is performed on image data in which characters and photos are drawn, and L
In image processing in which six processes of og conversion, scaling, MTF correction, γ correction, and binarization are performed, pixel data to be processed belongs to a text region or a photographic region. The processing content is different and the load is different. In the MTF correction, assuming that the load required for processing pixel data belonging to the character area is “3”, the load required for processing pixel data belonging to the photographic area is “1”. Also, in the binarization processing, if the load required for processing pixel data belonging to the character area is “1”, the load required for processing pixel data belonging to the photographic area is “3”.

When data of which load required for each process fluctuates, such as image data, is processed by a conventional data processing apparatus, the load on the MPU 21 and the load on the MPU 22 differ depending on the type of data. MPU21
In this case, the waiting time until the request signal ACK is received from the MPU 22 and the waiting time until the data DATA is received by the MPU 2 are increased, and the speed of data processing is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and by shortening the waiting time (waiting time) during which nothing is performed in a plurality of processing units,
An object of the present invention is to provide a data processing system capable of performing data processing at high speed.

[0014]

In order to achieve the above object, a data processing system according to an aspect of the present invention comprises:
A data processing system that has a plurality of processing units connected serially and performs a series of processes on input data by sharing a series of processes and executing the processes asynchronously. The processing unit includes a first processing unit that can execute a specific process and a preceding stage process in a preceding stage of the series of processes, and a second processing unit that can execute the specific process and a subsequent stage process in the subsequent stage. It is characterized by including.

Preferably, the data processing system is characterized in that the first processing unit suspends the execution of the specific processing in response to a request from the second processing unit.

More preferably, the data processing system comprises:
The second processing unit performs a specific process on the input data for which the specific process has not been performed in the first processing unit.

More preferably, the data processing system comprises:
The apparatus further includes a prediction unit that predicts loads of the plurality of processing units,
The processing unit that executes the specific processing is determined according to the load predicted by the prediction unit.

[0018] More preferably, the data processing system comprises:
The apparatus further includes a prediction unit that predicts loads of the plurality of processing units,
The specific processing is changed according to the load predicted by the prediction means.

More preferably, the prediction means of the data processing system includes means for detecting the type of the input data, and predicts the load based on the detected type.

According to these inventions, the processes that can be executed by a plurality of processing units are duplicated, so that when the load on one processing unit is heavy, the other processing unit performs the duplicated processing, so that The waiting time in the processing unit can be shortened. As a result, a data processing system capable of performing data processing at high speed can be provided.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the drawings, the same reference numerals indicate the same or corresponding members.

[First Embodiment] FIG. 1 shows an MPU in a data processing system according to a first embodiment of the present invention.
FIG. 3 is a block diagram for explaining data input / output between the devices.
Referring to the figure, processing 1 to processing 1 are performed by MPU1 and MPU2.
The process of 0 to 10 is performed on one data. The MPU 1 can execute the processes 1 to 8, and the MPU 2 can execute the processes 3 to 10. At this time, the six processings of processing 3 to processing 8 can be executed by both MPU1 and MPU2. Processing that can be executed by both MPU1 and MPU2 (processing 3
Process 8) is referred to as a specific process. MPU1 has data DAT
When A is delivered to MPU2, a control signal including a request signal ACK and a transmission signal REQ is transmitted and received between MPU1 and MPU2.

In the MPU 1, the processing (processing 1 to processing 8) excluding the specific processing (processing 6 to processing 8) from the processing (processing 1 to processing 8) that can be processed by the MPU 1 is performed on one data.
Processing 5) is always performed except for unnecessary processing. Similarly, in MPU2, processing that can be processed by MPU2 (processing 3
(Processes 9 to 10) excluding the unnecessary processes are always performed except for the unnecessary processes. And
Which MPU executes the specific processing (processing 3 to processing 8) is determined by transmitting and receiving a control signal (ACK, REQ) between the MPUs.

FIG. 2 is a diagram showing a temporal change in the operation state of MPU1 and MPU2 in the present embodiment. Referring to the figure, in MPU1, after processing 1 to processing 5 are performed on input data A (A (1-5)), transmission signal REQ is transmitted to MPU2 and processing 1 to processing 5 is performed. The input data A is transmitted to the MPU 2. Then, processing 1 to processing 5 are executed for the next input data B. Since the request signal ACK has not been received from the MPU 2 when the execution of the processing 5 on the input data B is completed, the specific processing is continuously executed on the input data B.
Then, when the processing (processing 8 in the figure) performed when the request signal ACK is received by the MPU 2 is completed, the transmission signal REQ is transmitted to the MPU 2 and
The input data B subjected to the processes 1 to 8 is transmitted to the MPU 2. Thereafter, processing 1 to processing 5 are executed for the next input data C.

On the other hand, when the MPU 2 receives the transmission signal REQ and the input data A subjected to the processing 1 to the processing 5 from the MPU 1, the processing after the processing 5 (the processing 6 to the processing 10) is performed on the input data A. Execute (A (6-10)). When the execution of the process 10 is completed for the input data A, the MPU
1 and transmits a request signal ACK to MPU 1 and waits until a transmission signal and next input data B are transmitted from MPU 1. Then, when receiving the input data B subjected to the processing 1 to the processing 8 from the MPU 1, the processing after the processing 8 (processing 9 and processing 10) is executed on the input data B (B (9
-10)), transmits a request signal ACK to MPU1. Hereinafter, similarly, input data processing and transfer are performed between MPU1 and MPU2.

As is clear from the state change over time between MPU1 and MPU2 shown in FIG.
Waiting time is gone. Also, although a waiting time occurs in the MPU2, it can be seen that the sum of the waiting times in both the MPU1 and the MPU2 is smaller than that in the conventional data processing device (see FIG. 16). Also, each of the input data is processed in a shorter time than the input data processed by the conventional data processing device.

FIG. 3 is a flowchart showing the flow of processing performed by each MPU in the present embodiment.
Referring to the figure, the MPU transmits a request signal ACK requesting transmission of data DATA to the preceding MPU (step S01). Thereafter, the system is in a standby state until a transmission signal REQ transmitted by the preceding MPU is received (step S02). Transmission signal REQ transmitted by the preceding MPU
Is a control signal indicating that the subsequent MPU transmits data DATA after receiving the transmission signal REQ. When the transmission signal REQ is received, the data DATA
Then, the data is received (step S03).

Here, data DATA transmitted from the preceding MPU will be described. FIG. 4 shows data DATA
FIG. 3 is a diagram showing a data format of FIG. Data DATA
Consists of a 4-bit processing flag and 8-bit processing data. The processing flag is set to the MPU transmitting the data DATA.
Indicates the last processing executed, and in the present embodiment, the number of processing is 10, so that it is 4 bits. The number of bits is determined by the number of processes performed in the data processing system. If four bits are provided, the number of bits can be used in a data processing system that executes 16 processes. The processing data is data to be subjected to each processing, and the data on which the processing described in the processing flag has been performed is written. In the case of a data processing system that performs image processing on image data, the number of bits may be 8 bits, which is the number of bits of pixel data constituting image data. The number of bits of the processing data is determined by data to be processed in the data processing system, and is not limited to 8 bits.

Returning to FIG. 3, the processing flag is read from the received data DATA, and the read processing flag is set in the variable F (step S04). Here, since the processing flag is the number of the processing last performed by the MPU in the preceding stage, the processing flag is directly substituted for the variable F.

Next, "1" is added to the variable F (step S05). This is the MP that received the data DATA.
U (the latter MPU) is the MP that transmitted the data DATA.
This is because the processing is started from the processing next to the processing last performed in U (the MPU in the preceding stage).

Then, the processing data in the received data DATA is read, and the F-th processing is executed on the read processing data (step S06).

Then, it is determined whether or not a request signal ACK for requesting data transmission has been received from the subsequent MPU (step S07). Request signal AC from MPU at subsequent stage
When K is received, the variable F is compared with a constant S (step S09), and when the request signal ACK is not received, the variable F is compared with a constant E (step S08).
When the variable F is smaller than the constant S (YE in step S09)
S) and the case where the variable F is smaller than the constant E (step S08)
In the case of (YES), the processing from step S05 to step S07 is repeatedly performed. If the variable F is not smaller than the constant S (NO in step S09),
If not smaller (NO in step S08), the process proceeds to step S10.

Here, the constant S and the constant E indicate the number of the first processing and the number of the last processing of the specific processing (processing 3 to processing 8), respectively. Therefore, in the present embodiment, the constant S is “3” and the constant E is “8”. The processing performed in step S07, step 08, and step S09 is as follows. When the completed processing (processing F) is not the specific processing (YES in step S09) when the request signal ACK is received from the subsequent MPU. Steps S05 and S06 are repeated until the time becomes. If the request signal ACK has not been received from the subsequent MPU (NO in step S07), the last process (process 8) in which the completed process (process F) can be processed (process 8)
Steps S05 and S06 are repeated until the time becomes.

At step S10, a transmission signal REQ indicating that data DATA is to be transmitted to the MPU 2 at the subsequent stage.
Is transmitted, and after confirming the reception of the transmission signal REQ by the MPU 2 at the subsequent stage, the data DATA is transmitted (step S1).
1). After that, the above processing is repeated.

FIG. 5 shows the state of each MPU when processing input data in which the load required for processing 1 to processing 5 is always smaller than the load required for processing 6 to processing 10 in comparison with a conventional data processing apparatus. FIG. FIG. 5A shows MPU1 and MPU of the data processing system according to the present embodiment.
It is a figure showing the state of PU2. FIG. 5B is a diagram showing states of the MPU 21 and the MPU 22 of the conventional data processing device. The figure shows a case where input data A, input data B, input data C... Are input. In the processing performed by each MPU, for example, a state in which processing 1 to processing 5 are performed on input data A is indicated as A (1-5).

Referring to FIG. 5A, in MPU 1, M
Processing 6 to processing 10 with heavy load on PU2
, While the processing 1 to the processing 5 are performed on the input data B, the processings 6 to 8 are further performed (B (6-8)). Further, in the MPU 2, since the input data B has been executed up to the processing 8 in the MPU 1, the processing 9 and the processing 10 are executed.

As is apparent from a comparison between FIGS. 5A and 5B, the data processing system according to the present embodiment has processing 1 to processing 5 as compared with the conventional data processing apparatus.
Even when the load required for the processes 6 to 10 is always smaller than the load required for the processes 6 to 10, when the load on the MPU 2 is large, the specific process is executed by the MPU 1 with a small load, so that the waiting time between the MPU 1 and the MPU 2 is reduced. It can be seen that the speed of data processing has been increased.
Also, for each input data, the time from the start to the end of the process is reduced.

FIG. 6 shows the state of each MPU when processing input data in which the load required for processing 1 to processing 5 is always larger than the load required for processing 6 to processing 10 in comparison with a conventional data processing apparatus. FIG. FIG. 6A shows MPU1 and MPU of the data processing system according to the present embodiment.
It is a figure showing the state of PU2. FIG. 6B is a diagram showing a state of the MPU 21 and the MPU 22 in the conventional data processing device. Since the load is always smaller in the MPU 22 than in the MPU 21, the request signal ACK is transmitted to the MPU 21 when the reception of the input data is completed.
At 21, a standby state is set until a request signal ACK is received from the MPU 22.

Referring to FIG. 6A, for input data B, processing 1 to processing 4 are executed by MPU 1 (B (1
-4)), Process 5 to Process 10 are executed by the MPU 2 (B (5), B (6-10)).

As apparent from a comparison between FIG. 6A and FIG. 6B, even when the load required for processing 1 to processing 5 is always larger than the load required for processing 6 to processing 10,
It can be seen that the standby time of MPU1 and MPU2 is reduced and the speed of data processing is increased as compared with the conventional data processing device.

As described above, MPU1 and MPU2
And specific processing (processing 3 to
The processing 8) is provided, and the specific processing is executed by the MPU 1 that executes the preceding processing until the request signal ACK is received from the MPU 2 that executes the subsequent processing.
1 and the waiting time in the MPU 2 can be shortened,
As a result, data processing can be performed at high speed.

[Second Embodiment] The data processing system according to the second embodiment is obtained by applying the data processing system according to the second embodiment to image processing. In image processing, four processes from process 1 to process 6 are performed. Process 1 is an SH correction process (shading correction process), which is performed when image data as input data is read by a photoelectric conversion element such as a CCD.
This is a correction process for removing uneven reading (uneven shading) due to variations in the performance of photoelectric conversion elements such as CDs.

Process 2 is a Log conversion process, which is a process of converting data subjected to the SH correction process into data having a Log relationship.

Process 3 is a scaling process in which the input image data is converted into enlarged or reduced data. Process 4 is an MTF correction process, also referred to as sharpness correction, which is a process for performing sharpness correction on input data using a digital filter such as a Laplacian filter.

Process 5 is a gamma correction process for correcting a difference in a gradation curve between a device for inputting image data and a device for outputting image data. For example, this is a process of outputting nonlinear gamma correction data using a 256 word 8-bit LUT (lookup table).

The process 6 is a binarization process in which the data subjected to the gamma correction process is converted into 1-bit binary data corresponding to the brightness. For the binarization processing, for example, an area gradation binarization method such as an error diffusion binarization method can be used.

FIG. 7 shows a process 1 for each pattern divided by the attribute of the image data and the magnification processed in the scaling process.
FIG. 14 is a diagram showing a load required in processing 6; Referring to the figure,
Pattern A is a pattern in which the attribute of the pixel data to be processed in the image data is “character”, and the magnification at which the scaling process is performed in process 3 is “1”.
The load required for each of "1", "1",
"0", "3", "1", "1".

The pattern B is a pattern in which the attribute of the pixel data to be processed is “character” and the scaling factor in the process 3 is “4”. In pattern C, the attribute of the image data to be processed is “photograph”, the processing 3 is performed, and the magnification at which the magnification processing is performed is “1”. Pattern D indicates a pattern in which the attribute of the image data to be processed is “photograph” and the magnification at which the scaling process is performed in process 3 is “4”. The load in each of processing 1 to processing 6 in pattern B to pattern D is as shown in FIG. As can be seen from the load on the processing unit for each pattern shown in FIG. 7, the image processing performed by the image processing system according to the present embodiment requires different loads for processing 1 to processing 6 due to different patterns.

In the data processing system according to the present embodiment, if the processing 5 is a specific processing, the processing that can be executed by the MPU 1 in the preceding stage becomes the processing 1 to the processing 5, and the MPU 2 in the subsequent stage.
The processes that can be executed by are the processes 5 and 6. The processing performed by each MPU is performed according to the processing flow shown in FIG.

FIG. 8 is a diagram showing a change over time of the operating state of MPU1 and MPU2 of the data processing system according to the present embodiment in comparison with a conventional data processing apparatus. FIG.
FIG. 8A is a diagram showing an operation state of MPU1 and MPU2 of the data processing system according to the present embodiment.
(B) shows MPU21 and MPU2 of the conventional data processing device.
FIG. 4 is a diagram showing an operation state of FIG. In the conventional data processing device, the MPU 1 at the preceding stage executes the processes 1 to 4, and the MPU 2 at the subsequent stage executes the processes 5 and 6.

Referring to FIG. 8A, for data input after input data B, processing 1 to processing 5 are executed by MPU1, and only processing 6 is executed by MPU2. As a result, the waiting time of each of MPU1 and MPU2 is shortened. Further, the time from the start to the end of processing of each input data is shorter than the time in the conventional data processing apparatus.

As described above, the data processing system according to the present embodiment can operate the MPU 1 even when the attributes of the data to be processed and the contents to be processed vary depending on the data to be processed and the load required for each processing varies. And the standby time of the MPU 2 can be shortened, and data processing can be performed at high speed.

[Third Embodiment] A data processing system according to a third embodiment is obtained by adding a type determination process to the process performed by the data processing system according to the second embodiment.

FIG. 9 is a diagram for explaining processing performed in the data processing system according to the present embodiment.
The processing performed by the data processing system in the present embodiment is SH correction processing, type discrimination processing, Log conversion processing, scaling processing, MTF correction processing, γ correction processing, and binarization processing. It is performed in order.

The type determination process is a process for determining the type of pixel data to be processed. The types of pixel data refer to two types, “background” and “attribute”. Type determination is
It includes background determination and attribute determination.

In the background determination, the background of the pixel data to be processed is determined. Here, “background” refers to a background area to which pixel data to be processed belongs, and includes “image” and “plain”. The “image” is an area where the image has been drawn on the background in a region where there is a change in shading. "Plain"
Is an area where there is no change in shading and nothing is drawn on the background.

In the attribute determination, the attribute of the pixel data to be processed is determined. Here, the “attribute” refers to a region to which pixel data to be processed belongs,
Includes "text" and "photo" areas. “Character” is an area where a character is drawn. “Photo” is an area where a photo is drawn.

FIG. 10 is a flowchart showing the flow of the processing performed in the type determination processing. Referring to the figure, the area discriminating process performs an attribute discriminating process (step S21) and a background discriminating process (step S22), based on the attribute discriminated in the attribute discriminating process and the background discriminated in the background discriminating process. To 4
(Step S23 to Step S2)
9). That is, if the attribute is text and the background is an image,
The type of pixel data is set to "1" (step S25). If the attribute is character and the background is plain, the type of pixel data is set to "2" (step S26). If the attribute is photo and the background is image, The type of pixel data is set to "3" (step S28), and when the attribute is a photograph and the background is plain, the type of pixel data is set to "4" (step S29).

In this type determination processing, pixel data to be processed is classified into four types. As will be described later, the load involved in the processing of pixel data is greatly different depending on the four types. Therefore, it is possible to predict the type of the pixel data before performing the processing, thereby predicting the load of the processing to be performed later. it can.

FIG. 11 is a diagram showing loads in processes 1 to 7 for each type determined by the type determination process.
Referring to the figure, loads in processing 1 to processing 7 are shown by types 1 to 4, respectively. Regarding the SH correction processing of the processing 1 and the background determination processing of the processing 2, the load is “1” regardless of the type. Other processes have values between “0” and “3” as shown in the figure.

The type of the pixel data to be processed is such that the load in the processing excluding the specific processing from the processing executable by the MPU 1 and the processing load excluding the specific processing from the processing executable in the MPU 2 are almost the same. The specific processing is determined by

FIG. 12 is a diagram showing a specific process for each type of pixel data to be processed. Referring to the figure, when the type of pixel data to be processed is “1”, processing 3 to processing 5 are set as the specific processing, and the load of the processing before the specific processing at this time is “2” and the processing is smaller than the specific processing. The load of the subsequent processing is “2”. In addition, the load of the specific processing is “4 to”. This is because the load of the specific process is changed by the scaling process.

The type of pixel data to be processed is "2"
In the case of, the processes 3 to 6 are the specific processes. Similarly, when the type of the pixel data to be processed is “3”, the processes 4 to 6 are specific processes, and when the type is “4”, the processes 3 to 6 are the specific processes.

As described above, the type of image data to be processed is determined, the load of the processing performed in the subsequent processing is predicted in advance, and the MPU 1 and the MPU 1 are determined based on the predicted load.
The specific processing that can be performed with both PU2 is changed. By changing the specific processing, the processing according to the load of the image data to be processed can be shared between the MPU1 and the MPU2, so that the waiting time can be further reduced and the data processing speed can be increased. It becomes possible.

FIG. 13 is a flowchart showing a flow of processing performed by the MPU of the data processing system according to the present embodiment. Referring to the figure, the difference from the processing performed by the MPU in the first embodiment shown in FIG. 3 is that processing for determining constants S and L according to the type of pixel data to be processed in step S35 ( Step S3
5) is added. The other points are the same as those in the flow of the process shown in FIG. 3, and thus description thereof will not be repeated.

The processing performed in step S35 includes a constant S indicating the number of the first processing of the specific processing based on the specific processing shown in FIG. Is determined, which indicates the number of the process. The constant S and the constant L are used in the process of comparing and determining the number F of the process that the MPU has finished executing in steps S40 and S41, respectively.

Since the type determination processing is not performed in the MPU 2 at the subsequent stage, it is unknown which type of pixel data is to be processed. Therefore, when data DATA is transmitted from the MPU 1 in the preceding stage to the MPU 2 in the subsequent stage, the “type” is also transmitted.

FIG. 14 shows data D in the present embodiment.
It is a figure showing the data format of ATA. Referring to the drawing, the data format of data DATA includes a 2-bit type flag, a 4-bit processing flag, and 8-bit processing data. In the type flag, the type of the pixel data to be processed determined in the process determination processing is written and transmitted. The number of bits of the type flag is set to 2 bits because there are four "types" in the present embodiment. If there are four or more types determined to predict the load of the subsequent processing, a larger number of bits is required.

As described above, in the data processing system according to the present embodiment, in the type determination processing, it is predicted how much load the image data to be processed is the pixel data that will be required in the processing to be performed. Since the specific processing is changed based on the predicted result, the waiting time of MPU1 and MPU2 can be shortened, and the data processing can be performed at high speed.

[Fourth Embodiment] The data processing system according to the fourth embodiment is different from the data processing system according to the third embodiment in that the specific processing is changed based on the type determined by the type determination processing. On the other hand, based on the type determined by the type determination process,
And the process performed by the MPU 2 at the subsequent stage are determined. Referring to FIG. 11, the processing before dotted line 10 is performed by MPU1, and the processing after dotted line 10 is performed by MPU2.
Specifically, the type of pixel data to be processed is “1”
In the case of " 2 ", processing 1 to processing 4 are executed by MPU1, and processing 5 to processing 7 are executed by MPU2. If the types are “3” and “4”, processing 1 to processing 5
The processing 6 and the processing 7 are executed by the MPU 2.

In this embodiment, assuming that the specific processing is processing 5, the MPU performing the specific processing is determined according to the type of pixel data to be processed.

Accordingly, the load of the pixel data to be processed can be predicted based on the type determined by the type determination processing, and the MPU to execute the specific processing is determined according to the predicted load. And the waiting time generated in the MPU 2 can be shortened. As a result, data processing can be performed at high speed.

Although the data processing system has been described in the present embodiment, the data processing system may be regarded as a recording medium on which a program for causing a computer to execute the flow shown in FIG. 3, FIG. 10, or FIG.

The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining data input / output between MPUs in a data processing system according to a first embodiment.

FIG. 2 is a diagram illustrating a temporal change in an operation state of MPU1 and MPU2 of the data processing system according to the first embodiment.

FIG. 3 is a flowchart showing a flow of processing performed by an MPU of the data processing system according to the first embodiment.

FIG. 4 shows MPU1 and MPU2 in the first embodiment.
FIG. 9 is a diagram showing a data format of data DATA transferred between the first embodiment and the second embodiment.

FIG. 5 shows processing 6 to processing 1 required for processing 1 to processing 5;
FIG. 11 is a diagram illustrating a state of each MPU when processing input data that is always smaller than a load required for 0, in comparison with a conventional data processing apparatus.

FIG. 6 shows the load required for processing 1 to processing 5 is processing 6 to processing 1
FIG. 7 is a diagram illustrating a state of each MPU when processing input data that is always larger than a load required for 0, as compared with a conventional data processing apparatus.

FIG. 7 shows processing 1 to processing 6 for each pattern determined based on the attribute of the pixel data to be processed and the magnification for the scaling processing.
FIG.

FIG. 8 is a diagram illustrating a temporal change in the operation state of MPU1 and MPU2 of the data processing system according to the second embodiment, as compared with a conventional data processing apparatus.

FIG. 9 is a diagram for describing processing performed in a data processing system according to a third embodiment.

FIG. 10 is a flowchart showing the flow of a type determination process.

FIG. 11 shows processing 1 for each type of pixel data to be processed.
FIG. 11 is a diagram showing loads in processing 7;

FIG. 12 is a diagram illustrating a specific process for each type of pixel data to be processed;

FIG. 13 is a flowchart showing the flow of processing performed by the MPU of the data processing system according to the third embodiment.

FIG. 14 is a diagram showing a data format of data DATA in the third embodiment.

FIG. 15 is a block diagram for explaining data input / output between MPUs in a conventional data processing device.

FIG. 16 shows MPU21 and MPU of a conventional data processing device.
22 is a diagram showing a temporal change of an operation state with the operation state of FIG.

[Explanation of symbols]

 1,2 MPU 21,22 MPU 10 dotted line

Claims (6)

[Claims] 1. A data processing apparatus comprising: a plurality of processing units connected serially, wherein the plurality of processing units share a series of processes and execute the series of processes asynchronously, thereby performing the series of processes on input data. In the system, the plurality of processing units, a first processing unit capable of executing a specific process of the series of processes and a preceding stage process thereof,
A second process capable of executing the specific process and the subsequent post-process;
A data processing system, comprising: 2. The data processing system according to claim 1, wherein the first processing unit suspends execution of the specific processing in response to a request from the second processing unit. 3. The method according to claim 2, wherein the second processing unit executes the specific processing on the input data for which the specific processing has not been performed by the first processing unit. 3. The data processing system according to 1 or 2. 4. The apparatus according to claim 1, further comprising: a prediction unit configured to predict a load of the plurality of processing units, wherein a processing unit that executes the specific processing is determined according to the load predicted by the prediction unit. Item 4. The data processing system according to any one of Items 1 to 3. 5. The apparatus according to claim 1, further comprising a prediction unit for predicting loads on the plurality of processing units, wherein the specific processing is changed according to the load predicted by the prediction unit. The data processing system according to any one of the above. 6. The data processing system according to claim 4, wherein the prediction unit includes a unit for detecting a type of the input data, and predicts a load based on the detected type. .