JP2000181983A - Method and device for processing partial line of image data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate the utilization of various scan modes and matrix sizes by ordering the half lines of data with the sequence of storage addresses and relating the data to successive full lines for reconfiguring a scan image. SOLUTION: A stream 14 of X rays is emitted from an X ray source 12 toward a reagent 16 such as human body according to a request, one part of these X rays is passed through the reagent 16 and made incident to a detector 18, and the detector 18 separates it to plural discrete pixels. In these respective pixels, a signal 20 expressing the strength of radiation made incident to the detector 18 is sent to a signal processing circuit 22. Then, the circuit 22 adjusts the data received from the detector 18 through a signal sieve corresponding to the sequence, aligns the data, forms the data of ordered half lines, which a doctor or the like in charge can interpret, and relates these data to successive full lines for reconfiguring the scan image.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to processing of a sequence in an image such as an X-ray image, specifically, a partial line, and more specifically, to subsequent processing and display. For converting a half line of pixel data into a full line.

[0002]

2. Description of the Related Art Images formed by x-rays and other imaging systems are acquired in various ways, depending on the structure and configuration of the detection subsystem. Generally, a detector is used to receive image information that has been partitioned as pixels in a matrix (also referred to as "pixels"), the matrix of pixels collectively defining the overall image of interest. The matrix of pixels is typically divided into a plurality of rows, which are scanned and analyzed sequentially or in a predetermined sequential pattern. Each row of pixels can then be reassembled by processing circuitry to reconstruct a useful image, which can be displayed or printed for use by the attending physician or technician.

[0003] In X-ray and other image processing modalities, various scan formats and matrix sizes are commonly used. In many of these approaches, not only is the entire image divided into rows of pixels, but each row is further subdivided into half lines of pixels. To efficiently process image data, half lines of pixels can be detected and processed in various orders. For example, for a given pixel matrix, half lines of pixel data are acquired and processed starting at the upper and lower outer edges of the image and progressing toward the image centerline parallel to the pixel half lines. Is also good. In another processing method, the half line of the pixel data may be processed so as to advance from the center line of the entire image matrix toward the upper and lower edges. Furthermore,
The half lines of pixel data may be acquired and processed progressively as sequential half lines starting from the upper corner of the image and continuing to the lower corner on the opposite side.

Depending on the pixel data acquisition sequence used, the pixel data processed by the imaging system may arrive at the signal processing circuit as interlaced half lines of data, which are They must be sorted to form a meaningful image. Specifically, where half lines of data are obtained alternately from opposite upper and lower parts of the image, the half lines of data are adjacent full lines that travel from one side of the image to the other. Must be sorted and grouped as In addition, the full line is arranged from the upper or lower edge of the image to the opposite edge, reshaping the arrangement of pixels representing the human body or object being scanned.

[0005]

In addition to the sorting and re-association operations performed on the interlaced half-line image data, depending on the type of feature being imaged and the details desired, It may be desirable to form scanned image data having various matrix dimensions (i.e., rows of pixels by columns of pixels). Thus, the circuitry used to process and sort the half lines of pixel data is based on various possible matrix
Advantageously, it conforms to the format.

[0006]

The present invention, in one aspect, comprises:
A method for sorting partial lines or half lines of image data formed by an imaging detector is provided. The half line of data is received at a processing circuit and is assigned a memory storage address. The memory storage address for each half line of data is determined by a half line counter with reference to a base address table. The value corresponding to the output position is stored in the base address table. These values are changed with reference to the offset. As the half line counter is incremented (incremented) for each half line of sequentially received data, the memory address where the data is stored is made unique with reference to the base address table and the offset. Is determined. The resulting sequence of storage addresses orders the half lines of data and associates the data with sequential full lines for reconstruction of the scanned image.

[0007] The present approach facilitates the use of different scan modes and different matrix sizes. By changing the base address and offset used to generate the output memory address location, various scan modes can be used, including outside-to-inside and inside-to-outside scans. Furthermore, by setting an appropriate value in the base address table and using an appropriate offset, the same system can be used in a calculation efficient manner.
It can be adapted to various pixel matrix dimensions.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIG. 1, the major components of an imaging system 10 are shown, which may include an X-ray flow 14 on demand. X-ray source 12 configured to emit
It is included. X-rays are directed to a subject 16 such as a human body. Some of the X-rays pass through the subject and enter the detector 18. Detector 18 is configured to separate a plurality of discrete pixels and generates a signal within each pixel that is representative of the intensity of radiation incident on the detector.
These signals are sent from detector 18 to signal processing circuit 22 as a data stream represented by reference numeral 20.

[0009] Signal processing circuitry 22 conditions and prepares the data received from detector 18 to form ordered data that can be interpreted by the attending physician or technician. The signal processing circuit 22 includes a memory circuit 24
The memory circuit 24 serves to store partial lines of data for image reconstruction for the purposes of the present invention. The signal processing circuit 22 is also coupled to a counter 26, which assists in reordering the data received from the detector 18, as described below. A display / output / input station 28, typically including a monitor or printer, and an input station such as a keyboard, forms a reconstructed image that can be used for interpretation by the attending physician or technician. It is coupled to a signal processing circuit 22. The physician or technician also sets operating parameters such as image matrix size and scanning
8 to the circuit 22. In general, these parameters may be entered by selecting the type of image or application, or by selecting a general inspection configuration. It should be noted that the signal processing circuit 22 and the counter 26 may be defined as general purpose or special purpose microprocessors or any suitable code in a computer. Further, the signal processing circuit 22
May perform functions such as image processing, analysis, and enhancement functions in the system 10 in addition to the functions described below.

FIG. 2 shows an image formed by the system 10 in the form of a pixel matrix 30. Matrix 3
0 includes a discrete series of pixels arranged in parallel rows 32 and parallel columns 34. The rows and columns of pixels form an entire image having a width 36 and a height 38. The specific dimensions of the matrix 30 can vary depending on the type of tissue or subject being scanned and the type of feature of interest in the image. For example, the matrix 30 has a standard format of 204
It may have a size of 8 pixels × 2048 pixels, or 1024 pixels × 1024 as in the case of a cardiac radiographic image.
May have a smaller format of pixels,
It may have further different dimensions, such as 1920 pixels x 2304 pixels for a mammogram.

In addition to adapting to various matrix or image sizes, system 10 includes a detector 18
May be configured to scan the pixel data collected by various modes. Specifically, these modes may subdivide matrix 30 into a plurality of regions defined by vertical centerline 40 and horizontal centerline 42. Within these areas, scanning can proceed according to a predetermined mode. For example, in the embodiment shown in FIG. 2, scanning begins at the left edge 44 adjacent to the upper edge 46. The scan then proceeds to the left edge 44
From the direction of the right edge 48. The next data is the left edge 44 adjacent to the lower edge 50.
Starting from the left edge 44 to the right edge 48
Scanning in the direction of. The information scanned within each area defined by these edges and center lines forms a half line of pixel data, which is indicated by reference numeral 52 in FIG.
The half line of each pixel data is stored in a matrix 30
Contains signals and values representing the intensities in adjacent pixels in the row traversing.

One scan mode shown in FIG. 2 can also be referred to as an outside-to-inside scan mode, in which the first half line of pixel data indicated as "1" is Is scanned at the position. The next half line of the pixel data indicated as “2” extends to the lower left position of the matrix 30. Depending on the configuration of the detector 18, the next half line "3" of pixel data will be adjacent to the upper edge 46 and the right edge 4
Extends towards 8. Next, the pixel data half line "4" is scanned in the direction from the centerline 40 to the right edge 48 adjacent to the lower edge 50. In this mode, scanning proceeds in the order described above until rows of the matrix 30 adjacent to the horizontal center line 42 are scanned.

The information received from detector 18 by signal processing circuit 22 not only includes interlaced half lines or partial lines of pixel data, but also the pixels of the partial lines are further interlaced. Note that data may be included.
However, the approach described below is such that the individual pixels are pre-sorted and form a continuous sequence or sequence of pixel data that defines a half line or, more generally, a partial line. Progress based on the target line. Further, it should be noted that the approach described herein is not limited to the specific scanning sequence shown in FIG. Rather, this approach can be applied to partial lines of pixel data scanned in an outer-to-inner sequence, an inner-to-outer sequence, or a progressive scan sequence, in both symmetric and asymmetric patterns. . The specific scan mode or sequence, and the specific matrix size can be entered by an operator or technician via display / output / input station 28,
It may be configured as a parameter recognizable by the signal processing circuit 22 (for example, a parameter based on selection of the type of image or inspection as described above).

Referring again to FIG. 2, depending on the selected scanning sequence, the partial lines of pixel data received by the signal processing circuit 22 do not correspond to the proper order of the data in the reconstructed image matrix 30. Will be obvious. Signal processing circuitry 22 to enable the data to be reordered for presentation of the reconstructed image
Together with the memory circuit 24 and the counter 26 organize the partial lines of data into a suitable sequence as shown in FIG. This reordered sequence 54 can be conveniently configured in the memory circuit 24 by assigning a particular address 56 to each partial line of data. The sequence 54 shown in FIG.
Of the pixel data shown in the scan sequence of FIG. Thus, the reordered sequence allows a full line of continuous pixel data to be defined for subsequent processing and display.

FIGS. 4, 5 and 6 show exemplary techniques used by the signal processing circuit 22 to reorder the half lines of pixel data of FIG. 2 into the desired sequence 54 of FIG. I have. Specifically, FIG.
Shows a base address table 58 stored in the memory circuit 24. The base address table 58 includes data that associates a specific element number 60 with a base address 62. FIG. 5 shows an offset table 64 which is also stored in the memory circuit 24 and associates the element number 66 with the offset value 68. FIG. 6 illustrates a half line storage address table 70 formed with reference to the base address table 58 and the offset table 64, which will be described below.

Half line storage address 74 in Table 70
To determine, the signal processing circuit 22 executes control logic designed to uniquely assign a particular address to each partial line of image data. This logic can proceed by combining the base storage address in Table 58 with the offset in Table 64. FIG. 7 shows a typical process in such a control logic. As shown in FIG. 7, the control logic starts at step 76 and proceeds to step 78. Step 78
In, the first half-line storage address is assigned to the first element by setting the first half-line storage address to be equal to the corresponding base address in table 58. Thus, the first half line storage address receives a value of "base 0".

Thereafter, the circuit 22 proceeds to step 80 where the assigned value from the base address table 58 is
It is changed by combining the original base address and the offset in Table 64. In the illustrated embodiment, for each base address value 62, a programming value that reassigns a new value corresponding to the previous value plus the offset for the corresponding element found in Table 64.
Code can be provided. Thus, step 80
Subsequently, in the illustrated embodiment, as elements 0 to 3 in Table 58 are assigned to data, the base address values are “base 0 + offset 0”, “base 1−offset 1”, “base 2+ The offset is changed to include the values of "offset 2" and "base 3-offset 3".

Following step 80, counter 26 is incremented as shown in step 82. In step 84, the signal processing circuit 22 determines whether the counter value has reached a predetermined modulus value. In the illustrated example, four quadrants are defined by the centerlines 40 and 42 of the matrix 30 (see FIG. 2), so a modulus value of four is used. As long as the counter value does not reach this modulus value, circuit 22 returns to step 78 and assigns the next base address value from table 58 to the subsequent half line of pixel data.

Once the counter 26 has reached the modulus value,
Circuit 22 proceeds to step 86, where it determines whether the entire matrix has been transformed. This step may be performed with reference to a half line counter value indicated by reference numeral 72 in FIG. The total number of half line counter values corresponds to the number of partial lines within the image matrix 30, the number of partial lines being determined by the dimensions 36 and 38 of the matrix (see FIG. 2) and the selected It depends on the scan mode or sequence.

If the response of step 86 is negative, circuit 22 proceeds to step 88, where counter 26 is reset. Thereafter, the circuit 22 returns to step 78, assigns the changed address to the next group of the half line pixel data, and stores it in the table 58. The control logic proceeds until the entire matrix 30 has been transformed, after which it ends as shown in step 90.

Although the data may be reordered by associating the half line storage address 74 with the pixel data, each set of pixel data is preferably located at a location corresponding to the address location indicated in Table 70. And memory circuit 2
4 is stored. Also, while the above approach refers to tabulated data, the addresses, offsets and resulting storage addresses may be implemented as a look-up table as described herein, or Those skilled in the art will readily appreciate that they may be embedded in appropriate code executed by the processing circuit 22.

Those skilled in the art will also appreciate that by altering the base address and offset values used to determine the half-line storage address, the technique of the present invention can be used to vary the size of various image matrices, and from inside to outside. It can be easily configured to accommodate a variety of scan modes, including both a sequence of the same and a sequence from the outside to the inside. In addition, the technique of the present invention is used to simultaneously transmit half-line data to the signal processing circuit.
A particularly computationally efficient system for obtaining continuous full lines of pixel data in real time is provided. The system can be easily reconfigured by entering a selection of a particular matrix size and a selection of a scanning mode via the display / output / input station 28.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram of an X-ray imaging system including a circuit for acquiring and processing a half line of image data.

FIG. 2 is a schematic configuration diagram of an X-ray image divided into half lines of pixel data according to a scan mode from outside to inside.

FIG. 3 is a schematic block diagram of a reordered half-line data sequence for the image of FIG. 2 properly sorted to reconstruct the image.

FIG. 4 is a base address table for allocating a base address to a half line of the image data for the image shown in FIG. 2;

FIG. 5 is an offset table for applying an appropriate offset to a base address in the table of FIG. 4;

6 is an output memory formed with reference to the base address table of FIG. 4 and the offset table of FIG. 5 for reordering half lines of image data from the scan order of FIG. 2 to the order shown in FIG. 3; -It is a table of the address position.

FIG. 7 is a flow diagram illustrating exemplary control logic for reordering partial lines of pixel data for subsequent storage and processing.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Imaging system 12 X-ray source 16 Subject 18 Detector 22 Signal processing circuit 24 Memory circuit 26 Counter 28 Display / output / input station 30 Pixel matrix 32 Row of pixels 34 Column of pixels 36 Width 38 Height 40 Vertical center line 42 Horizontal Centerline 44 Left Edge 46 Upper Edge 48 Right Edge 50 Lower Edge 52 Half Line 54 Reordered Sequence 56 Individual Partial Line Address 58 Base Address Table 60, 66 Element Number 62 Base Address 64 Offset table 68 Offset value 70 Half line storage address table 72 Half line counter value 74 Half line storage address

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Matthew E. Ellis United States, Wisconsin, Waukesha, Chippewa Drive, 1213

Claims (20)

[Claims] 1. A method of processing partial lines of image data from a detector, wherein each partial line of data represents a portion of a pixel matrix, comprising: (a) a first sequence; Receiving a partial line of image data at (b) assigning a position in the second sequence to each partial line of image data in the first chain with reference to the plurality of base addresses. (C) changing the base address; and (d) referring to the changed base address for each partial line of image data in the second chain. Assigning positions in a sequence. 2. The method of claim 1, wherein the location of each partial line of image data in the second sequence corresponds to an address in a memory circuit. 3. The method of claim 1, wherein the base address is formed as a function of a size of a pixel in the pixel matrix. 4. The system according to claim 1, wherein the base address is changed with reference to an offset value stored in a memory circuit.
The method described in. 5. The method of claim 4, wherein the offset value is formed as a function of a size of the pixels of the pixel matrix and the first sequence. 6. The method of claim 1, wherein the first sequence corresponds to a scan pattern of the pixel matrix from a peripheral edge of the pixel matrix toward an inner position. 7. The method of claim 1, wherein the base address is changed as a function of a size of the pixel matrix. 8. A method of processing a discrete pixel image including a plurality of pixels arranged in a pixel matrix, the method comprising: (a) based on a size of the pixel matrix and a desired pixel scanning sequence. Determining an address value; (b) forming a plurality of chains of image data for the pixels in the pixel matrix; and (c) forming a desired pixel output sequence for each chain of image data. Assigning a specific address value to which it corresponds. 9. The method according to claim 8, wherein the address value is determined by determining a plurality of base address values and a plurality of offset values based on a size of the pixel matrix and the desired pixel scanning sequence. the method of. 10. The method according to claim 9, wherein said base address value is stored in a base address table, and said offset value is stored in an offset table. 11. The method of claim 9, wherein the base address value and the offset value are combined to determine an address value for at least each concatenation of image data in the first and second groups. 12. Each of the chains of image data may be
12. The method of claim 11, wherein each subsequent chain of image data is assigned an address value of the second group based on a counter value. 13. The method of claim 8, wherein each chain corresponds to a partial line of pixels in said pixel matrix. 14. The method of claim 8, wherein the dimensions of the pixel matrix are set by operator selection. 15. The method of claim 8, wherein said desired pixel scanning sequence is set by an operator's selection. 16. Apparatus for processing a partial line of image data representing discrete pixels in a pixel matrix, comprising an operator configurable address corresponding to a desired sequence of said partial lines of image data. First to store the value
A second memory circuit that stores the partial lines of the image data in the desired sequence; and assigns an address value from the first memory circuit to each partial line of the image data. And a signal processing circuit configured to store the partial line of the image data in the second memory circuit according to the assigned address value. 17. The apparatus according to claim 16, wherein said first memory circuit stores a plurality of base address values and offset values corresponding to a plurality of pixel matrix dimensions. 18. The apparatus according to claim 17, wherein said offset value is based on a predetermined image scanning sequence. 19. The apparatus according to claim 18, wherein offset values based on a plurality of predetermined image scanning sequences are stored in said first memory circuit. 20. The apparatus further comprises a counter, wherein the signal processing circuit increments the counter for each partial line of image data assigned an address value from the first memory circuit. 17. The device of claim 16, wherein the device is configured to: