JP2000178098A - Heat treatment of silicon wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a heat treatment process which enables reduction in oxygen concentration in a wafer to a level required for forming a semiconductor device having excellent properties from the wafer. SOLUTION: This treatment process comprises: subjecting a silicon wafer to heat treatment in a hydrogen atmosphere at 1,100-1,200 deg.C; and subsequently, subjecting the heat-treated wafer to polishing treatment in such a way that a DZ(denuded zone) layer having a >=5 μm thickness remains in the wafer surface; wherein in the heat treatment stage, a silicon wafer having 11.0-13.0×1017 atms/cm3 interstitial oxygen concentration is subjected to heat treatment for a 10-30 min heat treatment time. By subjecting the wafer to hydrogen annealing treatment to reduce oxygen concentration in the wafer, the junction leak current in the region from the wafer surface layer to the depths of several μm can be reduced. By polishing the DZ layer, the asperity of the wafer surface and also the interface micro-roughness can be improved, to realize a silicon water capable of forming a semiconductor device having excellent operating speed characteristics and high insulation resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for heat-treating a silicon wafer, and more particularly to a method for heat-treating a silicon wafer in which a silicon wafer is made defect-free by a hydrogen heat treatment.

[0002]

2. Description of the Related Art A silicon wafer used as a substrate for manufacturing various semiconductor devices is manufactured by a Czochralski method (CZ).
The silicon single crystal ingot having a columnar shape is pulled up from a molten silicon pond by a method), and the silicon single crystal ingot pulled up is cut into a ring. Since a silicon wafer that has been cut out of an ingot contains a large amount of oxygen as an impurity, it is usually subjected to a heat treatment before a step of forming a semiconductor device on the wafer. By subjecting the silicon wafer to heat treatment,
By removing oxygen from the surface layer of the silicon wafer, forming oxygen precipitates inside the silicon wafer, and capturing heavy metal impurities mixed in during the manufacturing process of the semiconductor device by the oxygen precipitates inside, the heavy metal is deposited on the element active region on the surface layer. The impurities are not mixed. This method of capturing heavy metal impurities is generally called intrinsic gettering (IG) technology.

In a conventional method for precipitating oxygen from a silicon wafer, a cut silicon wafer is first heated to a temperature of 1000 ° C.
C. to 1200.degree. C. to diffuse the surface oxygen outward. Next, a heat treatment at a temperature of 600 ° C. to 900 ° C. is performed on the silicon wafer in an atmosphere of nitrogen or oxygen to form a precipitation nucleus of oxygen, and subsequently at a temperature of 900 ° C. to 1150 ° C. to grow an oxygen precipitate. High temperature heat treatment is performed.

Recently, a heat treatment method of performing a so-called hydrogen annealing treatment in which a heat treatment is performed on a silicon wafer in a hydrogen atmosphere has been frequently used. Then
In a conventional heat treatment method including a hydrogen annealing treatment, first,
The heat treatment described above is performed, and subsequently, a polishing process for polishing the surface layer of the wafer is performed. And as final processing,
1000 ° C-1200 under hydrogen atmosphere on silicon wafer
Heat treatment is performed at a temperature of about 1 hour. Thus, a defect layer due to oxygen precipitation is formed inside the wafer, an IG effect is provided, and a DZ layer is formed on the surface of the wafer. Conventionally, the interstitial oxygen concentration of a silicon wafer used is
It is about 1.4 to 1.6 × 10 ¹⁸ atms / cm ³ .

By the way, as semiconductor devices become more highly integrated,
DZ of silicon wafer surface layer where element active region is formed
The demand for defect-free (denatured zone) layers is becoming increasingly severe. The presence of oxygen impurities in Si
This is a major defect on the surface layer of the silicon wafer, which causes an increase in junction leak current at the pn junction surface, and also causes other defects. Therefore, it is necessary to reduce the oxygen concentration of the silicon single crystal in order to reduce defects caused by oxygen.

[0006]

However, the conventional heat treatment method for performing a heat treatment including a hydrogen annealing treatment on a silicon wafer to reduce the oxygen concentration in the silicon wafer has the following problems. The first problem is that when hydrogen annealing is performed, no defect is observed on the outermost surface of the wafer, but a defect layer is often formed in the bulk near the wafer surface. That is, when the hydrogen annealing treatment is performed, the surface layer has no defect, but there is a high possibility that a defect remains in a region slightly deeper than the surface layer, which may deteriorate the semiconductor device characteristics.

A second problem is that the conventional hydrogen annealing deteriorates the micro roughness of the wafer surface. The micro-roughness of the wafer surface varies depending on the wafer maker, but for example, Ra =
0.12 nm, R _max = 1.29 nm, in another example, R
a = 0.24 nm, R _max = 2.18 nm, or Ra
= 0.11nm, is the R _max = 1.23nm and the like. Si
If the interface microroughness of O ₂ / Si is large, 1) the mobility of carriers is reduced, so that the speed performance of the LSI operation is reduced, and 2) the reliability of the ultrathin oxide film is deteriorated, and The withstand voltage of the electrode decreases. Therefore, LSI
In order to enhance the characteristics of the above, it is indispensable to have the flatness of the atomic order on the wafer surface, but it has been difficult to satisfy the required flatness on the wafer surface by the conventional hydrogen annealing treatment.

[0008] The third problem is that dislocation defects occur. Some of the impurity atoms present in the Si function to prevent dislocation propagation in the wafer. Oxygen atoms present in Si as impurities have a good function of preventing dislocation propagation, and if there is a certain oxygen concentration in the wafer, deformation of the wafer such as warpage is unlikely to occur. In other words, in the case of Si crystals, if some oxygen is not present,
As shown in FIG. 5, crystal dislocation defects occur due to stress or the like. However, in the conventional hydrogen annealing treatment, there is a possibility that the necessary oxygen is diffused outward. FIG. 5 is a schematic diagram showing a state in which dislocation defects have occurred due to stress or the like.

As described above, in the conventional wafer heat treatment method including the hydrogen annealing treatment, it was difficult to lower the oxygen concentration to a required level. Accordingly, an object of the present invention is to provide a silicon wafer heat treatment method capable of reducing the oxygen concentration in a silicon wafer to a level necessary for forming a semiconductor device having excellent characteristics.

[0010]

In order to achieve the above object, a method for heat-treating a silicon wafer according to the present invention comprises a heat treatment for heat-treating a silicon wafer in a hydrogen atmosphere at a temperature ranging from 1100 ° C. to 1200 ° C. Having a process,
It is characterized in that oxygen in a silicon wafer is diffused outward by heat treatment.

Preferably, in the heat treatment step, the silicon wafer having an interstitial oxygen concentration in the range of 11.0 to 13.0 × 10 ¹⁷ atms / cm ³ is subjected to heat treatment for a heat treatment time of 10 minutes to 30 minutes. In the method of the present invention, the interstitial oxygen concentration is adjusted to 11.0.
The reason why the concentration is limited to 13.0 × 10 ¹⁷ atms / cm ³ is that when the oxygen concentration is higher than 13.0 ¹⁷ atms / cm ³ , as pointed out in the above-mentioned problem, the vicinity of the wafer surface layer is increased. This is because the probability of occurrence of oxygen-induced crystal defects increases. In the present invention, in order to reduce the probability of occurrence, by lowering the oxygen concentration, it is possible to reduce the junction leakage current in a region of a depth of several μm from the surface of the wafer.

In the present invention, the reason why the heat treatment time is limited to 10 minutes or more and 30 minutes or less is that when the heat treatment time is longer than 30 minutes, the outward diffusion of oxygen is pointed out as described above. Excessively increases, as described below with reference to FIG. 6, the junction leakage current in the region of several μm from the surface increases. FIG. 6A shows that the oxygen concentration is 15 × 10 ¹⁷ atms / cm ^3.
FIG. 6 is a measurement result of a leak current at a pn junction surface when a hydrogen annealing treatment was performed for 1 hour at a heat treatment temperature in a range of 1100 ° C. to 1200 ° C.
(B) shows the leakage current at the pn junction surface when a silicon wafer having an oxygen concentration of 15 × 10 ¹⁷ atms / cm ³ was subjected to hydrogen annealing at a heat treatment temperature in the range of 1100 ° C. to 1200 ° C. for 2 hours. measuring the result, FIG. 6 (c) in the silicon wafer of the oxygen concentration of ^{12 × 10 17 atms / cm 3} 11
It is the measurement result of the leak current in the pn junction surface when performing the hydrogen annealing treatment for 1 hour at the heat treatment temperature in the range of not less than 00 ° C. and not more than 1200 ° C. 6 (a), (b) and (c)
In the graph, the vertical axis represents the leak current value (PA), and the horizontal axis represents the frequency distribution of the leak current value obtained at the time of measurement. As can be seen from FIG. 6, as can be seen from a comparison between FIG. 6A and FIG. 6B, if the processing time of the hydrogen annealing treatment is long, the leak current increases, and FIG. 6A and FIG. As can be seen from the comparison with (2), when the oxygen concentration of the silicon wafer is low, the leak current decreases.

In the present invention, the heat treatment time is shorter than the heat treatment time when hydrogen annealing is performed according to the conventional heat treatment method for a wafer, and the heat treatment temperature is lowered, so that the total amount of heat applied to the wafer is reduced. , Preventing excessive loss of interstitial oxygen. Thereby, in the present invention, generation of dislocation defects can be prevented.

In the method of the present invention, a DZ layer having a thickness of 10 μm or more can be formed on the wafer surface by performing the hydrogen annealing treatment under the above conditions. Therefore, preferably, following the heat treatment step, there is provided a polishing step of performing a polishing treatment on the wafer surface such that the DZ layer remains at 5 μm or more on the wafer surface. In the polishing step, for example, polishing is performed by a CMP method. By polishing the surface layer of the wafer, it is possible to improve the asperity of the wafer surface and improve the interface microroughness, thereby realizing a silicon wafer capable of forming an LSI having excellent operation speed characteristics and high withstand voltage.

In the conventional wafer heat treatment method, the hydrogen annealing treatment is performed after the final polishing treatment. However, as pointed out in the above-mentioned problem, the micro roughness of the wafer surface often deteriorates. Therefore, in the present invention, the micro-roughness of the wafer surface is improved by performing polishing again after the hydrogen annealing treatment.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in more detail with reference to the accompanying drawings based on embodiments. Embodiment Example This embodiment is an example of an embodiment of a heat treatment method for a silicon wafer according to the present invention. FIG. 1A is a schematic diagram showing pulling of a silicon single crystal, and FIG. FIG. 3 is a schematic diagram showing oxygen ions existing between lattices of silicon atoms. First, by using the CZ method, as shown in FIG. 1A, by controlling the number of rotations of the seed crystal and the crucible,
Oxygen ions existing between lattices of silicon atoms are diffused outward as shown in FIG.
A silicon single crystal having an interstitial oxygen concentration within a range of 0 × 10 ¹⁷ atms / cm ³ is pulled to produce a silicon single crystal ingot.

Next, a silicon thin plate is manufactured by slicing the silicon single crystal ingot in the same manner as in the prior art. The silicon thin plate is cleaned, chamfered, and wrapped. Next, the substrate is washed and subjected to an etching process, and after further cleaning, a mirror polishing (polishing) process is performed and the substrate is cleaned to obtain a silicon wafer.

In the present embodiment, the silicon wafer obtained as described above is subjected to hydrogen annealing under the following conditions.
A heat treatment is performed at a temperature in the range of 1100 ° C. to 1200 ° C. in a 100% hydrogen atmosphere for about 10 to 30 minutes to diffuse the interstitial oxygen outward. FIG. 2 is a schematic diagram illustrating the operation of the hydrogen annealing process performed by the wafer heat treatment method according to the present embodiment. That is, by performing a heat treatment in a hydrogen atmosphere, the oxide film on the Si surface layer is removed and defects (oxides of Si) on the Si surface layer are decomposed as shown in the following equation. SiO _x → Si + O ₂ (gas) ··· Decomposition of defects SiO ₂ + 2H ₂ → Si + 2H ₂ O ··· Removal of oxide film

The heat treatment temperature and the treatment time of the hydrogen annealing treatment are determined by the oxygen concentration in the Si crystal of the silicon wafer. For example, 1) for a silicon wafer having an oxygen concentration of about 11.0 × 10 ¹⁷ atms / cm ³ , heat treatment temperature: 1100 ° C. to 1200 ° C. heat treatment time: about 10 minutes 2) oxygen concentration of 13.0 × 10 ¹⁷ atms / cm ³ For a silicon wafer of about ³ cm ³ , a heat treatment temperature: 1100 ° C. to 1200 ° C. Heat treatment time: about 30 minutes By subjecting the silicon wafer to hydrogen annealing under the above conditions, as shown in FIG. A defect-free layer is formed in the wafer surface layer area. FIG. 3 is a schematic diagram showing the DZ layer existing in the surface layer region of the wafer.

A polishing process is performed on the silicon wafer that has been subjected to the hydrogen annealing process. In the polishing process, as shown in FIG. 4, a surface layer of about 2 to 3 μm is polished and removed by CMP to leave a DZ layer having a layer thickness of 5 μm or more in the wafer surface layer area. FIG. 4 is a schematic diagram showing a state in which a required DZ layer remains after polishing the DZ layer in the wafer surface layer area. In CMP, colloidal silica is used as a polishing slurry, and NaOH having a pH of about 9 to 13 is used as a chemical solution.
Use an aqueous solution.

[0021]

According to the method of the present invention, 1
By having a heat treatment step of performing heat treatment on the silicon wafer at a heat treatment temperature of 100 ° C. or more and 1200 ° C. or less, the surface layer of the silicon wafer can be made defect-free, and the junction leak of the semiconductor device can be reduced. Also,
By performing the heat treatment step and the polishing step following the heat treatment step, the surface layer of the silicon wafer can be made defect-free and smooth, the reliability of the gate oxide film of the semiconductor device can be improved, and The operating characteristics of the semiconductor device can be improved.

[Brief description of the drawings]

FIG. 1A is a schematic diagram illustrating pulling of a silicon single crystal, and FIG. 1B is a schematic diagram illustrating oxygen ions existing between lattices of silicon atoms.

FIG. 2 is a schematic diagram illustrating the operation of a hydrogen annealing process performed by the wafer heat treatment method according to the embodiment.

FIG. 3 is a schematic diagram showing a DZ layer existing in a wafer surface layer area.

FIG. 4 shows a state after polishing a DZ layer in a wafer surface area.
FIG. 4 is a schematic diagram showing a state where a required DZ layer remains.

FIG. 5 is a schematic diagram showing a state in which a dislocation defect occurs due to stress or the like.

6 (a), 6 (b) and 6 (c) are respectively
4 is a graph showing a relationship between a hydrogen annealing time and a junction leak current and a relationship between an oxygen concentration and a junction leak current.

Claims (4)

[Claims] 1. An atmosphere of not less than 1100 ° C. and 1200 in a hydrogen atmosphere.
A heat treatment method for a silicon wafer, comprising: a heat treatment step of performing a heat treatment on a silicon wafer at a temperature in a range of not more than ° C., wherein oxygen in the silicon wafer is diffused outward by the heat treatment. 2. In the heat treatment step, the interstitial oxygen concentration is 1
2. The method according to claim 1, wherein the heat treatment is performed on the silicon wafer in a range of 1.0 to 13.0 × 10 ¹⁷ atms / cm ³ for a heat treatment time of 10 minutes or more and 30 minutes or less. 3. The silicon wafer according to claim 1, further comprising a polishing step of performing a polishing process on the wafer surface so as to leave a DZ layer of 5 μm or more on the wafer surface, following the heat treatment process. Heat treatment method. 4. The heat treatment method for a silicon wafer according to claim 3, wherein in the polishing step, polishing is performed by a CMP method.