JP2000175068A - Deflection distortion correcting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device where a correction quantity can continuously be controlled with less power loss by inserting a primary winding of a transformer to a horizontal deflection circuit, connecting a capacitor to the secondary winding via a switch element whose other terminal connects to ground and turning off the switch element for a prescribed period within a horizontal blanking period. SOLUTION: A horizontal deflection drive circuit 1 supplies a current to a horizontal coil. In the case that a control circuit 8 outputs a prescribed waveform and a FET is always conductive, since a correction capacitor 3 is coupled with a deflection circuit through a transformer 3, a current similar to the deflection current is supplied to the capacitor 6, and a parabolie voltage is generated across the correction capacitor 6. The FET 7 that switches the connection between the correction capacitor 6 and the transformer 3 is nonconductive for a waveform at a zero level resulting that no current flows while the FET 7 is nonconductive, when a change in the current flowing through the correction capacitor 6 for the blanking period gets smaller so as to reduce the current amplitude.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a horizontal linearity correction circuit for continuously correcting the linearity of a horizontal deflection circuit in an image display device using a cathode ray tube.

[0002]

2. Description of the Related Art In an image display apparatus using a CRT as a display device, the center of deflection and the center of the sphere when the tube surface is a part of the sphere are different. It is displayed in a reduced size at the center. For this reason, the horizontal deflection circuit uses an S-shaped capacitor to delay the change in deflection current at the beginning and end of scanning to correct the distortion.

[0003] Since the capacity of the S-shaped capacitor depends on the horizontal frequency, several types of S-shaped capacitors are prepared for a device having a wide horizontal synchronizing frequency, such as a computer display, and are switched by a switch. There was a problem in terms of accuracy because only values could be taken.

In recent years, flattening of CRTs has progressed, and the phenomenon that the amount of this distortion varies depending on the vertical position of the screen has become remarkable. For this reason, means for continuously changing the S-curve correction amount is required.

[0005] As a means for solving the above-mentioned problem, there is known one described in Japanese Patent Application Laid-Open No. Hei 8-79554. This deflection distortion correction device will be described with reference to FIG.

FIG. 5 is a diagram showing a configuration of a conventional deflection distortion correction apparatus, wherein 101 is a coil for supplying power in a state where AC impedance is high, 102 is a horizontal deflection output transistor, 103 is a damper diode, 10
4 is a resonance capacitor, 105 is a horizontal deflection coil, 106
Is a main S-shaped capacitor, 107 is an auxiliary S-shaped capacitor,
Reference numeral 108 denotes a resistance element that can control a resistance value. B is a voltage source. Next, the operation of the deflection distortion correction device will be described.

First, a case where the resistance element 108 is controlled to have a resistance value of infinity will be described. The voltage source B is supplied to the main S-shaped correction capacitor 106 through the coil 101.
The same voltage is stored. Horizontal output transistor 102
, A pulse having a duty ratio of about 50% is input in synchronization with the horizontal synchronization signal. Horizontal output transistor 1
A deflection current flows to the horizontal deflection coil 105 from the main S-correction capacitor 106 where 02 turns on.

When the horizontal output transistor 102 is turned off, the horizontal deflection coil 105 and the resonance capacitor 104
Resonance starts between. Since the direction of the resonance current is reversed when the resonance has advanced a half cycle, the damper diode 1
03 turns on to stop the oscillation, and thereafter the deflection current continues to flow to the horizontal deflection coil 105 through the damper diode 103 until the horizontal output transistor 102 turns on next. In addition, since the voltage at both ends of the main S-shaped correction capacitor 106 changes in a parabolic manner due to the deflection current, the effect that the change of the deflection current is slow at both ends of the screen and fast at the center is obtained.

Here, the resistance element 108 is controlled and its resistance value is reduced, so that the auxiliary S-shaped correction capacitor 107
The current flowing through the main S-shaped capacitor 106 decreases, and the current flowing through the main S-shaped capacitor 106 decreases. Therefore, the S-shaped correction amount becomes small.

By controlling the resistance element 108 in this manner, the S-shaped correction amount can be continuously varied.

[0011]

In the conventional deflection distortion correcting apparatus, since the amount of current flowing to the auxiliary S-shaped capacitor 107 is controlled by the resistance element, all the current flowing to the resistance element is lost. There were challenges.

In addition, a resistance component is added to the horizontal deflection circuit, so that the linearity (distortion component which is left-right asymmetric) is obtained.
However, there was a problem that it became worse.

In view of the above problems, the present invention controls the amount of S-curve correction by switching operation, so that the amount of S-curve correction can be controlled continuously with little power loss, and furthermore, deflection distortion that does not affect linearity A correction device is provided.

[0014]

In order to solve the above-mentioned problems, a deflection distortion correcting apparatus according to a first aspect of the invention inserts a primary side of a transformer into a horizontal deflection circuit, and connects a secondary side via a switch element. A capacitor is connected, and the switch element is turned off for a predetermined period within a horizontal retrace period.

According to the above-mentioned invention, it is possible to provide a deflection distortion correcting apparatus which can reduce the power loss and can continuously control the S-shaped correction amount.

According to a second aspect of the present invention, there is provided a deflection distortion correcting apparatus according to the first aspect of the present invention, further comprising a control circuit including a comparator for comparing a horizontal retrace pulse with a control voltage. Is used to control the switch element.

According to the above-described invention, it is possible to provide a deflection distortion correction apparatus which can reduce the power loss and can continuously control the S-shaped correction amount.

According to a third aspect of the present invention, in the deflection distortion correcting apparatus according to the second aspect of the present invention, the control voltage is a signal such that the output of the comparator is a signal having a predetermined duty. And

According to the above invention, a switch element having a low withstand voltage can be used.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS.

(Embodiment 1) FIG. 1 shows a configuration diagram of Embodiment 1 of the present invention. In FIG. 1, reference numeral 1 denotes a horizontal deflection driving circuit for driving a horizontal deflection circuit, and 2 denotes a horizontal deflection driving circuit for generating a horizontal deflection magnetic field. Deflection coil, 3 is a transformer for coupling a horizontal deflection circuit and a correction circuit, 4 is an S-shaped capacitor for modulating the horizontal deflection current, 6 is a correction capacitor, 7 is an FET for opening and closing the connection between the correction capacitor 6 and the transformer 3, 5 Is F
A diode 8 for preventing a reverse voltage from being applied to the ET 7 is constituted by an FET drive circuit 9 and a comparator 10, and is a control circuit for driving the FET 7 based on a result of comparing a horizontal retrace pulse with a control voltage.

The operation of the above configuration will be described with reference to the operation waveforms of FIG. A current as shown in FIG. 2B flows through the horizontal deflection coil by the horizontal deflection drive circuit 1. (Figure 2
(A)) represents a horizontal retrace pulse. When the control circuit 8 outputs a waveform as shown in FIG. 2C and the FET 7 is always in the ON state, the transformer 3 is connected to the correction capacitor 6.
, A current similar in shape to the deflection current (FIG. 2D) flows, and a parabolic voltage as shown in FIG. I do. Since the correction capacitor 6 and the horizontal deflection circuit are connected by the transformer 3, a voltage having the same waveform appears on the primary side of the transformer 3. The sum of the parabola voltage generated by the S-shaped capacitor 4 and the voltage appearing on the primary side of the transformer 3 determines the S-shaped correction amount as a whole.

When the relationship between the control voltage to the control circuit 8 and the horizontal retrace pulse is set to the state shown in FIG. 2A, the comparator 10 turns off when the horizontal retrace pulse is higher than the control voltage. The level is output, and the signal is amplified by the FET driving circuit 9 to a level at which the FET 7 can be driven, and the waveform shown in FIG. The FET 7 is off during the zero level of the waveform (FIG. 2 (f)). FET7
Since no current flows during the OFF state, the correction capacitor 6
As shown in FIG. 2 (g), the current flowing in the blanking period has a small change in the current during the retrace period, and the amplitude of the current (FIG.
(D) is smaller than that of (d)). In addition, 2 of transformer 3
The voltage waveform generated on the next side is as shown in FIG.
Paying attention to the parabola waveform in the scanning period of FIG. 2H, the amplitude is smaller than that of FIG. 2E, and as a result, the voltage amplitude appearing on the primary side of the transformer 3 is also smaller. As a result, the overall S-curve correction amount decreases. When the control voltage is changed to increase the length of time during which the FET 7 is turned off, the S-curve correction amount decreases, and when the control voltage is shortened, the S-curve correction amount increases. Thus, the S-shaped correction amount can be continuously varied.

However, as shown in FIG.
Is turned off, a pulse-like voltage is generated by the inductance component of the transformer 3 and the like, so that the withstand voltage of the FET 7 is required to be relatively high.

Although the FET is used as the switch element, another switch element such as a bipolar transistor or a thyristor may be used.

Although the control circuit 8 generates the control signal for the FET 7 by comparing the horizontal retrace pulse with the control voltage, the control signal may be generated from the horizontal retrace pulse using a monostable multivibrator or the like. (Embodiment 2) FIG. 3 is a block diagram showing Embodiment 2 of the present invention. In FIG. 3, reference numeral 21 denotes a horizontal deflection driving circuit for driving horizontal deflection, 22 a horizontal deflection coil for generating a horizontal deflection magnetic field, and 23 Is a transformer for coupling the horizontal deflection circuit and the correction circuit, 24 is an S-shaped capacitor for modulating the horizontal deflection current, 26 is a correction capacitor, 27 is an FET for opening and closing the connection between the correction capacitor 26 and the transformer 23, and 25 is a reverse to the FET 27. Diode to prevent voltage from being applied,
Reference numeral 28 denotes an FET driving circuit 29, a comparator 30, a triangular wave generating circuit 31, and an adder 32, which compares the result of adding the signal from the triangular wave generating circuit 31 to the control voltage with a horizontal retrace pulse and amplifies the result by the FET driving circuit 29. And FET27
Is a control circuit for driving.

The operation of the above configuration will be described with reference to the operation waveforms of FIG. The operation on the horizontal deflection circuit side is the same as that of the first embodiment, and the description is omitted.

FIG. 4A shows a horizontal retrace pulse.
FIG. 4B shows the result of adding the output of the triangular wave generation circuit 31 and the control voltage (x) by the adder 32. The comparator 30 compares (FIG. 4 (a)) with (FIG. 4 (b)) and outputs a pulse width-modulated waveform of the horizontal retrace pulse, for example, a signal as shown in FIG. 4 (c). You. This signal is amplified by the FET drive circuit 29 to drive the FET 27.

Since no current flows through the correction capacitor 26 during the off period (FIG. 4C), the voltage waveform on the secondary side of the transformer 23 is, as shown in FIG.
The waveform of the current flowing through 6 is as shown in FIG. As the amount of current flowing in the flyback period decreases, the voltage amplitude in the secondary side scanning period of the transformer 23 decreases, and the S-shaped correction amount decreases. For example, the control circuit 28
When the duty ratio during the off period of the above is increased, the S-curve correction amount decreases, and when the duty ratio decreases, the S-curve correction amount increases. Thus, the S-shaped correction amount can be continuously varied. Correction capacitor 2 for one time during retrace period
Since the width of the intermittent operation of the FET 6 is narrower, the peak value of the pulse voltage generated during the OFF period of the FET 27 can be suppressed smaller than that of the device of the first embodiment, and the withstand voltage of the FET 27 can be reduced.

Although the FET is used as the switch element, another switch element such as a bipolar transistor or a thyristor may be used.

Although the control circuit 28 compares the control voltage with the horizontal retrace pulse and modulates the pulse width, the control circuit 28 generates a pulse a plurality of times during the retrace period to change the duty ratio of the pulse. Is fine.

[0032]

As described above, according to the present invention, it is possible to provide a deflection distortion correction apparatus which can reduce the power loss and can continuously control the S-curve correction amount.

[Brief description of the drawings]

FIG. 1 is a block diagram of a deflection distortion correction device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of an operation of the deflection distortion correction device according to the first embodiment of the present invention.

FIG. 3 is a block diagram of a deflection distortion correction device according to a second embodiment of the present invention;

FIG. 4 is an operation explanatory diagram of the deflection distortion correction device according to the second embodiment of the present invention;

FIG. 5 is a configuration diagram of a conventional deflection distortion correction device.

[Explanation of symbols]

 1,21 Horizontal deflection drive circuit 2,22 Horizontal deflection coil 3,23 Transformer 4,24 S-shaped capacitor 5,25 Diode 6,26 Correction capacitor 7,27 FET 8,28 Control circuit 9,29 FET drive circuit 10,30 Comparator 31 Triangular wave generating circuit 32 Adder 101 Coil 102 Horizontal output transistor 103 Damper diode 104 Resonant capacitor 105 Horizontal deflection coil 106 Main S-shaped capacitor 107 Auxiliary S-shaped capacitor 108 Resistance element

Claims (3)

[Claims] A primary side of a transformer is inserted into a horizontal deflection circuit, a capacitor via a switch element is connected to a secondary side, and the switch element is turned off for a predetermined period within a horizontal retrace period. Deflection distortion correction device. 2. The control circuit according to claim 1, further comprising a control circuit having a comparator for comparing a horizontal retrace pulse with a control voltage, wherein the switch element is controlled using an output of the comparator. Deflection distortion correction device. 3. The deflection distortion correction device according to claim 2, wherein the control voltage is a signal such that the output of the comparator becomes a signal having a predetermined duty.