JP2000166220A - Power unit, and display and electronic apparatus using the unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a charge pump system of power circuit which can raise the voltage conversion efficiency and reduce the power consumption and in which the user can set the output voltage optionally. SOLUTION: A power circuit 1 has a booster 2 which receives the input of input voltage Vin and also receives the input of a clock signal CLKA for boosting and boosts the input voltage Vin to specified output voltage Vout, a voltage dividing circuit 5 which divides the output voltage Vout of this booster 2 by resistors, a comparator 4 which compares the divided voltage Vm generated by this voltage diving circuit 5 with the control voltage Vcon and outputs the result as an output signal Vc, and a boasting controller 3 which receives the input of the output signal Vc and a clock signal VLK1 for operation from the comparator 4 and supplies the clock signal CLKA for boosting to the booster 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge pump type power supply circuit capable of arbitrarily setting an output voltage while improving voltage conversion efficiency and reducing power consumption, and a display using the same. The present invention relates to an apparatus and an electronic device.

[0002]

2. Description of the Related Art In recent years, OA such as word processors and personal computers have been developed.
2. Description of the Related Art A liquid crystal display device has been widely used as a display device for a device, an AV device that handles images, and a display device for displaying information on a portable information terminal. This is because the liquid crystal display device has features such as thin and light weight and low power consumption as compared with other display devices.

[0003] In particular, there is a demand for further reduction in power consumption of display devices mounted on electronic devices that supply power from batteries such as portable information terminals and mobile phones. In these electronic devices, most of the power consumption in the standby state in which the CPU is stopped and only information display is performed is due to the display device.
That is, this determines the usage time of the electronic device.

Many of these electronic devices use a battery as a power supply, and a voltage of, for example, about +3 V is given as a power supply for a display device. Here, taking a liquid crystal display device as an example, a voltage of about +20 V is required to drive the liquid crystal display device. Therefore, it is necessary to increase the voltage from +3 V to +20 V by an internal power supply circuit of the liquid crystal display device. Conventionally, a booster circuit using a transformer or a charge pump type booster circuit using a capacitor is used as the power supply circuit.

However, in the case of a booster circuit using a transformer, only a maximum conversion efficiency of about 60% can be obtained. In particular, a liquid crystal display device for a portable information terminal or the like has a low conversion efficiency under a low current load. There is a problem that the range of application is limited because it is used.

[0006] For this reason, a charge pump type booster circuit with good voltage conversion efficiency with a small load current has recently attracted attention. For example, WO 96/21880 discloses a power supply circuit of a liquid crystal display device employing a charge pump method (conventional example 1).

Generally, in a charge pump type booster circuit, boosting is performed by accumulating charges charged in a capacitor, so that an output voltage is fixed to an integral multiple of an input voltage. For this reason, for example, when the voltage after boosting is made variable to adjust the display contrast of the liquid crystal display device, a method of adjusting the voltage with a variable resistor using a regulator or the like has been adopted.

Here, a conventional power supply circuit employing a charge pump system will be specifically described with reference to FIG.

In this power supply circuit 81, as shown in FIG. 8, a charge pump type booster 82 receives a booster clock signal CLK8 from a booster clock signal input terminal 85 and an input voltage from an external power supply terminal 84. Vin
And outputs a boosted voltage Vsh. This booster 8
2, the control voltage Vcon is input from the control voltage terminal 86, and the desired output voltage Vout, which is reduced by the voltage control unit 83, is output.

[0010] More specifically, the voltage control unit 83 can have, for example, the circuit configuration shown in FIG.
Is divided by the resistors R91 and R92 between the control voltage terminal 86 to which the booster voltage is input and the boosted voltage terminal 88 to which the boosted voltage Vsh from the booster 82 is input. The output voltage is output as an output voltage Vout using a voltage follower based on OP (conventional example 2).

[0011]

However, in the case of the above-described method of the prior art 2, since the potential once boosted by the charge pump type boosting circuit is used after being reduced, it is necessary to boost the voltage to a required voltage or more. Power loss occurs. Specifically, in the case of the circuit configuration shown in FIG. 9, the boosted voltage terminal 88 is connected to the control voltage terminal 86
Power by i _sh flowing toward {(Vsh-Vco
n) × i _sh }, the power {(Vsh−Vout) × i _out } for stepping down Vsh to the output voltage Vout, and the self-consumption power (Vsh × i _op ) of the operational amplifier as the loss of the power supply circuit. It will happen extra.

Generally, elements such as a field effect transistor are used for switching a capacitor in a charge pump type booster circuit, but most of the power loss is caused by a through current at the time of switching of the field effect transistor. ing.

When a charge pump type booster circuit is used as a power supply, it is necessary to consider that the output voltage drop falls within an allowable range even when the load is maximized. As a method in this case, there is a method of increasing the capacity of a capacitor to be used or increasing the frequency of a boosting switching clock signal.

However, when the method of increasing the capacity of the capacitor is used, it is difficult to secure a component mounting area in a portable information terminal or the like that requires low power consumption and small size, and it is difficult to increase the capacity of the capacitor. It is.

In the case where the frequency of the boosting switching clock signal is increased, the loss at the time of switching is increased and the voltage conversion efficiency is reduced. Furthermore, the boost operation of the charge pump is performed not only at the time of heavy load but also at the time of light load close to no load, so that there is a problem that a certain power loss occurs due to the boost operation.

The present invention solves the above-mentioned problems of the prior art, and can improve the voltage conversion efficiency and reduce the power consumption, and can set the output voltage arbitrarily. It is an object to provide a power supply circuit, and a display device and an electronic device using the same.

[0017]

A power supply circuit according to the present invention receives an input voltage from a power supply and a boosting clock signal.
A booster for boosting the input voltage to a predetermined output voltage, a comparator for comparing the output voltage of the booster with an externally input control voltage, and outputting the result as a signal; A boosting control unit to which an output signal and an operation clock signal are input and which supplies a boosting clock signal to the boosting unit; and thereby, the above object is achieved.

A voltage dividing circuit for dividing the output voltage of the boosting section by resistance may be provided, and the divided voltage generated by the voltage dividing circuit and the control voltage may be compared by the comparing section.

As a comparison result of the comparison section, "Vcon>
Vm ", the boost control unit starts supplying a boost clock signal to the boost unit.
When a result of “Vcon <Vm” is obtained as a comparison result of the comparison unit, the boost control unit may stop supplying the boost clock signal to the boost unit.

As a comparison result of the comparison section, "Vcon <
Vm ", the boost control unit starts supplying a boost clock signal to the boost unit.
When a result of “Vcon> Vm” is obtained as a comparison result of the comparison unit, the boost control unit may stop supplying a boost clock signal to the boost unit.

The display device of the present invention may use the power supply circuit.

In another display device of the present invention, a shift clock signal of a line-sequentially driven scanning line or a clock signal generated by dividing the frequency of the shift clock signal may be used as the operation clock signal.

The electronic device of the present invention may use a power supply circuit.

The operation of the present invention will be described below.

According to the above configuration, the comparing section compares the output voltage of the boosting section with the control voltage input from the outside, outputs the result as a signal, and the boosting control section operates according to the operating clock signal. A boosting clock signal based on the output signal from the comparing unit is supplied to the boosting unit, and the boosting unit boosts the input voltage from the power supply to a predetermined output voltage based on the boosting clock signal. Therefore, the output voltage can be arbitrarily set by the control voltage while using the charge pump method. Further, since the boosting control unit controls the operation of the boosting unit based on the output signal from the comparing unit and does not perform the boosting more than necessary, it is possible to perform the optimal boosting operation corresponding to the load characteristics. Therefore, it is possible to improve the voltage conversion efficiency of the entire power supply circuit and reduce the power consumption.

Further, if a voltage dividing circuit for dividing the output voltage of the boosting section by resistance is provided, and the divided voltage generated by the voltage dividing circuit and the control voltage are compared by the comparing section, the operation of the boosting section is low. The control can be performed by the control voltage, and the power consumption of the power supply circuit can be further reduced.

In addition, by using the power supply circuit in a display device and an electronic device, it is possible to reduce the power consumption of the display device and the electronic device, and it is possible to extend the battery life and extend the usable time. Become.

In addition, as the operation clock signal,
When a shift clock signal of a scan line driven line-sequentially or a clock signal generated by dividing the frequency is used, there is no need to newly provide a clock signal generation circuit.
Power consumption can be reduced accordingly.

[0029]

Embodiments of the present invention will be specifically described below with reference to the drawings.

(Embodiment 1) Power supply circuit 1 according to the present invention
Is for driving, for example, a liquid crystal display device. As shown in FIG. 1, an input voltage Vin is inputted from an external power supply input terminal 11 and a boosting clock signal CL
KA is input, and the input voltage Vin is changed to a predetermined output voltage Vo.
ut, and the output voltage V of the booster 2
A voltage dividing circuit 5 that divides out by resistance, a comparison between the divided voltage Vm generated by the voltage dividing circuit 5 and the control voltage Vcon from the control voltage input terminal 13, and a result of outputting the result as an output signal Vc. Unit 4, an output signal Vc from the comparison unit 4 and an operation clock signal CLK1.
And a boost control unit 3 that supplies a boost clock signal CLKA to the boost unit 2.

Before describing the details of the power supply circuit 1, a boosting method using a charge pump type boosting circuit will be described with reference to FIGS. 2 and 3. FIG.

FIG. 2A schematically shows the switch section 20 used in the booster circuit, and the clock signal CLK2
As a result, the switch 21 is switched to the H-side terminal or the L-side terminal, whereby a high-potential-side potential V _H or a low-voltage-side potential _VL is generated at the input / output terminal V _{I / O.} More specifically, the switch section 20 can have the circuit configuration shown in FIG. 2B, for example, where C1 and C2 are coupling capacitors, D1 and D2 are diodes, R1 and R2 are resistors, and Q1 and Q2 are electric fields. It is an effect transistor. In the switch section 20, when the signal input to the CLK2 terminal becomes "High", the field effect transistor Q1 turns on, and a high-potential-side potential _VH is generated at the input / output terminal VI _{/ O.} At this time, the field effect transistor Q2
Is OFF. On the other hand, when the signal input to the CLK2 terminal becomes "Low", the field effect transistor Q2 turns on, and a low-voltage-side potential _VL is generated at the input / output terminal VI _{/ O.}
At this time, the field effect transistor Q1 is off.

FIG. 3 shows a configuration of a booster circuit 30 using the switch section 20. An input voltage Vin is input from a voltage input terminal 31 and a booster clock signal is input from a booster clock signal input terminal 32. CLK3 is inputted, and the high-voltage side switch part 34 and the low-voltage side switch part 35 which perform the switching operation, and these switch parts 34 and 35
, A boosting flying capacitor 36 and an output capacitor 37 that are switched by the switching operation described above. The input voltage Vin is boosted using these capacitors 36 and 37, and a predetermined output voltage V
Output t.

More specifically, first, when the input voltage Vin is input to the voltage input terminal 31 and the “Low” CLK3 signal is input to the boosting clock signal input terminal 32, the high voltage side switch section 34 and the low voltage side switch The unit 35 is connected to an L-side terminal by a switching operation. Therefore, the input voltage Vin is applied to the boosting flying capacitor 36, and the charge is stored. Next, when the CLK3 signal of “High” is input to the boosting clock signal input terminal 32, the high voltage side switch unit 34 and the low voltage side switch unit 35
Is connected to the terminal on the H side by a switching operation. At this time, the boosting flying capacitor 36 and the output capacitor 37 are electrically connected, and the electric charge charged in the boosting flying capacitor 36 in the previous operation is sent to the output capacitor 37. By repeating this operation, a boosting operation is performed, and an appropriate boosting clock signal CLK3
When the step-up operation is repeated in step (1), a voltage twice the input voltage Vin is generated at the output terminal 33 as the output voltage Vout.

Next, a specific configuration of the power supply circuit 1 of the present invention shown in FIG. 1 will be described in detail with reference to FIGS.

As shown in FIG. 4, the charge pump type booster 2 combines the same three boosters 41, 42 and 43 as the booster 30 shown in FIG.
It is possible to increase the voltage up to eight times as much as in.
This is because the input voltage Vin is generally +3 in a portable information terminal.
This is because a driving voltage of about +20 V is required for a liquid crystal display device used for a portable information terminal. The boost control section 3 is configured by an AND gate 61 as shown in FIG. 6, and the comparison section 4 is configured by a comparator 51 as shown in FIG. The resistors Rc and Rs shown in FIG. 1 are divided resistors for creating a reference voltage for driving the liquid crystal using the output voltage from the booster 2, and here, the resistance ratio is Rc: Rs = 15: 1. did.

First, the operation of the booster 2 will be described. The boosting operation is the same as the boosting circuit 30 of FIG.
Specifically, as shown in FIG. 4, the first stage booster circuit 41 is supplied with an input voltage Vin from a voltage input terminal 44 and receives a booster clock signal CLKA from a booster clock signal input terminal 45. And the high voltage side switch unit S1
By the switching operation of the _H and the low pressure-side switch section S1 _L, the charge from the step-up flying capacitor CF1 to the output capacitor CC1 is transferred. Here, when the boosting operation is repeated with an appropriate boosting clock signal CLKA, a voltage _VA of 2 × Vin occurs at point A shown in FIG.

Next, the second-stage booster circuit 42 receives the booster clock signal CLK from the booster clock signal input terminal 45.
A is inputted, the switching operation of the high voltage side switching unit S2 _H and the low-pressure-side switch unit S2 _L, that voltage generated in the point A is switched appropriately, the charge from the step-up flying capacitor CF2 to the output capacitor CC2 is transferred Is done. Here, an appropriate boosting clock signal CLKA
By the case of repeating the boost operation, the point B shown in FIG. 4 occurs the voltage V _B of the 4 × Vin.

Next, the booster clock signal CLK is input to the third-stage booster circuit 43 from the booster clock signal input terminal 45.
A is inputted, the switching operation of the high voltage side switching unit S3 _H and the low-pressure-side switch section S3 _L, the voltage generated in the point B that is appropriately switched, the charge from the step-up flying capacitor CF3 to the output capacitor CC3 transfer Is done. Here, an appropriate boosting clock signal CLKA
When the step-up operation is repeated, a voltage of 8 × Vin is generated as the output voltage Vout at the voltage output terminal 46 shown in FIG. In this manner, the output voltage V obtained by boosting the input voltage Vin eight times by the booster 2 shown in FIG.
out is obtained.

Next, the operation of the comparing section 4 will be described. The comparing unit 4 is configured by, for example, a circuit shown in FIG. 5A, and outputs the output voltage Vout boosted by the boosting unit 2 to a resistor R.
c, divided voltage Vm obtained by resistance division by Rs;
The control voltage Vcon is input, the comparator 51 compares the two, and outputs the result as a signal Vc. The operation of the comparator 51 is such that the output signal Vc is "High" when Vcon> Vm as shown in the table of FIG.
When Vcon <Vm, the output signal Vc becomes “Lo”.
w ". Although the peripheral circuits are omitted here, in actuality, in order to suppress the swing of the output Vc, the peripheral circuits
As shown by Vw in FIG. 7D, the comparator 51 has a certain degree of hysteresis.

Next, the operation of the boost controller 3 will be described. This step-up control unit 3 is composed of an AND gate 61, for example, as shown in FIG.
And an AND signal of the output signal Vc of the comparator 4 to output a boosting clock signal CLKA. Here, the AND gate is taken as an example, but depending on the polarity of the input signal, etc.
Elements such as NAND, OR, and NOR may be used.

Here, the operation of the entire power supply circuit 1 will be described in order from the power-on according to the operation of each unit described above. First, it is assumed that an input voltage Vin (for example, +3 V), an operation clock signal CLK1 (see FIG. 7A), and a control voltage Vcon (for example, +1 V) are input to the power supply circuit 1 shown in FIG. At this time, the output voltage Vout is 0 V because the booster 2 is not operating. Therefore, the divided voltage Vm is also 0 V
It is. Therefore, the comparison unit 4 compares the control voltage Vcon with the divided voltage Vm, and outputs a “High” signal as the output signal Vc because Vcon> Vm. As a result, the operation clock signal CLK1 passes through the boost controller 3 and is input to the booster 2. As a result, the booster 2 starts the boosting operation, and the output voltage Vout increases. Therefore, the divided voltage Vm also increases. The division voltage Vm is equal to the control voltage Vc.
The rise is continued until the potential exceeds the ON potential (for example, +1 V). Since the divided voltage Vm is 1/16 of the output voltage Vout, the output voltage Vout continues to increase until it exceeds + 16V.

Next, when Vcon <Vm, the output signal Vc of the comparator 4 changes to a "Low" signal (FIG. 7).
(B)). Then, the operation clock signal CLK1 is cut by the boosting control unit 3 and the operation of the boosting unit 2 stops. As a result, the rise of the output voltage Vout stops, and the booster 2
The output voltage Vout gradually decreases due to the discharge characteristics of the capacitor CC3 and the load shown in FIG.
The output voltage Vout decreases until the divided voltage Vm falls below the value of the control voltage Vcon. By repeating these operations, the divided voltage Vm becomes, as shown in FIG. 7D, the value of the control voltage Vcon and the width of the hysteresis ± (1/1).
2) Operate to fall within Vw. Note that this voltage V
w was set so as not to affect the liquid crystal display. Further, as shown in FIG. 7C, the boosting clock signal CLKA is stopped during the period shown by the reference symbols S and T, and the boosting operation is not performed. Therefore, power loss due to switching does not occur.

Even when the value of the control voltage Vcon is changed, the divided voltage Vm is changed to the control voltage Vcon in the same manner as described above.
And the hysteresis width ± (1/2) Vw. For this reason, the relationship of the following equation (1) always holds, and a voltage that is about 16 times the control voltage Vcon is output as the output voltage Vout.

Vcon = Vm = (1/16) Vout (1) That is, the output voltage Vout of the charge pump circuit can be made variable. Also, when the load increases due to a change in the display pattern of the liquid crystal, or when the load decreases, the relationship of the above equation (1) is maintained by the same operation. Since a corresponding boosting operation is performed, power loss is reduced.

Further, the comparator 51 of the comparison unit 4 has a self-consumption current of the order of several μA, and uses an input voltage Vin of, for example, +3 V as a power supply of the comparator. Less than 1% of power consumption.

(Embodiment 2) In Embodiment 1, the booster circuits of each stage are simultaneously controlled using the boosting clock CLKA. However, the present invention can be implemented by controlling a part of the booster circuit.

Hereinafter, the power supply circuit 15 according to the second embodiment will be described.
0 will be described with reference to FIG.

FIG. 10 shows a power supply circuit 1 according to the second embodiment.
It is a figure showing 50 blocks. The power supply circuit 150 includes a booster 106, a boost controller 107, and a comparator 108. In the second embodiment, the operation clock signal CL
The difference from the first embodiment is that K1 is input not only to the boost controller 107 but also to the booster 106.

FIG. 11 is a diagram showing details of the booster 106.

The booster 106 includes a first-stage booster 111
, A second-stage booster circuit 112 and a third-stage booster circuit 113.

In the boosting unit 2 of the first embodiment, the boosting clock signal CLKA is input to all boosting stages. However, in the boosting unit 106 of the second embodiment, the boosting clock signal CLKA is supplied to the third-stage boosting circuit. The first stage booster circuit 111 and the second stage booster circuit 112 receive the operation clock signal CLK1.

FIG. 12 is a diagram showing the operating clock signal CLK1, the boosting clock signal CLKA and the like.

As shown in FIG. 12, the operation clock signal CLK1 is a signal that does not stop while the power supply circuit 150 is operating. Therefore, in the circuit configuration of the second embodiment, the first-stage booster circuit 111 and the second-stage booster circuit 112 are always operating, and a voltage of 2 × Vin appears at a point A shown in FIG. At the point B shown, 4 × Vin appears.

Further, the boosting clock CLKA is input to the third booster circuit 113 as in the first embodiment, and the intermittent boost operation is performed only by the third booster circuit.

According to the circuits shown in FIGS. 10 and 11, the variable range of the output voltage Vout is “0 V” in the first embodiment.
２４24V ”to“ 12V to 24V ”has a demerit, but on the other hand, only the final boosting stage performs the intermittent operation, so that all the boosting stages are associated with the boosting operation compared to the case where the intermittent operation is performed. There is an advantage that generation of a ripple voltage is suppressed (output voltage is stabilized).

The driving voltage of the liquid crystal display element is usually 12
Since it is only necessary that the voltage be V or more, the above-described disadvantage does not cause any problem.

By suppressing the generation of the ripple voltage due to the boosting operation, the ripple voltage of the Vm potential shown in FIG. 10 can also be suppressed. Therefore, in the first embodiment, the comparison unit 4 has the hysteresis characteristic. The comparison unit having no hysteresis characteristic shown in FIG.

As described above, FIG. 12 is a diagram showing operation waveforms of signals of the power supply circuit 150 according to the second embodiment.

The difference from the first embodiment is that the timing for supplying or stopping the boosting clock CLKA is performed when the potentials of Vcon and Vm are inverted.

However, the boosting operation is performed for a while immediately after Vcon <Vm due to the delay time t due to the comparator used as the comparing unit 108 and the switching element of the boosting unit 106. It rises until the clock CLKA stops and then starts falling.

Similarly, immediately after Vcon> Vm, the boosting operation is not performed for a while, so the boosting clock CL
It falls until KA is input, and then starts rising.

In these operations, in the first embodiment, the output voltage is more likely to generate a ripple voltage due to the boosting operation than in the present embodiment. This is because all the boosting stages operate or stop at the same time. For this reason, it is desirable to limit the upper limit and the lower limit of the ripple voltage by the comparator having hysteresis. However, by intermittently operating only the final boosting stage as in the configuration of the present embodiment, it is possible to suppress the generation of a ripple voltage due to the boosting operation that affects the output voltage, and the configuration of the comparison unit 108 has a hysteresis as shown in FIG. A stable output voltage can be obtained even if a device having no is used.

From the viewpoint of power consumption, Embodiment 1
Then, while all the boost stages are performing intermittent operation,
In the present embodiment, only the third boosting stage performs the intermittent operation,
This embodiment seems to be disadvantageous in terms of power consumption because the other boosting stages are always operating. However, up to the second boosting stage, the boosted voltage is lower than the voltage required for the liquid crystal display (to drive the liquid crystal), and since the second boosting stage is always operating, the third boosting stage operates. The stop time of the intermittent operation of the boosting stage becomes longer. For this reason, there is no significant difference in power consumption between the present embodiment and the first embodiment in the entire booster circuit.

Here, the operation of the potential difference between Vcon and Vm and the peripheral circuit operation has been described with reference to the configuration of the accompanying drawings for convenience. Therefore, the boosting operation starts when Vcon <Vm, and stops when Vcon> Vm. However, depending on the logical configurations of the comparison unit and the boost control unit, there is no problem even if the configurations are reversed.

[0066]

As described above, according to the power supply circuit of the present invention, the comparing section compares the output voltage of the boosting section with the control voltage input from the outside, outputs the result as a signal, and boosts the voltage. The control unit operates in accordance with the operation clock signal, supplies a boosting clock signal based on the output signal from the comparing unit to the boosting unit, and the boosting unit determines an input voltage from the power supply based on the boosting clock signal. Output voltage.
Therefore, the output voltage can be arbitrarily set by the control voltage while using the charge pump method. Further, since the boosting control unit controls the operation of the boosting unit based on the output signal from the comparing unit and does not perform the boosting more than necessary, it is possible to perform the optimal boosting operation corresponding to the load characteristic. Therefore,
The voltage conversion efficiency of the entire power supply circuit can be improved and the power consumption can be reduced.

Further, if a voltage dividing circuit for dividing the output voltage of the booster by resistance is provided, and the divided voltage generated by the voltage divider and the control voltage are compared by the comparator, the operation of the booster is low. The control can be performed by the control voltage, and the power consumption of the power supply circuit can be further reduced.

By using the power supply circuit for a display device and an electronic device, the power consumption of the display device and the electronic device can be reduced, and the battery life can be extended and the usable time can be extended.

In addition, as the operation clock signal,
When a shift clock signal of a scan line driven line-sequentially or a clock signal generated by dividing the frequency is used, there is no need to newly provide a clock signal generation circuit.
Power consumption can be reduced accordingly.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a power supply circuit of the present invention.

2A and 2B are diagrams showing a switch unit used in the power supply circuit of the present invention, wherein FIG. 2A is a schematic diagram and FIG. 2B is a circuit diagram.

FIG. 3 is a diagram illustrating an example of a charge pump type booster circuit.

FIG. 4 is a diagram showing a circuit example of a booster in the power supply circuit of the present invention.

5A and 5B are diagrams showing a comparison unit in the power supply circuit of the present invention, wherein FIG. 5A is a circuit diagram, and FIG. 5B is a table showing an operation state.

FIG. 6 is a diagram illustrating a circuit example of a boosting control unit in the power supply circuit of the present invention.

FIG. 7 is a time chart showing the operation of the power supply circuit of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional power supply circuit.

FIG. 9 is a diagram illustrating a circuit example of a voltage control unit in a conventional power supply circuit.

FIG. 10 is a diagram illustrating a block of a power supply circuit 150 according to a second embodiment.

FIG. 11 is a diagram showing details of a boosting unit 106;

FIG. 12 is a diagram illustrating operation waveforms of signals of a power supply circuit 150 according to the second embodiment.

[Explanation of symbols]

1 power supply circuit 2 booster 3 boosting control unit 4 comparing unit 5 voltage dividing circuit 20 switch unit 30 boosting circuit _{34, S1 H, S2 H,} S3 H high voltage side switching unit _{35, S1 L, S2 L,} S3 L low-side switch Unit 36, CF1, CF2, CF3 Flying capacitor 37, CC1, CC2, CC3 Output capacitor 41 First stage booster circuit 42 Second stage booster circuit 43 Third stage booster circuit 51 Comparator 61 AND gate circuit Vin Input voltage Vout Output voltage Vcon Control voltage Vm Divided voltage Vc Output signal of comparator CLK1 Operation clock signal CLKA, CLK3 Boost clock signal

Claims (7)

[Claims] A booster for receiving an input voltage and a boosting clock signal from a power supply and boosting the input voltage to a predetermined output voltage; and controlling an output voltage of the booster and a control voltage input from the outside. A power supply circuit comprising: a comparison unit that compares and outputs the result as a signal; and a boost control unit that receives an output signal and an operation clock signal from the comparison unit and supplies a boost clock signal to the boost unit. . 2. The control circuit according to claim 1, further comprising: a voltage dividing circuit for dividing an output voltage of the boosting section by resistance, wherein the comparing section compares the divided voltage generated by the voltage dividing circuit with the control voltage. Power supply circuit as described. 3. The method according to claim 2, wherein the comparison result of the comparison unit is “Vcon
> Vm ", the boost control unit starts supplying a boosting clock signal to the boosting unit. When the comparison result of the comparison unit is" Vcon <Vm ", The power supply circuit according to claim 1, wherein the boost control unit stops supplying a boost clock signal to the boost unit. 4. A comparison result of the comparison section, wherein “Vcon
When the result of <Vm> is obtained, the boosting control unit starts supplying the boosting clock signal to the boosting unit. When the result of the comparison by the comparing unit is “Vcon> Vm”, The power supply circuit according to claim 1, wherein the boost control unit stops supplying a boost clock signal to the boost unit. 5. A display device using the power supply circuit according to claim 1. 6. The power supply circuit according to claim 1, wherein a shift clock signal of a line-sequentially driven scanning line or a clock signal generated by dividing the frequency is used as the operation clock signal. A display device using. 7. An electronic apparatus using the power supply circuit according to claim 1.