JP2000164478A - Overlapping measurement precision improving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to perform an enhanced global alignment while abnormal data is being removed even in the case wherein the destressing affects scaling. SOLUTION: The A-layer of new lot is formed by step ST5. In this step ST5, using the reciprocal of the average values SAX and the SAY of the error of an X-scaling and a Y-scating, the scaling error generated in step 2 is compensated in advance. In step ST6, a B-layer is exposed using enhanced global alignment while the EGA(enhanced global alignment) rejecting function is being used for the purpose of removing an abnormal data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an exposure method using an exposure apparatus used in an optical lithography process in an LSI manufacturing process, and more particularly to an overlay accuracy improving method for improving overlay accuracy in a stepper.

[0002]

2. Description of the Related Art Conventionally, a step-and-repeat type apparatus has been known as an exposure apparatus used for manufacturing a semiconductor device. This step-and-repeat type exposure apparatus repeatedly exposes a single wafer to a pattern image formed on a reticle while moving the wafer stepwise. In the step-and-repeat type exposure apparatus, a stepper that uses a projection lens to sequentially expose each shot area on a single wafer while reducing a pattern image formed on a reticle has become mainstream. . In order to improve the alignment accuracy of the stepper, various devices have been conventionally devised. As an example, for example, Japanese Patent Application Laid-Open No. 61-4442
No. 9 discloses an enhanced global alignment (E
GA) method is disclosed. FIG. 3 shows two off-axis alignment microscopes (hereinafter referred to as WAMs).
And a through-the-lens type alignment optical system (hereinafter referred to as X-LS) for detecting the position of the mark on the wafer in the x direction.
It is called A system. ) And a spot light θS by a through-the-lens type alignment optical system (hereinafter, referred to as a Y-LSA system) for detecting the position of the mark on the wafer in the y direction.
It is a top view which shows the arrangement | positioning relationship in the imaging surface (same as the surface of a wafer) of the projection lens of P, YSP, LYS, and LXS. The WAM includes a WAM 20 and a WAM 21, each of which has an optical axis parallel to the optical axis of the projection lens and forms an image of the belt-like laser spot light YSP, θSP extending in the x direction on the wafer. In FIG. 3, when a coordinate system xy whose origin is the optical axis AX is defined, the x axis and the y axis are respectively
Indicates the direction of movement of the stage on which the wafer is mounted. FIG.
In the middle, a circular area centered on the optical axis AX is an image field if. The rectangular area inside the image field if is a projected image Pr of the effective pattern area of the reticle.
It is. The spot light LYS is applied to the image field if.
Is formed at a position outside of the projection image Pr and on the x-axis. Further, the spot light LXS is also formed at a position outside the projection image Pr in the image field if and coincides with the y-axis. On the other hand, the center of vibration of the two spot lights θSP and YSP coincides with a line segment (parallel to the x-axis) 1 that is separated from the x-axis by a distance Y0 in the y-direction, and the distance DX in the x-direction is equal to the wafer. It is determined to be smaller than the diameter of. The spot lights θSP and YSP are arranged symmetrically with respect to the y-axis, and the main controller (not shown) stores information on the positions of the spot lights θSP and YSP with respect to the projection point of the optical axis AX. In addition, the main control device determines the center position (distance X1) of the spot light LYS in the x direction with respect to the projection point of the optical axis AX.
And information on the center position (distance Y1) of the spot light LXS in the y direction.

[0005] Next, the positioning by the EGA method will be described with reference to FIG. The alignment described below
Is performed for the second and subsequent layers of the wafer,
Assume that chips and alignment marks have already been formed on the wafer. First, the wafer is pre-aligned using the orientation flat (step D10). This orientation flat is positioned so as to be parallel to the x-axis. The wafer is transported and held on the wafer holder while keeping the wafer parallel to the x-axis (step D11). The wafer holder is mounted on a stage that moves two-dimensionally in the x-axis direction and the y-axis direction by a motor or the like, and is rotatably mounted on the stage. For example, as shown in FIG. 5, a plurality of chips Cn are formed on the wafer in a matrix along orthogonal arrangement coordinates αβ on the wafer WA. The α-axis is substantially parallel to the flat of the wafer WA. However, FIG. 5 shows only a part of the chips Cn arranged in a matrix. Each of the chips C0 to C6 is provided with four alignment marks GY, Gθ, SX, and SY. Now, let the center of the center chip C3 be the origin of the array coordinates αβ. Assuming an α axis and a β axis centered on the origin, diffraction grating marks SY0 to SY linearly extending in the α direction are provided on the α axis.
6 are provided on the right side of the chips C0 to C6, respectively. A diffraction grating mark S extending linearly in the β direction
X3 is provided below the chip C3. Similarly, for the chips C0 to C2 and C4 to C6, marks SX0 to SX6 are provided on a line segment passing through the center of the chip and parallel to the β axis. These marks SYn and SXn are detected by spot lights LYS and LXS, respectively. The wafer W is located below each of the chips C0 to C6.
Marks GY0 to GY6, Gθ0 to Gθ used to perform overall alignment (global alignment) of A
6 are provided. These marks GYn and Gθn are formed in a diffraction grating pattern linearly extending in the α direction on a line segment parallel to the α axis. Furthermore, of the chips C0 to C6 arranged in a line in the α direction, for example, the leftmost chip C0
The distance between the mark GY0 and the mark Gθ0 of the right end chip C6 in the α direction is the spot light θ by the WAMs 20 and 21.
It is determined so as to match the distance DX between SP and YSP. In other words, two separate marks GY0 and G
Global alignment of the wafer WA is performed by the off-axis method using θ6. With these two marks, for this global alignment, other marks GY
1 to GY6 and the marks Gθ0 to Gθ5 are unnecessary. In short, it suffices that two marks extending in the α direction exist on the line parallel to (or coincident with) the α axis of the wafer WA with a distance DX therebetween.

[0004] The main controller determines the marks GY0 and Gθ0 from the position information of the stage when the wafer WA is received from the pre-alignment device and the position of the wafer WAM2 from the position information.
Information such as the direction and amount of movement of the stage until it is located within the 0, 21 detection field of view is stored in advance as a constant unique to the apparatus. In step D12, the main controller positions the stage so that the mark GY0 is located within the detection field of view of the WAM21. Thereafter, the main controller precisely positions the stage in the y direction based on the alignment signal from the WAM 21 and the position information from the laser interferometer so that the center of vibration of the spot light YSP coincides with the center of the mark GY0 in the y direction. I do. When the center of vibration of the spot light YSP and the center of the mark GY0 match, the mark Gθ6 is detected by the spot light θSP of the WAM 20 while performing feedback control with the alignment signal from the main controller wave WAM21 so that the state is maintained. Rotate the wafer holder as shown. Further, the main controller makes the center of vibration of the spot light θSP coincide with the center of the mark Gθ6 in the y direction. By the above series of operations, the spot light YSP and the mark GY0 match, and the spot light θS
P and the mark Gθ6 match, the rotational deviation of the array coordinates αβ of the wafer WA with respect to the coordinate system xy is corrected, and the association (regulation) regarding the position of the coordinate system xy and the array coordinates αβ in the y direction (β direction) is established. Complete.

Next, the mark SX3 of the chip C3 is XL
After the stage is positioned so that it is scanned by the SA spot light LXS, the stage is moved in the x direction. At that time, the main controller detects and stores the position of the wafer WA in the x direction when the mark SX3 matches the spot light LXS. This completes the association between the coordinate system xy and the position of the array coordinates αβ in the x direction (α direction).

Until the completion of the global alignment, the accuracy of the alignment detection system, the setting accuracy of each spot light, or the variation in the position detection accuracy due to the optical and geometrical state of each mark on the wafer WA (effect of the process). This causes an error, and the chips on the wafer WA are not always accurately aligned (addressed) in accordance with the coordinate system xy. The error (hereinafter referred to as shot address error) is expressed by the following four factors: wafer rotation, orthogonality of the coordinate system xy, linear expansion and contraction of the wafer in the x and y directions, and offset in the x and y directions.
The rotation of the wafer, for example, when correcting the rotation of the wafer,
Two spot lights YSP and θS serving as alignment references
This occurs because the positional relationship with P is not accurate, and is represented by the residual rotation error amount θ of the array coordinates αβ with respect to the coordinate system xy. The coordinate system xy is generated when the feed direction of the stage is not exactly orthogonal, and is represented by an orthogonality error amount w. The linear expansion and contraction of the wafer in the x and y directions means that the entire wafer expands and contracts due to the wafer processing process. For this reason, the actual chip position deviates by a small amount in the α and β directions with respect to the designed arrangement coordinate value of the chip, and is particularly remarkable in the peripheral portion of the wafer. The amount of expansion and contraction of the entire wafer is represented by Rx and Ry in the α (x) direction and the β (y) direction, respectively. Where R
x is the ratio between the measured value of the distance between the points in the x (α) direction on the wafer and the design value, and Ry is the ratio of the measured value of the distance between the two points in the y (β) direction on the wafer and the design value. And Therefore,
When both Rx and Ry are 1, there is no expansion or contraction. x (α)
The offset in the direction and the offset in the y (β) direction are
Due to the detection accuracy of the alignment system, the positioning accuracy of the wafer holder, etc., the entire wafer is displaced by a small amount in the x direction and the y direction, and the offset amount Ox,
It is represented by Oy. In FIG. 5, the residual rotation error θ of the wafer and the orthogonality error w of the stage are exaggerated. When the above four factors are added, the shot position (Fxn, Fy) to be actually positioned with respect to the shot (chip) at the coordinate position (Dxn, Dyn) in design.
n) is represented by Equation 1.

[0007]

(Equation 1)

[0008] When Equation 1 is rewritten into a matrix operation equation, Equation 2 is obtained.

[0009]

(Equation 2)

[0010] After the global alignment is completed, the main controller measures the positions of a plurality of chips on the wafer. In step D13, the main control device positions the stage based on the array design value so that the X-LSA spot light LXS is arranged in parallel with the mark SX0 attached to the leftmost chip C0 in FIG. The stage is moved (scanned) by a fixed amount in the x direction so that SX0 crosses the spot light LXS. During this movement, the main controller changes the time-series waveform of the photoelectric signal of the photoelectric element by x from the laser interferometer.
The position x0 at the time when the mark SX0 and the spot light LXS coincide with each other in the x direction is detected from the waveform state.

[0011] Next, the main controller, at step D14,
The stage is positioned based on the array design value so that the Y-LSA spot light LYS is arranged in parallel with the mark SY0 attached to the chip C0. Thereafter, the stage is moved by a certain amount in the y direction so that the mark SY0 crosses the spot light LYS. At this time, the main controller stores the time-series waveform of the photoelectric signal of the photoelectric element in association with the position information in the y direction from the laser interferometer, and stores the work SY from the waveform state.
At 0, the position y0 at the time when the spot light LYS matches in the y direction is detected. Then, in step D15, the main controller determines whether or not the same position detection has been performed for the M chips. If not, the process proceeds to step D16, where another chip on the wafer is based on the array design value. Then, the stage is moved, and the position detection operation is repeated again from step D13.

Next, in step D17, the main controller determines an error parameter from the design value and the actually measured value by the least square method. That is, the error parameters A and O are determined based on the following equations (3) to (8). In this determination, it is assumed that the main control device has previously selected a design value of each step for which an actually measured value has been detected, and stores the design value.

[0013]

(Equation 3)

[0014]

(Equation 4)

[0015]

(Equation 5)

[0016]

(Equation 6)

[0017]

(Equation 7)

[0018]

(Equation 8)

When a predetermined number of actually measured values have been obtained, the main controller determines the offset amount (Ox, O
After calculating y), the array element a1
1, a12, a21, and a22 are calculated. Since the error parameters A and O are determined by the above calculations, the main controller uses the equation 2 in the next step D18 to calculate the wafer W
The shot address (Fxn, Fyn) corrected for each chip Cn of A by the error parameter is calculated. Then, the main control device stores the calculated value (D
(xn, Dyn). From Equation 1, the displacement (εxn, εyn) from the design value at each shot position is expressed by Equation 9.

[0020]

(Equation 9)

As described above, there are four correction values (error parameters) in the above case: baseline correction, rotation correction, orthogonality correction, and scaling correction.
These errors to be corrected are, for example, E as shown in FIG.
Appears in GA measurement data. FIG. 8 shows FIG. 7 on a wafer.
FIG. 4 is a plan view showing a shot position of FIG. Using these four correction values, it is possible to obtain a pattern that is superimposed more accurately.

Next, in step D19, the main controller positions the wafer holder in a step-and-repeat manner according to the stored chip arrangement map.
As a result, the chip Cn on the wafer WA and the projected image Pr of the reticle accurately overlap, and the next step D20
Exposes the chip Cn with the projection image Pr. After the exposure, in step D21, all the chips C0 to Cm−
It is determined whether the first exposure has been completed. If the exposure of all chips has not been completed, the process returns to step D19, and the step-and-repeat operation is repeated for the remaining chips. If it is determined in step D21 that the exposure of all the chips has been completed, the wafer is unloaded in the next step D22, and the entire exposure processing of one wafer is completed.

At present, in order to improve the accuracy of the EGA method described above, an algorithm for removing abnormal measurement values, for example, a so-called EGA reject function may be added. This function determines that the measured value is abnormal when the difference between the average value of the measured values and a certain measured value exceeds a predetermined value.
However, in the determination of such an abnormality, the following problems occur. Before describing the inconvenience, the current EGA reject function described above will be specifically described.

(1) A pattern is formed by coating, exposing, and developing on a wafer which has been subjected to a base step (which indicates a film forming step). At this time, an alignment detection mark used at the time of exposure in the next step is formed at the same time.

(2) Etching is performed on the wafer on which patterns and marks have been formed. Due to this processing, stress is released on the upper surface of the wafer, and a large error occurs with respect to the magnification at the shot and the scaling at the wafer level.

(3) Next, a CMP (Chemical Mechanical Polishing) step is performed. Variations in the polishing amount cause variations in the shape of the marks on the wafer surface, and marks causing measurement errors occur on the surface. However, there is a step other than the CMP step that causes a situation where the alignment mark measurement failure occurs. Examples of such steps include, for example, an etching step, formation of aluminum by high-temperature sputtering, and a step of thickly depositing an opaque film.

(4) When performing EGA measurement with a stepper, the stepper has a function of improving the accuracy of a correction coefficient called EGA rejection. As described above, this function sets a limit value for the amount of deviation from the average value A of all measured values. Provided to remove abnormal measurement values. The EGA measurement results of the wafer having undergone the sequence shown in (2) and the sequence shown in (3) and the wafer having undergone the process of only (3) without performing the sequence shown in (2) FIG. 9 shows the EGA measurement results. When 0.10 μm is applied to the above-described measurement data as the limit value of the correction coefficient accuracy improvement function, when the sequence shown in (3) is performed without performing the sequence shown in (2), Data a and data b which are considered to be erroneous measurements can be removed. However, most of the data that has gone through the sequences shown in (2) and (3) is removed. Therefore, the use of the EGA reject function causes a deterioration in accuracy.

[0028]

The conventional overlay measurement accuracy improving method is configured as described above. After the mark is formed, a process of changing the scaling, such as a process in which stress is released on the upper surface of the wafer, is performed. In this case, the magnification and scaling errors of the shots increase,
There is a problem that the use of the EGA reject function causes deterioration of accuracy.

The present invention has been made to solve the above problems, and has as its object to secure a normal reject function.

[0030]

According to a first aspect of the present invention, there is provided a method for improving overlay measurement accuracy, comprising: a first layer exposure step of performing exposure for forming a first layer with a first alignment mark; A second layer exposure step of performing an exposure for forming a second layer to be superimposed on the first layer by enhanced global alignment performed with reference to the alignment mark and removing a measurement value not falling within a predetermined range. Prior to the actual execution of the first layer exposure step and the second layer exposure step, a first scaling that occurs in a step from the first layer exposure step to the second layer exposure step. Obtaining a first correction value for compensating for an error, wherein the first layer exposing step comprises: The advance using the first correction value first
And compensating for a scaling error.

In the overlay measurement accuracy improving method according to a second invention, in the overlay measurement accuracy improvement method according to the first invention, the step of obtaining the first correction value includes a step of preparing a lot for correction. Using the lot for correction, performing the steps from the first layer exposure step to the step immediately before the second layer exposure step, and then falls within the predetermined range based on the first alignment mark. Detecting the first correction value through another second layer exposure step of performing exposure for forming the second layer by enhanced global alignment performed without removing any measurement value.

In the overlay measurement accuracy improving method according to a third invention, in the overlay measurement accuracy improvement method according to the second invention, the compensating step may be performed by averaging the correction lots. A reciprocal of a scaling error of 1 is used as the first correction value.

The overlay measurement accuracy improving method according to a fourth invention is the overlay measurement accuracy improvement method according to the first invention, wherein the second alignment mark formed on the second layer is used as a reference, and The method further includes a third layer exposure step of exposing the third layer by enhanced global alignment performed while removing a measurement value that does not fall within the range. Prior to performing the layer exposure step, in addition to obtaining the first correction value, a second scaling error generated from the second layer exposure step to the third layer exposure step is removed. A step of obtaining a second correction value for compensation.

According to a fifth aspect of the present invention, there is provided the overlay measurement accuracy improving method according to the fourth aspect, wherein the step of obtaining the second correction value includes the step of preparing a lot for correction. Performing the steps from the second layer exposure step to the step immediately before the third layer exposure step by using the correction lot, and subsequently, using the second alignment mark as a reference and entering the predetermined range. Detecting the second correction value through another third layer exposure step of performing exposure for forming a third layer by enhanced global alignment performed without removing a measurement value that has not been removed. A step of: exposing the second layer together with the first correction value in the exposure for forming the first layer.
Is used to compensate not only the error of the first scaling but also the error of the second scaling in advance by using the correction value of (1).

In the overlay measurement accuracy improving method according to a sixth invention, in the overlay measurement accuracy improvement method according to the fifth invention, the compensating step is performed by averaging the correction lots. Compensating the first and second scaling errors in advance using an average value of the reciprocal of the scaling error of 1 and the reciprocal of the second scaling error obtained by averaging between the lots for correction. It is characterized by doing.

[0036]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, a method of improving the overlay accuracy according to the first embodiment of the present invention will be described with reference to FIG. 3 for the purpose of collecting correction data
Two lots R1 to R3 are prepared. These lots R1
In R3, the layer A, which is the first layer, and the layer B, which is the second layer, are overlapped. First, in step ST1, film formation and exposure for forming the A layer are performed. This step ST1 is included in the concept of a first layer exposure step for exposing and forming a first layer with an alignment mark. Next, in step ST2, a process for releasing stress on the wafer on which the alignment mark has been formed, for example, an etching process is performed. Further, in step ST2, a process for generating a situation in which alignment mark measurement failure occurs, for example, a CMP process is performed. Next, in step ST3, the B layer is exposed without using the EGA reject function. This step ST3 is another second layer exposure step of performing exposure of the second layer by enhanced global alignment that is performed without removing a measured value that is not within a predetermined range with reference to the alignment mark of the first layer. Included in the concept. In order to superimpose the A layer and the B layer, an alignment mark formed on the A layer is measured during the exposure process of the B layer. From the measurement of the alignment marks, the amount of deviation is obtained by executing the EGA method as described in, for example, Japanese Patent Application Laid-Open No. 61-44429. At the same time, the error parameters A and O shown in Equation 2 are obtained at the same time. Then, X scaling and Y scaling are obtained from the linear expansion / contraction amounts Rx and Ry obtained for each of the lots R1 to R3. X scaling error is x
It is given by the difference between the measured value of the distance between two points in the direction and the design value.
It is given by the difference between the measured value of the distance between points and the design value. In step ST4, the average values SAX and SAY are obtained by averaging the scaling values of these three lots R1 to R3. The above process P1 is a process of obtaining the average value SAX of the error of X scaling and the average value SAY of the error of Y scaling for the purpose of collecting the correction data.

Next, an exposure process of the A layer is performed on the new lot R4 having the same type as the lots R1 to R3 (step ST5). At this time, the reciprocals (-SAX, -Say) of the average values SAX and SAY of the errors of the X scaling and the Y scaling are used as the correction values at the time of exposure. That is, the first scaling error generated by the release of the stress in step ST2 is compensated. This step ST5 is included in the concept of a first layer exposure step. For this new lot R4, in step ST2,
Steps similar to those of the lots R1 to R3, for example, an etching step and a CMP step are performed. Here, the etching step represents a step of performing a process of releasing stress on the wafer after the alignment mark is formed. In addition, the CMP process represents a process for generating a situation where a measurement failure of an alignment mark occurs. For lot R4 that has gone through such a process, B
The layer exposure process is performed (step ST6).
This step ST6 is a step of exposing the second layer to be superimposed on the first layer by enhanced global alignment which is performed with reference to the alignment mark of the first layer and removing a measurement value not falling within a predetermined range. It is included in the concept of a two-layer exposure process. At this time, for example, 0.1 μm is used as the limit value for the EGA reject function. In step ST5, since the correction is performed using the reciprocal of the average value of the errors of the X scaling and the Y scaling, it is possible to remove the data that is actually erroneously measured.

Embodiment 2 Next, a method of improving overlay accuracy according to Embodiment 2 of the present invention will be described with reference to FIG. The overlay accuracy improving method according to the second embodiment relates to a case where three layers (A layer, B layer, and C layer) are involved. In the overlay accuracy improving method of the second embodiment, three lots R1 to R3
Is used to obtain the average values SAX and SAY of the errors of the X scaling and the Y scaling through steps ST1 to ST4 in the same manner as in the first embodiment.

After the exposure of the B layer is completed, the average values SAX, SAY of the errors of X scaling and Y scaling are obtained.
Is obtained, a step S2 corresponding to the step ST2 is performed.
T7 is executed. That is, also in step ST7, a process in which stress is released on the upper surface of the wafer on which the alignment mark is formed, for example, an etching process is performed. Further, in step ST7, a process for generating a situation in which an alignment mark measurement failure occurs, for example, a CMP process is performed. Based on the alignment mark of the B layer that has gone through such a process,
An EGA method is performed, such as obtaining a shift amount during exposure of the third layer C layer (step ST8). Of course, also in step ST8, the EGA reject function is not used. This step ST8 is included in the concept of another third layer exposure step. And step S
In the same manner as in T4, the average values SBX and SBY of the errors of X scaling and Y scaling are obtained for the C layer (step ST9).

Next, the exposure process of the A layer is performed on the new lot R4 having the same type as the lots R1 to R3. At this time, the average values SAX, SAY of the errors of the first X scaling and the first Y scaling and the average values SBX, of the errors of the second X scaling and the second Y scaling obtained in steps ST4 and ST9. S
The reciprocal of the average value of BY (− (SAX + SBX) / 2, −
(SAY + SBY) / 2) is used as a correction value at the time of exposure (step ST10). That is, the first and second scaling errors are compensated for using the correction values related to the first and second scaling errors. This step ST10 is included in the concept of a first layer exposure step. For this new lot R4, in step ST2,
Steps similar to those of the lots R1 to R3, for example, an etching step and a CMP step are performed. Here, the etching step represents a step of performing a process of releasing stress on the wafer after the alignment mark is formed. Further, the CMP process is a process for generating a situation in which a measurement failure of the alignment mark occurs. The exposure process of the B layer is performed on the lot R4 that has gone through such a process (step ST11). This step ST11 is included in the concept of a second layer exposure step. At this time, as a limit value for the EGA reject function, for example, 0.1 + 0.1 × (SAX−SBX) / 2
Use μm. Here, the correction value 0.1 × (SAX−SBX) / 2 used to correct the limit value is the average value (SAX−SAX) in the exposure process of the A layer in step ST10.
+ SBX) / 2 is a correction value for considering a scaling error remaining in the exposure step of the B layer (step ST11). Actually, (SBX-SA
X) or (SBY-SAY) having the larger value is used. In step ST10, the reciprocal of the average value of the errors of the X scaling and the Y scaling (-SAX-SBX) /
Since the correction is performed using 2, (SAY-SBY) / 2, it is possible to remove data that is actually erroneously measured using the EGA reject function.

Step ST7 is performed on the lot R4.
Then, a process for releasing the stress on the upper surface of the wafer on which the alignment mark is formed, for example, an etching process is performed. Further, a step of generating a situation where a measurement failure of the alignment mark occurs, for example, a CMP step is performed. An EGA method is performed, such as obtaining a shift amount during exposure of the C layer, based on the alignment mark of the B layer that has gone through such a process (step ST12). This step ST12 corresponds to the second
This is included in the concept of a third layer exposure step of exposing the third layer by enhanced global alignment performed with reference to the alignment mark of the layer and removing a measurement value not falling within a predetermined range. At this time, the limit value for the EGA reject function is 0.1 μm
+ (SBX-SAX) / 20 is used. Here, the correction value used to correct the limit value is 0.1 × (SAX-S
BX) / 2 is a correction value for taking into account the residual scaling value generated in the exposure step of the C layer (Step ST12) that occurs because the average value (SAX + SBX) / 2 is used in the exposure step of the A layer in Step ST10. It is. Actually, (SBX-SAX) and (SBY-SA
The larger value of Y) is used. Step ST10
, The reciprocal of the average value of the errors of X scaling and Y scaling (-SBX-SAX) / 2, (SBY-SA
Since the correction is performed using Y) / 2, it is possible to remove data that is actually erroneously measured using the EGA reject function.

In the first and second embodiments, the case where the overlay accuracy improving method is applied to the stepper has been described. However, the overlay improving method according to the first and second embodiments is based on a step-and-repeat method other than the stepper. It goes without saying that the present invention can be applied to an exposure apparatus. Embodiment 2
In the above, the case of three layers has been described. However, even in the case of four or more layers, the scaling error can be compensated in the first layer exposure step by using the average value of the scaling error suffered by each layer. The same effect as in the second mode is achieved. Further, in the second embodiment, the average of the first and second X-scaling and Y-scaling errors is used for compensation in the first layer, but weighting may be performed as necessary.

[0043]

As described above, according to the overlay measurement accuracy improving method of the first aspect, in the first layer exposure step, the first method for compensating the first scaling error obtained in advance. Is compensated by using the correction value of the above, there is an effect that the measurement value can be appropriately removed by removing the measurement value in the enhanced global alignment in the second layer exposure step, and the overlay measurement accuracy can be improved.

According to the overlay measurement accuracy improving method of the present invention, since the correction lot is used and the first correction value is detected without removing the measurement value in another second layer exposure step, There is an effect that the first correction value for compensating for the error of the first scaling can be easily obtained without lowering the accuracy of the enhanced global alignment for the correction lot.

According to the overlay measurement accuracy improving method of the third aspect, since the reciprocal of the error of the first scaling is used, there is an effect that the error of the first scaling can be appropriately compensated.

According to the overlay measurement accuracy improving method of the present invention, in the first layer exposure step, the first and second scaling errors for compensating the first and second scaling errors obtained in advance. Since the compensation is performed using the correction value, appropriate removal can be performed by removing the measurement value in the enhanced global alignment in the second layer exposure step and the third layer exposure step, and the overlay measurement accuracy can be improved. .

According to the overlay measurement accuracy improving method of the fifth aspect, the second correction value is detected without removing the measurement value in another third layer exposure step using the correction lot. There is an effect that the second correction value for compensating for the error of the second scaling can be easily obtained without lowering the accuracy of the enhanced global alignment for the correction lot.

According to the overlay measurement accuracy improving method of the present invention, since the average value of the reciprocal of the first scaling error and the reciprocal of the second scaling error is used, the first and second scaling errors are used. There is an effect that the error of can be appropriately compensated.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating a method for improving overlay measurement accuracy according to the first embodiment;

FIG. 2 is a flowchart illustrating a method for improving overlay measurement accuracy according to a second embodiment;

FIG. 3 is a plan view showing a positional relationship between detection centers of an alignment system.

FIG. 4 is a flowchart showing an overall operation procedure using a conventional alignment method.

FIG. 5 is a plan view of a wafer that is subjected to alignment and exposure using a conventional stepper.

FIG. 6 is a plan view of a wafer showing positions of chips to be step-aligned.

FIG. 7 is a graph showing data obtained by the EGA method for each correction coefficient.

8 is a plan view showing the shot position of FIG. 7 on a wafer.

FIG. 9 is a graph showing a relationship between an etching process, a CMP process, and an EGA measurement result.

[Explanation of symbols]

ST1, ST5, ST10 First layer exposure step, ST
2 First stress release step and first measurement failure inducing step, ST3 Other second layer exposure step, ST6, ST1
1. Second layer exposure step, ST7 Second stress release step and second measurement failure inducing step, ST8 Other third layer exposure step, ST12 Third layer exposure step.

Claims (6)

[Claims] A first layer exposure step of performing exposure for forming a first layer with a first alignment mark; and a measurement value based on the first alignment mark and not within a predetermined range. A second exposure for forming a second layer to be superimposed on the first layer is performed by the enhanced global alignment performed while removing the second layer.
A layer exposing step, and a first layer exposing step which is performed in a step from the first layer exposing step to the second layer exposing step before the first layer exposing step and the second layer exposing step are actually performed. Obtaining a first correction value for compensating for a scaling error of the first layer, wherein the first layer exposure step comprises: using the first correction value in advance in the exposure for forming the first layer. A method for improving overlay measurement accuracy, comprising a step of compensating for the first scaling error. 2. The step of obtaining the first correction value includes the steps of: preparing a lot for correction; and using the lot for correction, from the first layer exposure step to immediately before the second layer exposure step. Up to the process of
Subsequently, another second layer exposure step of performing exposure for forming a second layer by enhanced global alignment performed without removing a measurement value that does not fall within the predetermined range with reference to the first alignment mark. Detecting the first correction value through the method. 3. The method according to claim 1, further comprising: 3. The method according to claim 2, wherein in the compensating step, a reciprocal of the first scaling error obtained by averaging the correction lots is used as the first correction value. 2. The overlay measurement accuracy improving method according to 2. 4. A third step of exposing the third layer by enhanced global alignment performed with reference to a second alignment mark formed on the second layer and removing a measurement value not falling within a predetermined range. The method further comprises a layer exposure step, wherein the compensating step includes obtaining the first correction value before the third layer exposure step is actually performed from the first layer exposure step. 2. The method according to claim 1, further comprising a step of obtaining a second correction value for compensating for a second scaling error occurring from a second layer exposure step to the third layer exposure step. 3. Method for improving overlay measurement accuracy. 5. The step of obtaining the second correction value includes the steps of: preparing a lot for correction; and using the lot for correction, from the second layer exposure step to immediately before the third layer exposure step. Up to the process of
Subsequently, another third layer exposure step of performing exposure for forming a third layer by enhanced global alignment based on the second alignment mark and without removing a measured value that does not fall within the predetermined range. And a step of detecting the second correction value via: wherein the compensating step comprises: using the second correction value together with the first correction value in the exposure for forming the first layer, 5. The method according to claim 4, wherein not only the error of the first scaling but also the error of the second scaling is compensated in advance. 6. The step of compensating comprises: a reciprocal of the first scaling error obtained by averaging the correction lots; and the second scaling error obtained by averaging the correction lots. 6. The overlay measurement accuracy improving method according to claim 5, wherein the first and second scaling errors are compensated in advance using an average value of the reciprocal of the scaling error.