JP2000163142A - Voltage signal conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of error output in input voltage 0 V by giving reference voltage to input voltage in the former stage of a buffer and always applying the voltage of not less than a prescribed value to the buffer. SOLUTION: The dividing voltage point P3 of dividing voltage resistors Rc and Rd is connected to one end of a dividing voltage resistor Rb and a reference voltage part 2 is constituted. Reference voltage Vb is given to each end of the dividing voltage resistors Ra and Rb and input voltage Vin is converted in the former stage of a buffer 3. Even at the time of input voltage Vin=0 V, the conversion voltage Va of an input side in the buffer 3 becomes Va=0+Vb with reference voltage Vb. Since a 0 V signal is previously converted into the reference voltage Vb of the dividing voltage point P3 in the former stage of the buffer 3, 0 V is not applied to the buffer 3 and a voltage error owing to the application of voltage around 0 V does not occur. The output voltage Vout of the buffer 3 is not affected by the error.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage signal conversion circuit for converting an input voltage which changes from 0V to aV to bV to cV and supplying the same to a drive unit for opening and closing a valve or the like.

[0002]

2. Description of the Related Art FIG. 3 shows an outline of an apparatus configuration using a voltage signal conversion circuit of this type. Reference numeral 101 denotes a controller, and 102 receives a signal from the controller 101 and is provided in the middle of a pipe 103. A drive unit that opens and closes the valve (valve) 104.

FIG. 4 is a block diagram showing the configuration of the drive unit 102. The voltage signal conversion circuit 105 converts and outputs a voltage or current input signal from the controller 101 as a predetermined voltage signal, and this voltage signal conversion circuit. The motor control unit 106 receives an output voltage from the motor control unit 105, and the motor unit 107 performs valve opening / closing control based on a control signal from the motor control unit.

FIG. 5 shows the above-mentioned voltage signal conversion circuit.
1 is a buffer connected to one of the input signal supply terminals O1 and O2 O1, 113 is a voltage dividing resistor 114 connected in series between the constant voltage supply terminal + E and the other input signal supply terminal O2,
A reference voltage section 115 includes a voltage dividing resistor 114,
Buffers 117 and 118 connected to the voltage dividing point P1 of 115, that is, the output terminal of the reference voltage unit 113, and voltage dividing resistors 119 and 119 connected in series between the output terminals of the buffers 111 and 116.
Is a buffer connected between the voltage dividing points P2 of the voltage dividing resistors 117 and 118.

Next, the operation will be described. When an input voltage Vin varying from 0V to aV is supplied as an input signal to the input signal supply terminals O1 and O2 from the controller 101, a buffer 111 using an operational amplifier or a transistor is provided.
The output voltage having passed therethrough is compared with the output voltage of the buffer 116 via the voltage dividing resistors 117 and 118, and the divided voltage is converted by the buffer 119 and output to the motor control unit 106. The motor control unit 106 drives the motor unit 107 based on the output voltage Vout of the buffer 119 to open and close the valve.

[0006]

Since the conventional voltage signal conversion circuit is configured as described above, the buffer 111
The buffer 119 is a voltage obtained by dividing the output voltage of the buffer 116 and the output voltage of the buffer 116 obtained by converting the output of the reference voltage unit 113.
Is operated, the buffer 119 has an input voltage of 0 V
Since the voltage of + αV remains in the element structure at the time of
An error occurs in the converted output voltage Vout, and the driving unit cannot be operated accurately.

For example, resistance 117: resistance 118 = 2:
8, when the reference voltage is 10V. When the input voltage is 0 V, the output voltage is 10-8 (10-
α) / 10 = 2 + 8α / 10V. When the input voltage is 5V, the output voltage is 10-8 (10-
5) / 10 = 6V When the input voltage is 10 V, the output voltage is 10-8 (10-
10) / 10 = 10V. That is, even if it is desired to convert the 0-10V input to 2-10V, the output will be 2 + 8α / 10V-10V.

As a countermeasure, it is necessary to use an expensive buffer that guarantees a value very close to 0, or to use a dual power supply circuit and output the buffer up to 0V. For this reason, there is a problem that an error near 0 V is allowed, the cost is increased, or the configuration is complicated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem. By performing signal conversion at a stage preceding the buffer, the buffer always applies a voltage equal to or higher than a predetermined value, and outputs an error output at an input voltage of 0 V. The purpose is not to cause it.

[0010]

A voltage signal conversion circuit according to the present invention converts input voltages varying from 0V to aV from bV to cV.
In a voltage signal conversion circuit for converting an output voltage to V, a voltage input section for inputting the input voltage, a plurality of voltage dividing resistors for dividing an output voltage from the voltage input section, and adding to the output voltage The circuit comprises a reference voltage section for outputting a reference voltage, and a buffer connected to a voltage dividing point of the voltage dividing resistor.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a circuit configuration diagram showing a voltage signal conversion circuit according to Embodiment 1 of the present invention. In the figure,
Reference numeral 1 denotes a voltage input unit composed of input signal supply terminals O1 and O2, Ra and Rb denote voltage dividing resistors connected in series between the input signal supply terminals O1 and O2, and Rc and Rd denote input signal supply terminals O
A reference voltage unit 2 is formed by connecting a voltage dividing point P3 of the voltage dividing resistors Rc and Rd and one end of the voltage dividing resistor Rb with a voltage dividing resistor connected in series between the voltage dividing resistors R1 and O2. 3 is a voltage dividing resistor R
This is a buffer connected to the partial pressure point P4 of a and Rb.

Next, the operation will be described. Voltage dividing resistor R
a, Rb to one end of the buffer 3
Since the input voltage Vin is converted in the preceding stage, even when the input voltage Vin = 0V, the converted voltage Va on the input side of the buffer becomes Va = 0 + Vb by the reference voltage Vb.

As described above, 0 is already set before the buffer 3.
Since the V signal is changed to the reference voltage Vb at the voltage dividing point P3, the 0V voltage is not applied to the buffer 3,
No voltage error occurs due to the application of a voltage near 0 V, and the output voltage Vout of the buffer 3 is not affected by the error.

For example, when the reference voltage Vb is 2 V, the input voltage Vin changes between 0 V and 10 V, and the conversion voltage is 2 V to 1 V.
When it is desired to set the voltage to 0 V, the ratio of the voltage dividing resistors Ra and Rb is set to 2: 8. When the input voltage Vin is 0 V: the output voltage is 2 + 0 × Rb / (Ra + Rb) = 2 V When the input voltage Vin is 2 V: the output Voltage is 2 + 2 × Rb / (Ra + Rb) = 3.6V When input voltage Vin is 5V: Output voltage is 2 + 5 × Rb / (Ra + Rb) = 6V When input voltage Vin is 10V: Output voltage is 2 + 10 × Rb / (Ra + Rb) ) = 10 V, and the output voltage of the buffer 3 can be obtained with high accuracy without error. Note that the above description is based on an input voltage of 0 V to 10 V.
Although the case where V is converted to 2V to 10V is shown, the input voltage 0V to 5V is converted to 1V to 5V, or the input voltage is 0V to 5V.
Conversion of 10 V to 1 V to 10 V can be similarly performed.

Embodiment 2 FIG. 2 is a circuit configuration diagram showing an embodiment when an input signal is a current. In the circuit configuration of FIG. 1, a resistor Re is connected between the input signal supply terminals O1 and O2.
If the resistance value is Re≫Ra + Rb, for example, a current signal Iin of 0 to 20 mA is connected to the resistor Re.
= 500Ω, Vc = Re × I at the resistance Re
and the current signal Iin of 0 to 20 mA is established.
Is converted to a voltage Vc = 0 to 10V. After that, the input voltage is converted to 2 to 10 V under the same conditions as in the first embodiment shown in FIG.

[0016]

As described above, according to the present invention, the reference voltage is applied to the input voltage in the previous stage of the buffer, and the voltage is always applied to the buffer at a certain level or more. Even when the voltage is 0 V, a voltage near 0 V is not applied to the buffer, so that an error does not occur in a buffer in which an error occurs due to the application of a voltage near 0 V due to the element structure. For this reason, there is no error in the output voltage Vout of the buffer, and with this output voltage, it is possible to obtain an effect that the motor that controls the opening and closing of the valve can be operated accurately.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram showing a voltage signal conversion circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit configuration diagram showing a voltage signal conversion circuit according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram of a device configuration using a signal conversion circuit.

FIG. 4 is a block diagram illustrating a configuration of a driving unit.

FIG. 5 is a circuit configuration diagram showing a conventional voltage signal conversion circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Voltage input part 2 Reference voltage part 3 Buffer Ra, Rb, Rc, Rd Dividing resistance Re resistance Vin Input voltage Vout Output voltage Va Conversion voltage Vb Reference voltage

Claims (1)

[Claims] An input voltage which changes from 0V to aV is set to bV to
In a voltage signal conversion circuit that converts the voltage to cV and outputs the converted voltage,
A voltage input unit for inputting the input voltage, a plurality of voltage dividing resistors for dividing an output voltage from the voltage input unit, a reference voltage unit for outputting a reference voltage to be added to the output voltage, A voltage signal conversion circuit comprising: a buffer connected to a voltage dividing point.