JP2000158699A - Print drive integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress uneven printing attributed to the parasitic capacitance of a driving transistor by setting the impedance of an NMOS transistor constituting an inverter at a high value thereby suppressing fluctuation of output current from a constant current circuit when the driving transistor is switched. SOLUTION: Impedance of NMOS transistors constituting inverters 3-1, ..., 3-n are set at a high value. Consequently, fluctuation of output current from an operational amplifier 5 can be suppressed when PMOS transistors 1-1,..., 1-n are switched and uneven printing attributed to the parasitic capacitance of the PMOS transistors 1-1,..., 1-n can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a print driving integrated circuit for improving print density.

[0002]

2. Description of the Related Art FIG. 1 is a circuit block diagram showing a main part of a general print drive integrated circuit.

In FIG. 1, P-type MOS transistors (1-1) to (1-n) are drive transistors, a source (input electrode) is connected to a power supply Vdd, and a drain (output electrode) is an output terminal (2). -1) to (2-n) are connected to n LEDs (not shown). P-type MOS
The transistors (1-1) to (1-n) cause one of the n LEDs to emit light according to the voltage applied to the gate (control electrode). Inverters (3-1) to (3-
n) is composed of a series body of a P-type MOS transistor and an N-type MOS transistor, and the inverters (3-1) to (3-
n), the sources of the P-type MOS transistors are commonly connected to the power supply Vdd ', and the inverters (3-1) to (3)
-N) a P-type MOS transistor and an N-type MO
The drain connection point of the S transistor is connected to the gates of the P-type MOS transistors (1-1) to (1-n).

A P-type MOS transistor (4), an operational amplifier (5) and a current detection resistor (6) constitute a constant current circuit. The gate of the P-type MOS transistor (4) is connected to the output terminal of the operational amplifier (5), the source is connected to the power supply Vdd, and the drain is grounded via the current detection resistor (6). The reference voltage Vref is applied to the-(inverting input) terminal of the operational amplifier (5), and the + (non-inverting input) terminal is connected to the non-ground side of the current detection resistor (6). The output terminal of the operational amplifier (5) serving as the output of the constant current circuit is commonly connected to the sources of the N-type MOS transistors forming the inverters (3-1) to (3-n). The constant current circuit is
It detects the voltage across the current detection resistor (6) that fluctuates according to the ON state of the P-type MOS transistor (4), and holds the output voltage of the operational amplifier (5) at a constant value. Therefore, the inverters (3-1) to (3-n)
The source voltage of the type MOS transistor can be held at a constant value, in other words, the P-type transistor when the N-type MOS transistors forming the inverters (3-1) to (3-n) are turned on.
The gate voltages of the OS transistors (1-1) to (1-n) can be set to a constant value, whereby the n LEDs can be driven at a constant current.

The shift register (7) is composed of n bits, and print data for turning on or off the n LEDs (for example, a logical value "1" indicates lighting, and a logical value "0" indicates turning off. Are sequentially shifted in synchronization with the shift clock SCLK. Latch circuit (8)
Is a latch clock which is composed of n bits corresponding to the shift register (7) and generates n-bit data held in the shift register (7) when the shift register (7) completes n shift operations. Batch latch is performed in synchronization with LCLK. AND gate (9-1)-
(9-n) denotes P-type MOS transistors (1-1) to
(1-n) corresponds one-to-one, and one input terminal is LED
The strobe signal STB having the logical value "1" is supplied at the timing when the light is emitted, and the other input terminal is connected to the n-bit output terminal of the latch circuit (8).

As described above, while the strobe signal STB is set to the logical value "1", the P-type MOS transistors (1-1) to which the print data have the logical value "1" are output.
The LED connected to (1-n) is turned on, and the P-type MOS transistor (1-
The LEDs connected to 1) to (1-n) are turned off. Then, dot printing is performed with the lighting of the selected LED, and as a result, a character display, a graphic display, and the like intended by the user are obtained.

[0007]

FIG. 4 shows a driving P-type M.
FIG. 3 is a circuit diagram illustrating a connection portion between an OS transistor and an inverter. FIG. 4 shows one dot, and representative numbers (1) and (3) are given to the driving P-type MOS transistor and the inverter, respectively.

In the P-type MOS transistor (1), a dashed parasitic capacitance (10) is formed between the source region and the gate region due to the device structure on the semiconductor substrate. That is, when the N-type MOS transistor forming the inverter (3) is turned on, the time constant is determined by the parasitic capacitance (10) of the P-type MOS transistor (1) and the on-resistance of the N-type MOS transistor forming the inverter (3). Is formed. Therefore,
When printing is performed with n P-type MOS transistors (1) turned on, the output of the operational amplifier (5) is compared with the case where printing is performed with one P-type MOS transistor (1) turned on. The load on the terminal side is n times the parasitic capacitance (10) (a state in which n parasitic capacitances (10) are connected in parallel), that is, the time constant on the output terminal side of the operational amplifier (5) is n times.

In a general print drive integrated circuit, the setting of the output current of the operational amplifier (5) is prioritized, and the impedance of the N-type MOS transistor constituting the inverter (3) is set small. However, based on this setting, P
When the type MOS transistor (1) is switched,
Due to the low impedance of the N-type MOS transistor, the output current change of the operational amplifier (5) becomes large. That is, when one or n P-type MOS transistors (1) are turned on, the time constant on the output terminal side of the operational amplifier (5) is equal to one output current change width and n times the output current change width. The difference appears, and since one output current change width of the reference operational amplifier (5) is large, the time constant difference is promoted to be large.

Therefore, as shown in FIG. 5, one P-type MO
Operational amplifier (5) when S transistor (1) is turned on
The output voltage waveform (solid line) rises sharply. On the other hand, n
When the P-type MOS transistors (1) are turned on, the output voltage waveform (dot-dash line) of the operational amplifier (5) rises slowly. That is, both output voltage waveforms rise with a difference of time T2. The print density is determined by the ratio between the area enclosed by the solid line and the area enclosed by the dashed line. Therefore, in the related art, there is a problem in that the print density becomes remarkable because the area difference is large.

When the driving capability of the operational amplifier (5) is increased,
Both of the rising edges of the output voltage waveform become steeper, the difference in time T2 is reduced, and the variation in print density is suppressed. However, there has been a problem that overshoot and undershoot occur due to an increase in output current change of the operational amplifier (5), and the operational amplifier (5) generates noise. Further, there is a problem that current consumption of the operational amplifier (5) increases.

[0012]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has a plurality of drive transistors for outputting a drive signal for performing printing on a print head; A plurality of inverters that control the on and off of each of the drive transistors, and a constant current circuit that drives the plurality of drive transistors in an on state with a constant current in common, in a print drive integrated circuit integrated on a single semiconductor substrate, The impedance of the constituent elements of the plurality of inverters for turning on the plurality of drive transistors is increased.

In addition to the above features, the difference between the time constant of the drive signal when one drive transistor is turned on and the time constant of the drive signal when all drive transistors are turned on is small. The impedance of the constituent elements of the plurality of inverters is increased.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be specifically described with reference to the drawings.

FIG. 2 is a pattern diagram of a MOS transistor. G indicates a gate region, D indicates a drain region, and S indicates a source region.

In the embodiment of the present invention, the impedance when the n-type MOS transistors constituting the n inverters (3) are turned on is set to be larger than in the conventional case.
For example, the gate length L forming the gate region G of the N-type MOS transistor may be longer than in the conventional case.

Thus, the operational amplifier (5) for switching each of the n P-type MOS transistors (1)
Output current change width becomes smaller. That is, when one or n P-type MOS transistors (1) are turned on, the time constant on the output terminal side of the operational amplifier (5) is the difference between one output current change width and n times the output current change width. The difference in time constant appears as a difference, and the output current change width of one of the reference operational amplifiers (5) becomes small, so that the time constant difference becomes small.

Therefore, as shown in FIG. 3, one P-type MO
Operational amplifier (5) when S transistor (1) is turned on
The output voltage waveform (solid line) gradually rises. Similarly, the output voltage waveform (dashed line) of the operational amplifier (5) when the n P-type MOS transistors (1) are turned on rises slowly. That is, both output voltage waveforms correspond to time T1 (<
Stand up with a difference of time T2). The print density is determined by the ratio between the area enclosed by the solid line and the area enclosed by the dashed line. Accordingly, since the area difference between the solid line area and the one-dot chain line area is reduced, it is possible to prevent variations in print density.

Therefore, it is not necessary to increase the driving capability of the operational amplifier (5), and the problem that the operational amplifier (5) generates noise and the problem that the current consumption of the operational amplifier (5) increases can be solved.

Under the same generation conditions of the strobe signal STB, the solid line area in FIG. 3 is smaller than the solid line area in FIG. 5, and the print density is lower than in the conventional case. However, this point can be solved by increasing the generation period of the strobe signal STB.

[0021]

According to the present invention, the impedance of the N-type MOS transistor constituting the inverter is set large. Accordingly, the output current variation width of the constant current circuit at the time of switching the drive transistor can be reduced, and there is an advantage that uneven printing due to the parasitic capacitance of the drive transistor can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing a general print drive integrated circuit.

FIG. 2 is a pattern diagram showing a MOS transistor.

FIG. 3 is a characteristic diagram showing printing characteristics of the present invention.

FIG. 4 is a main part circuit diagram showing a driving transistor and an inverter of FIG. 1;

FIG. 5 is a characteristic diagram showing a conventional printing characteristic.

[Explanation of symbols]

 (1-1) to (1-n) P-type MOS transistor (3-1) to (3-n) Inverter (4) P-type MOS transistor (5) Operational amplifier

Claims (2)

[Claims] A plurality of drive transistors for outputting a drive signal for performing printing on a print head; a plurality of inverters for controlling on / off of each of the plurality of drive transistors; and a plurality of on-state drive transistors. In a print drive integrated circuit in which a constant current circuit that drives a common constant current is integrated on a single semiconductor substrate, the impedance of the constituent elements of the plurality of inverters for turning on the plurality of drive transistors is increased. A print driving integrated circuit characterized by the following. 2. The plurality of inverters so that a difference between a time constant of a drive signal when one drive transistor is turned on and a time constant of a drive signal when all drive transistors are turned on is small. 2. The print driving integrated circuit according to claim 1, wherein the impedance of the constituent elements is increased.