JP2000152486A - Current differential relay device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To get a current differential delay device which can transmit the digital data of sixteen bits even if it is twelve bits at the opposite end. SOLUTION: A current value where higher harmonies are removed with an analog filter 1 is converted from analog to digital with an A/D converter 2, and the data equivalent to DC components included in the sixteen-bit data obtained hereby is cut by a DC cut processor 3. The sixteen-bit digital data outputted from this DC cut processor 3 is converted into twelve-bit data by a twelve-bit making processor 4, and these data made into twelve bits are sent to the opposite end by a transmitter 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current differential relay device, and more particularly, to a device capable of converting instantaneous value information of current from, for example, 16-bit data to 12-bit data and transmitting the converted data.

[0002]

2. Description of the Related Art A current differential relay is used to protect a transmission line in a power system from a short circuit accident, a ground fault accident, and the like. Whether or not an accident has occurred is detected based on whether or not a tap value (a threshold value as a minimum operation value of the current differential relay device) has been exceeded.

FIG. 11 shows a transmission data matching method for transmitting a current detected in such a power system and matching transmission data to be transmitted when the current differential relay is driven. Is a reprint of "Standard Concept of System Protection Relay System (Digital Edition)", March 1992, pp124 2-1-26, Manager of Protection Control Section, Engineering Dept., Federation of Electric Power Companies of Japan.

In the figure, 101A, 102A, 103
A and 101B, 102B, 103B are reference phases a, 3b of three-phase transmission lines 100a, 100b, 100c, respectively.
Current transfer (hereinafter referred to as CT) for reducing the current obtained in the reference phases a, b, c at the A terminal and the B terminal respectively at the A terminal and the B terminal of the terminals b and c;
1A, 102A, 103A and 101B, 102B,
An input processing unit that processes the output of the
1A, 102A, 103A and 101B, 102B,
The output of 103B is input-converted and further reduced, filtered, sampled / held, and multiplexed. 105A and 105B are input processing units 10
A / D converters for A / D converting the outputs of 4A and 104B; 106A and 106B are transmission control units for controlling the transmission of the outputs of A / D converters 105A and 105B;
7A and 107B are transmission control units 106A and 106B.
Own-end data transmission unit for transmitting the output of B to the transport terminal, 10
8A and 108B are transport terminals for transmitting and receiving the outputs of the own end data transmission units 107A and 107B to and from the other party,
109A and 109B are transport terminals 108A and 10B.
8B receives the output of the other end by using the other end data receiving unit 110A and 110B.
A reception control unit that performs reception control on the outputs of 9A and 109B, and 111A and 111B are A / D conversion units 105A
And the difference between the output of the reception control unit 110A and A
This is a current differential relay device that detects the presence or absence of a short circuit accident or the like by detecting a difference between the output of the / D conversion unit 105B and the output of the reception control unit 110B.

Next, the operation will be described. Currents transmitted through the three-phase power transmission lines 100a, 100b, and 100c are supplied to CT terminals 101A, 102A, and 103A at terminals A and B provided at points separated from each other.
And 101B, 102B, and 103B are converted into currents of smaller values, and input processing units 104A and
4B. Input processing units 104A and 104B
Are CT101A, 102A, 103A and 101
The currents output from B, 102B, and 103B are converted into currents of smaller values, filtered, sampled / held, and multiplexed. A / D converters 105A and 105B A / D convert the outputs of input processing units 104A and 104B, and transmission controllers 106A and 106B perform transmission control to transmit the A / D converted current data. The own-end data transmission units 107A and 107B
The outputs of A and 106B are transmitted to the transport terminal. The transport terminals 108A and 108B transmit their own current data to the partner transport terminals 108B and 108A and receive the current data transmitted from the partner transport terminals 108B and 108A.

The other end data receiving sections 109A and 109
B receives data from the other party by the transport terminals 108A and 108B, and the reception controllers 110A and 110B perform reception control on the outputs of the other party data receivers 109A and 109B, and output the current differential relays 111A and 111B.
Numeral 11B denotes a receiving end data receiving unit 109 for which the receiving control is performed
The difference between the opposite-end data output from A and the own-end data output from the A / D converter 105A is compared for each of the reference phases a, b, and c, and the other-end data receiving unit 109B that has been subjected to reception control Output of the opposite end and A
The difference between the self-end data output from the / D conversion unit 105B is compared for each of the reference phases a, b, and c. If the difference is 0 or less than the tap value, an accident such as a short circuit or ground fault occurs. If the difference exceeds the tap value, it is determined that an accident has occurred, the protection means (not shown) is notified of the fact, and power transmission is stopped to protect the transmission line.

FIG. 12 shows a data transmission format of such a current differential relay device. FIG. 12 shows the above-mentioned “Standard Concept of System Protection Relay System (Digital Edition)” pp119 2-1. This is a reprint of Figure -24-a. In the figure, SF is a superframe composed of 12 frames, S is frame synchronization information used for frame synchronization, F is 12 frames constituting the superframe SF, and DA, DB, and DC are phases a, a, respectively. The data of group A, group B, and group C indicating the instantaneous value information of the currents b and c, each of which is composed of a fixed bit FB and a 12-bit data body. OI is ON-OFF information, FB is a fixed bit, CCI is voltage phase comparison information used when performing step-out separation between systems, and AI is ON-state information of each phase of LS and CB.
Device information, which is OFF information, and CI is ON for relay device status
Control information, which is OFF information; TI, transfer interruption information, which is information that can be transferred between signal terminals; SPI, when transmitting a test result of information by a signal terminal to a relay determination unit of a current differential relay device. SP synchronization failure information used for
I is data failure information used when transmitting a test result of information by the signal terminal to the relay determination unit, and SAF is information for identifying a frame number. Further, SC is sub-commit information, FB is a fixed bit, and SPS is sampling synchronization information. Further, the CRC is a CRC (Cyc) for testing a code error in one frame in the transmission system.
lic Redundancy Check) information.

In the transmission system shown in FIG. 11, data is transmitted at a transfer rate of 54 kbps in the case of a 50 Hz system using the transmission format shown in FIG. At 54 kbps, it is necessary to sample the current every 30 ° from the processing of the relay, and to transmit this as one frame, 90 bits are required, and the information per cycle (super frame) is 12 times that of the superframe. This is 1080 bits, which is obtained by further multiplying this by 50 (50 Hz). As can be seen from this transmission format, the instantaneous current values of the reference phases a, b, and c are transmitted to the other party in 12 bits.

FIG. 2 is a block diagram showing a data transmission procedure of the conventional current differential relay. In the figure, reference numeral 1 denotes an analog filter for removing harmonic components contained in the current value of each terminal of the power system. This corresponds to a filter provided at the subsequent stage of the input conversion unit included in the input processing units 104A and 104B in FIG. Reference numeral 2 'denotes A which converts the analog current value output from the analog filter 1 into digital data and has 12-bit conversion accuracy.
A / D converter, which is an A / D converter 105A, 1 in FIG.
05B. Reference numeral 5 'denotes a transmission unit for transmitting the digital data output from the A / D converter 2', which corresponds to the transmission function of the own-end data transmission units 107A and 107B in FIG.

Next, the operation will be described. A current transfer (CT), not shown, takes in the current value of each terminal of the power system, reduces the value, and further converts the input to reduce the current value. Then, unnecessary harmonic components are removed by the analog filter 1, and the A / D converter 2 'samples this analog data at a constant period and converts it into 12-bit digital data. At this time, it is necessary to identify the polarity of +/− in the AC amount of the current of the system. Of the 12 bits, the most significant bit is the sign bit, and the remaining 11 bits represent the magnitude of the current value. The converted 12-bit data is transmitted to the transmitting unit 5 '.
Are transmitted to the partner terminal with the same bit length.

[0011]

Since the data transmission procedure of the conventional current differential relay device is configured as described above, 12-bit digital data is transmitted with the same bit length. Although the accuracy of the relay device has been improved and the resolution of the A / D converter has been increased to 16 bits, the number of bits that can be transmitted remains at 12 bits, and a device that can cope with such mismatch is required. .

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a current differential relay capable of transmitting digital data even when a partner terminal has 12 bits. With the goal.

[0013]

According to a first aspect of the present invention, there is provided a current differential relay device which receives a current of each terminal of a power system and compares the current with the current data of a partner terminal via a transmission line. In the power transfer device, an A / D converter for converting analog current value data of a power system into digital data of a first predetermined length, and data included in the A / D converted by the A / D converter are included. A DC cut processing unit for removing data corresponding to a DC component, and converting the DC cut data from the first predetermined length bit data to a second predetermined length bit data shorter than the DC cut data by the DC cut processing unit. And digitizing the first predetermined length bit data so that the minimum operation value (hereinafter referred to as a tap value) of the current differential relay device in the first predetermined length bit data becomes a predetermined value digit after conversion. Perform positive, in which as comprises a bit processing unit for deleting the lower bits, and a transmitter for transmitting data has become the second predetermined length by the bit processing unit to the other terminal.

According to a second aspect of the present invention, in the current differential relay device of the first aspect, the bit processing section deletes the digit correction and lower bits. Instead of the processing, the first predetermined length bit data output by the DC cut processing unit is directly converted to the second predetermined length bit data so that the tap value of the first predetermined length bit data becomes the tap value of the second predetermined length bit data. A process of converting the data into bit data of a predetermined length is performed.

According to a third aspect of the present invention, in the current differential relay device according to the first aspect, the bit processing section deletes the digit correction and lower bits. Instead of the process, the tap value converted to the primary side of the power system is used as a reference value, and the first step is performed so that the digit of the predetermined value becomes the first value by using the step-down ratio for stepping down the current on the primary side of the power system. The processing of correcting the predetermined-length bit data and deleting the lower-order bits is performed.

According to a fourth aspect of the present invention, in the current differential relay device according to the first aspect, the bit processing section deletes the digit correction and lower bits. Instead of the processing, the tap value converted to the primary side of the power system is used as a reference value, and a step-down ratio for stepping down the current on the primary side of the power system is used. The conversion is directly performed to the second predetermined length bit data so that the tap value converted to the side becomes the tap value in the second predetermined length bit data.

According to a fifth aspect of the present invention, in the current differential relay device of the first aspect, the bit processing section deletes the digit correction and lower bits. Instead of the process, a process of determining a bit position to be truncated according to the magnitude of the tap value and deleting a corresponding bit is performed.

According to a sixth aspect of the present invention, in the current differential relay device of the first aspect, the bit processing section deletes the digit correction and lower bits. Instead of the process, when the magnitude of the tap value is sufficiently large, a process of deleting lower bits is performed.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. In FIG.
Reference numeral 1 denotes an analog filter (low-pass filter) that removes a harmonic component included in the current value of each terminal of the power system, and is provided at a stage subsequent to the input conversion unit included in the input processing units 104A and 104B in FIG. This is equivalent to a filter to be used. Reference numeral 2 denotes an A / D converter for performing A / D conversion of a current value from which harmonics have been removed by the analog filter 1 and having 16-bit conversion accuracy, and corresponds to the A / D conversion units 105A and 105B in FIG. Things. Reference numeral 3 denotes a DC cut processing unit for cutting data corresponding to a DC component included in the output data of the A / D converter 2, and 4 denotes a 12-bit digital data output from the DC cut processing unit 3. The DC cut processing unit 3 and the 12-bit processing unit 4 can be realized by a programmable control device such as a microcomputer. Reference numeral 5 denotes a transmission unit for transmitting the data converted to 12 bits by the 12-bit conversion processing unit 4 to the partner terminal, and corresponds to the transmission function of the local end data transmission units 107A and 107B in FIG.

FIG. 3 shows a waveform X (t) after A / D conversion and DC
FIG. 9 is a diagram showing a waveform Y (t) after a cutting process. FIG. 4 is a diagram showing bit data at each stage of the process of FIG.

Next, the operation will be described. A current transfer CT (not shown) takes in the current value of each terminal of the power system, reduces the value, and further converts the input to reduce the current value. And
Unnecessary harmonic components are removed by an analog filter 1, and the A / D converter 2 samples the analog data at a constant period and converts it into 16-bit digital data. At this time, it is necessary to identify the polarity of +/− in the AC amount of the current of the system. Of the 16 bits, the most significant bit is the sign bit, and the remaining 15 bits represent the magnitude of the current value.

FIG. 3A is a diagram showing a waveform after A / D conversion. For example, a full scale value for performing A / D conversion is 16
In the case of 3.84A, if 16-bit A / D conversion is performed on this, the weight per digit (Least Signif
icant Bit (hereinafter referred to as LSB) is obtained by subtracting the sign bit from 16 bits and expressing the size of the waveform with the remaining 15 bits, so that the full scale value may be divided by 2 ¹⁵ .

LSB = 163.84 A / 2 ¹⁵ = 0.005 A Therefore, if the tap value is 0.5 A,
The number of digits at the tap value is 0.5A / 0.005A
= 100 digits.

The output of the A / D converter 2 is shown in FIG.
4B, the data corresponding to the DC component is removed from the data of X (t) by the DC cut processing unit 3 in FIG. 1 and the 16-bit data X (t) shown in FIG. Y (t). At this time, since the full scale value in FIG. 3A is a value considering that the DC component is superimposed by 100%, the waveform Y after the DC cut processing is performed.
Even if (t) is maximum, it is output at half the full scale value as shown in FIG. 3 (b).

By performing this DC cut processing, the second bit from the upper bit of the Y (t) data shown in FIG. 4B becomes invalid. The 12-bit conversion processing unit 4 shown in FIG.
As shown in (c), the number of digits of Y (t) is corrected to 1
After conversion into 6-bit data Z '(t), the lower 4 bits are deleted and the 12-bit data Z shown in FIG.
(T) is output.

The correction of the number of digits is such that 2 ⁴ = 16 digits are discarded when the lower 4 bits are deleted, and the data after the 12-bit conversion processing is performed in a 40-digit value corresponding to the tap value of the conventional device. It is performed in consideration of securing.

That is, 16 digits × 4 in tap value
The number of digits is corrected by the following equation 1 so that 0 digits = 640 digits.

Z ′ (t) = (Y (t) × LSB / tap value) × 640 digits = (Y (t) × 0.005 A / tap value) × 640 digits (1) Next, the Z ′ By deleting the lower 4 bits of (t), this 12-bit conversion processing is completed.

As a result, the 16-bit data can be converted into 12-bit data in which the number of digits corresponding to the conventional device is secured in the tap value, and the transmitting unit 5 in FIG. 1 transmits the 12-bit data to the partner terminal. I do.

As described above, according to the current differential relay device of the first embodiment, the harmonic component contained in the current value of each terminal of the power system is removed by the analog filter, and the harmonic component is removed by the analog filter. Is 1
A / D conversion by 6-bit precision A / D converter, DC
The cut processing unit cuts data corresponding to the DC component included in the output data of the A / D converter, and the 12-bit conversion unit converts the 16-bit digital data output from the DC cut processing unit into a 12-bit digital data. Since the data is converted to data and the transmission unit transmits the 12-bit data to the partner terminal, the data is output from the current differential relay having an A / D converter with improved conversion accuracy. The 16-bit data can be converted in advance into 12-bit data required in the transmission procedure in the device and output, and there is an effect that the actually transmittable 12-bit data can be transmitted to the other party.

Embodiment 2 In the second embodiment, the processing executed in the 12-bit conversion processing unit of the first embodiment can be simplified. Embodiment 2
Has a block configuration similar to that of the first embodiment, and in the first embodiment,
Although the lower 4 bits are deleted after the digit correction is once performed by the 12-bit conversion processing unit 4, the 12-bit conversion processing unit 4 in the second embodiment, as shown in FIG. The digit correction is performed by the following equation 2 so that the tap value after the conversion to 12 bits immediately becomes 40 digits.

Z ′ (t) = (Y (t) × LSB / tap value) × 40 digits = (Y (t) × 0.005 A / tap value) × 40 digits (2) Thus, 16-bit data However, since the data is directly converted into 12-bit data, the process of cutting out 4 bits does not need to be performed, and simplification of the process can be realized.

As described above, according to the current differential relay device of the second embodiment, the harmonic component contained in the current value of each terminal of the power system is removed by the analog filter, and the harmonic component is removed by the analog filter. Is 1
A / D conversion by 6-bit precision A / D converter, DC
The cut processing unit cuts data corresponding to the DC component included in the output data of the A / D converter, and the 12-bit conversion unit converts the 16-bit digital data output from the DC cut processing unit into a 12-bit digital data. When the data is converted to data and the 12-bit data is transmitted to the partner terminal by the transmission unit, the 16-bit digital data is directly converted to 12-bit digital data in the 12-bit processing unit. 16-bit data output from a current differential relay device having an improved A / D converter can be converted in advance into 12-bit data that can be handled by a partner device in the device, and can be output. The converted 12-bit processing has the effect of transmitting the actually transmittable 12-bit data to the other party.

Embodiment 3 In the third embodiment, digit correction can be performed even in a system in which the CT ratio changes depending on the terminal. The current differential relay according to the third embodiment has the same block configuration as that of the first embodiment.
Although the case where the tap value is used as a variable in the digit correction of the bit conversion processing unit 4 has been described, the 12-bit conversion processing unit 4 according to the third embodiment has a CT ratio and a CT ratio as shown in FIG. Digit correction is performed by using the primary tap value as a variable according to the following equation 3, whereby digit correction can be performed even in a system in which the CT ratio changes depending on the terminal.

Z ′ (t) = (Y (t) × LSB × CT ratio / primary tap value) × 640 digits = (Y (t) × 0.005A × CT ratio / primary tap value) × 640 digits (3) Here, the primary tap value is the transmission line 10 in FIG.
0a, 100b, 100c side, that is, CT101A,
If the value exceeds this value on the system side before passing through 101B or the input conversion, it is a tap value that is considered to have caused an accident. The CT ratio is the ratio of the current value between the input and output of the CT 101A, 101B. Next tap value and C
Each of the T ratios is a predetermined value (set value).

In this way, after the digit correction is performed once, the 12-bit conversion processing unit 4 as shown in FIG.
The lower 4 bits are deleted to output 12-bit data Z (t).

As described above, according to the current differential relay device of the third embodiment, the harmonic component included in the current value of each terminal of the power system is removed by the analog filter, and the harmonic component is removed by the analog filter. Is 1
A / D conversion by 6-bit precision A / D converter, DC
The cut processing unit cuts data corresponding to the DC component included in the output data of the A / D converter, and the 12-bit conversion unit converts the 16-bit digital data output from the DC cut processing unit into a 12-bit digital data. When the data is converted to data and the transmission unit transmits the 12-bit data to the partner terminal, the 12-bit conversion unit performs digit correction using the CT ratio and the primary tap value as variables, so that the conversion accuracy is improved. It is possible to convert the 16-bit data output from the current differential relay device having the A / D converter with the improved A / D converter into 12-bit data that can be supported by the partner device in the device in advance and output the converted data. 12-bit data that can be actually transmitted can be transmitted to the other party, and digit correction can be realized even in a system where the CT ratio varies depending on the terminal. There is.

Embodiment 4 FIG. In the fourth embodiment, the processing executed by the 12-bit processing unit in the third embodiment can be simplified. The current differential relay device according to the fourth embodiment has the same block configuration as that of the third embodiment, and furthermore, the first embodiment. In the third embodiment, the 12-bit conversion processing unit 4 , The case where the lower 4 bits are deleted after digit correction has been described.
As shown in FIG. 7C, the 2-bit conversion processing unit 4 performs digit correction according to the following equation 4 so that the tap value becomes 40 digits. Since the data is directly converted to 12-bit data, there is no need to perform the cutting process on the lower 4 bits.

Z ′ (t) = (Y (t) × LSB × CT ratio / primary tap value) × 40 digits = (Y (t) × 0.005A × CT ratio / primary tap value) × 40 digits (4) As described above, according to the current differential relay device of the fourth embodiment, the harmonic component included in the current value of each terminal of the power system is removed by the analog filter, and the harmonic is removed by the analog filter. The current value from which the wave has been removed is A / D converted by an A / D converter with 16-bit accuracy, and a DC cut processing unit cuts data corresponding to a DC component included in output data of the A / D converter. Then, the 16-bit digital data output from the DC cut processing unit is converted into 12-bit digital data by the 12-bit conversion processing unit,
When transmitting the data converted to 12 bits by the 12-bit conversion unit to the partner terminal, the transmission unit uses the CT ratio and the primary tap value as variables in the 12-bit conversion unit.
Since the bit digital data is directly converted to the 12-bit digital data to perform the digit correction, the 16-bit data output from the current differential relay device having the A / D converter with improved conversion accuracy can be used. It is possible to convert in advance in the apparatus to 12-bit data that can be handled by the partner device and output the data, and to transmit 12-bit data that can be actually transmitted to the partner device, even if the CT ratio varies depending on the terminal. There is an effect that digit correction can be realized by the simplified 12-bit processing.

Embodiment 5 In the fifth embodiment, a bit position to be rounded down is determined according to the magnitude of a tap value. The current differential relay device according to the fifth embodiment has the same block configuration as that of the third embodiment, and hence the first embodiment. In the third embodiment, the 12-bit conversion processing unit 4 , The case where lower 4 bits are deleted after digit correction has been described.
Determines the bit position to be rounded down according to the magnitude of the tap value, as shown in FIGS. 8C and 9C. For example, when the tap value is 0.5 A (= 100 digits), Upper 2 bits and lower 2 bits are deleted, and when the tap value is 1.0 A (= 200 digits), upper 1 bit and lower 3 bits are deleted.

As a result, 16-bit data is directly transferred to 12
It can be converted to bit data, and the 12-bit processing unit can be simplified.

For the bits to be deleted, the number of lower bits to be discarded may be increased as the tap value increases, and a plurality of tap values are set in advance in the 12-bit conversion processing unit 4, The tap values to be used can be determined by comparing the tap values to be used and determining in advance the bit position and the number of bits to be discarded depending on which tap value is applicable.

As described above, according to the current differential relay device of the fifth embodiment, the harmonic component contained in the current value of each terminal of the power system is removed by the analog filter, and the harmonic component is removed by the analog filter. Is 1
A / D conversion by 6-bit precision A / D converter, DC
The cut processing unit cuts data corresponding to the DC component included in the output data of the A / D converter, and the 12-bit conversion unit converts the 16-bit digital data output from the DC cut processing unit into a 12-bit digital data. When the data is converted to data and the transmitting unit transmits the 12-bit data to the partner terminal, the 12-bit processing unit determines the position of the bit to be rounded down according to the tap value, thereby improving the conversion accuracy. 16-bit data output from a current differential relay device having an A / D converter, which has been converted, can be converted into 12-bit data that can be handled by a partner device in the device in advance and output. There is an effect that the transmittable 12-bit data can be transmitted to the other party, and digit correction can be realized by simplified processing.

Embodiment 6 FIG. In the fifth embodiment, the bits to be discarded are determined according to the magnitude of the tap value. However, when the magnitude of the tap value is sufficiently large, only the process of deleting the lower 4 bits is performed. Is also good.

The current differential relay according to the sixth embodiment has the same block configuration as that of the fifth embodiment, and hence the first embodiment.
The 12-bit conversion processing unit 4 determines the bits to be rounded down according to the size of the tap value.
As shown in FIG. 10C, the 12-bit conversion processing unit 4 in
Only the process of deleting the lower 4 bits is performed. As a result, 16-bit data can be directly converted to 12-bit data, and the 12-bit processing unit can be further simplified.

For the sufficiently large tap value, a tap value considered to be sufficiently large is set in the 12-bit conversion processing section 4 in advance, and this is compared with the actually used tap value to determine the actually used tap value. Can be determined by determining whether or not exceeds the set value.

As described above, according to the current differential relay device of the sixth embodiment, the harmonic component contained in the current value of each terminal of the power system is removed by the analog filter, and the harmonic component is removed by the analog filter. Is 1
A / D conversion by 6-bit precision A / D converter, DC
The cut processing unit cuts data corresponding to the DC component included in the output data of the A / D converter, and the 12-bit conversion unit converts the 16-bit digital data output from the DC cut processing unit into a 12-bit digital data. When the data is converted to data and the transmission unit transmits the 12-bit data to the partner terminal, the lower 4 bits are truncated when the tap value is large in the 12-bit processing unit. 16-bit data output from a current differential relay device having an improved A / D converter can be converted in advance into 12-bit data that can be supported by a partner device in the device and output. Thus, there is an effect that digit correction can be realized with simplified processing by transmitting 12-bit data that can be transmitted to the other party.

In the first to sixth embodiments, 16
Although the bit data is converted to 12-bit data, the bit data may be converted to data having a shorter bit length, but may be converted to other bit lengths. Play.

In the first to sixth embodiments, 1
Tap values of 6-bit data are 100, 200, 4
Although the case where the tap value in the 00 and 12-bit data is 40 has been described, a value other than these may be used, and the same effects as those of the above-described embodiments can be obtained.

[0050]

As described above, according to the current differential relay device of the first aspect of the present invention, the current of each terminal of the power system is taken in and compared with the current data of the other terminal via the transmission line. An A / D converter for converting analog current value data of a power system into digital data of a first predetermined length bit, and an A / D converter provided by the A / D converter.
A DC cut processing unit for removing data corresponding to a DC component included in the D-converted data; and a data cut by the DC cut processing unit from the first predetermined length bit data to a second shorter data. When converting the data into the predetermined length bit data, the first predetermined value is set so that the minimum operation value (hereinafter referred to as a tap value) of the current differential relay device in the first predetermined length bit data becomes a predetermined value digit after the conversion. Since a bit processing unit that performs digit correction on long bit data and deletes lower bits and a transmission unit that transmits data having a second predetermined length to the partner terminal by the bit processing unit are provided, Even if the bit length of the data that can be received at the terminal is shorter than the bit length output by the A / D converter of the current differential relay device, the bit length can be reduced to match this, There is an effect that can be sent in a compatible bit length of data that can be received data by hand terminal.

According to the current differential relay device of the second aspect of the present invention, in the current differential relay device of the first aspect, the bit processing section performs the digit correction and the lower-order bit processing. Instead of the process of deleting, the first predetermined length bit data output by the DC cut processing unit is directly converted to the first predetermined length bit data so that the tap value of the first predetermined length bit data becomes the tap value of the second predetermined length bit data. 2 is converted to the predetermined length bit data.
Even if the bit length of the data that can be received at the partner terminal is shorter than the bit length output by the A / D converter of the current differential relay, the bit length can be shortened to match this, and the simplified processing Thus, there is an effect that data having a bit length suitable for data that can be received by a partner terminal can be transmitted.

Further, according to the current differential relay device according to the third aspect of the present invention, in the current differential relay device according to the first aspect, the bit processing unit performs the digit correction and the lower bit. Instead of the process to delete, 1
Using the tap value converted to the next side as the reference value,
Since the first predetermined length bit data is corrected to have the above-mentioned predetermined value and the lower bit is deleted by using the step-down ratio for stepping down the current on the next side, the opposite terminal is used. Even if the bit length of the receivable data is shorter than the bit length output by the A / D converter of the current differential relay device, the bit length can be reduced to match this, and the primary side current reduction ratio can be reduced. Even if the other terminal changes, the data can be transmitted with the data having a bit length suitable for the data that can be received by the other terminal.

Further, according to the current differential relay device according to the invention of claim 4 of the present application, in the current differential relay device according to claim 1, the bit processing section performs the digit correction and the lower bit. Instead of the process to delete, 1
Using the tap value converted to the next side as the reference value,
By using a step-down ratio that steps down the current on the secondary side, the first
Since the tap value converted to the primary side in the predetermined-length bit data is directly converted into the second predetermined-length bit data so that the tap value in the second predetermined-length bit data is converted, the partner terminal is processed. Even if the bit length of the data that can be received by the A / D converter of this current differential relay device is shorter than the bit length, the bit length can be reduced to match this, and the primary side current can be gradually reduced. Even in the case of the partner terminal whose ratio changes, there is an effect that the simplified processing allows the data to be transmitted with the bit length data adapted to the data that can be received by the partner terminal.

Further, according to the current differential relay device of the present invention, in the current differential relay device according to the first aspect, the bit processing unit performs the digit correction and the lower bit. Instead of the process of deleting, the bit position to be discarded is determined according to the size of the tap value and the process of deleting the corresponding bit is performed. A of electrical equipment
Even when the bit length is shorter than the bit length output from the / D converter, the bit length can be shortened so as to match the bit length, and the simplified processing allows the data to be transmitted with the bit length suitable for the data that can be received by the partner terminal. There is.

Further, according to the current differential relay device of claim 6 of the present application, in the current differential relay device according to claim 1, the bit processing section performs the digit correction and the lower bit. Instead of the deletion process, when the tap value is sufficiently large, the process of deleting the lower bit is performed. Therefore, the bit length of the data that can be received by the partner terminal is equal to the A of the current differential relay device. Even if the bit length is shorter than the bit length output from the / D converter, the bit length can be shortened to match this, and the data can be converted into data having a bit length suitable for the data that can be received by the partner terminal by simplified processing. effective.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a transmission procedure of a current differential relay device according to Embodiment 1 of the present invention.

FIG. 2 is a configuration diagram showing a transmission procedure of a conventional current differential relay device.

FIG. 3 is a diagram showing a waveform after A / D conversion and a waveform after DC cut processing of the current differential relay device according to Embodiment 1 of the present invention.

FIG. 4 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 1 of the present invention.

FIG. 5 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 2 of the present invention.

FIG. 6 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 3 of the present invention.

FIG. 7 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 4 of the present invention.

FIG. 8 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 5 of the present invention.

FIG. 9 is a diagram showing bit data of a 12-bit conversion process of the current differential relay device according to Embodiment 5 of the present invention.

FIG. 10 is a diagram showing bit data in a 12-bit conversion process of a current differential relay device according to Embodiment 6 of the present invention.

FIG. 11 is a diagram showing a transmission data matching method applied to the current differential relay device.

FIG. 12 is a diagram illustrating a data transmission format of the current differential relay device.

[Explanation of symbols]

1 analog filter, 2 A / D converter, 3 DC cut processing unit, 4 12 bit conversion processing unit, 5 transmission unit.

Claims (6)

[Claims] 1. A current differential relay device for taking in the current of each terminal of a power system and comparing it with current data of a partner terminal via a transmission line, wherein the analog current value data of the power system is converted into a first predetermined length bit. An A / D converter for converting to digital data, a DC cut processing unit for removing data corresponding to a DC component included in data A / D converted by the A / D converter, and a DC cut processing unit Is converted from the first predetermined length bit data to the second predetermined length bit data shorter than the first predetermined length bit data, the minimum operation value of the current differential relay (hereinafter referred to as the first predetermined length bit data) , A tap value) is digit-corrected to the first predetermined-length bit data so that the digit has a predetermined value after conversion.
A current differential relay device comprising: a bit processing unit that deletes lower bits; and a transmission unit that transmits data having a second predetermined length to a partner terminal by the bit processing unit. 2. The current differential relay device according to claim 1, wherein the bit processing unit sets the tap value in the first predetermined-length bit data to the second predetermined value instead of the digit correction and the process of deleting lower-order bits. A process of directly converting the first predetermined-length bit data output by the DC cut processing unit into the second predetermined-length bit data so that the tap value of the second predetermined length bit data becomes a tap value. Motion relay device. 3. The current differential relay device according to claim 1, wherein the bit processing unit replaces the digit correction and the process of deleting lower-order bits with a tap value converted to a primary side of a power system. By using a step-down ratio for stepping down the current on the primary side of the power system as the reference value, the first predetermined-length bit data is corrected to have the above-mentioned predetermined value, and a process of deleting lower-order bits is performed. A current differential relay device, characterized in that: 4. The current differential relay device according to claim 1, wherein the bit processing unit substitutes a tap value converted to a primary side of a power system, instead of the digit correction and the process of deleting lower bits. By using, as the reference value, the tap value converted to the primary side in the first predetermined length bit data, the tap value in the second predetermined length bit data is obtained by using the step-down ratio for stepping down the current on the primary side of the power system. A current differential relay device for directly converting the data into second predetermined-length bit data so that 5. The current differential relay device according to claim 1, wherein the bit processing unit replaces the digit correction and the process of deleting lower bits with a bit position to be rounded down according to a magnitude of a tap value. A current differential relay device that performs a process of determining and deleting a corresponding bit. 6. The current differential relay device according to claim 1, wherein the bit processing unit replaces the digit correction and the process of deleting the lower-order bit when the magnitude of the tap value is sufficiently large. A current differential relay device for performing a process of deleting a bit.