JP2000150801A - Semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the apparent ESD(electrostatic discharge) breakdown voltage of a semiconductor integrated circuit device even when an ESD protective diode is broken by automatically switching the diode to a circuit having an ESD protective function. SOLUTION: When either one of ESD protective diodes 24 and 25 is broken by electrostatic noise, etc., a diode switching circuit 3 interrupts the leakage current flowing through the broken diode by automatically disconnecting either one of transistors 13 and 17 and uses the parasitic diode of the cut-off diode as an ESD protective diode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for improving the withstand voltage of electrostatic discharge, and more particularly to a technique which is effective when applied to a high performance electrostatic discharge protection circuit.

[0002]

2. Description of the Related Art According to studies by the present inventors, a resistor is inserted between an external terminal such as an I / O pin provided in a semiconductor device and an input / output circuit serving as an internal circuit, a PN diode, a resistor, and the like. An ESD protection circuit composed of a combination of a PN diode or a combination of a resistor and a MOS transistor is provided. This ESD protection circuit absorbs overvoltage and prevents damage to semiconductor devices due to electrostatic discharge. are doing.

Examples of this type of semiconductor device are described in detail on November 30, 1984, published by Ohm Co., Ltd., edited by The Institute of Electronics and Communication Engineers (ed.)
There is “LSI Handbook” P679, which describes the configuration of a protection circuit that absorbs overvoltage and protects the device from electrostatic breakdown.

[0004]

However, it has been found by the present inventor that the above-described configuration of the electrostatic discharge protection circuit for a semiconductor device has the following problems.

[0005] That is, the diode of the electrostatic discharge protection circuit connected to the I / O pin generates an electrostatic discharge (ESD: El).
If the semiconductor device is destroyed by electrostatic discharge, the function of protection against electrostatic breakdown cannot be obtained, and there is a problem that the ESD withstand voltage of the semiconductor device is greatly reduced.

If a short circuit occurs when the diode is destroyed, unnecessary current flows through a semiconductor device of a logic circuit of the semiconductor device, and the semiconductor device itself may be destroyed.

It is an object of the present invention to provide a semiconductor device capable of automatically switching to a circuit having an ESD protection function and improving an apparent ESD withstand voltage even if an ESD protection diode is destroyed. It is in.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0009]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, a semiconductor integrated circuit device according to the present invention comprises an electrostatic discharge protection element for preventing the destruction of a semiconductor device due to static electricity, and an electrostatic discharge protection element for shutting off a leak current flowing when the electrostatic discharge protection element is short-circuited. A current interruption protection element for performing discharge protection, a leakage current detection section for detecting a leakage current flowing when the electrostatic discharge protection element is short-circuited, and operating the current interruption protection element when the leakage current detection section detects a leakage current And a current cut-off protection control unit for outputting an operation control signal to be operated.

Further, in the semiconductor integrated circuit device according to the present invention, the current cutoff protection element may be a MOS (Metal Oxid).
eSemiconductor) transistor.

Further, according to the semiconductor integrated circuit device of the present invention,
The leak current detection unit includes a current mirror transistor supplied with a current from a current source that generates a reference current, and forms a current mirror circuit with the current mirror transistor and the current cutoff protection element. The leak current is detected based on the voltage level at the current supply unit of the transistor.

As described above, even if the electrostatic discharge protection element is destroyed due to static noise or the like, it is detected that the electrostatic discharge protection element has been destroyed due to current leakage.
Since the leakage current can be cut off by the current cutoff protection element and the electrostatic breakdown of the semiconductor device can be prevented,
The reliability of the semiconductor integrated circuit device can be greatly improved.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a circuit diagram of an electrostatic discharge protection circuit provided in a semiconductor device according to an embodiment of the present invention.

In this embodiment, a semiconductor integrated circuit device is provided with an electrostatic discharge protection circuit 1. The electrostatic discharge protection circuit 1 is connected to external terminals such as I / O pins. The electrostatic breakdown protection circuit 1 absorbs the overvoltage,
The semiconductor device is prevented from being damaged by electrostatic discharge (ESD).

The electrostatic breakdown protection circuit 1 includes a current source unit 2 serving as a constant current source and a diode switching unit 3 for switching a diode for electrostatic breakdown protection.

For example, when the I / O pin is an input terminal, an input buffer 4 is connected to a stage subsequent to the electrostatic discharge protection circuit 1. The input buffer 4 temporarily stores data input from the I / O pin when transferring the data to a logic circuit or the like. Here, when the I / O pin is an output terminal, an output buffer is connected to the subsequent stage of the electrostatic discharge protection circuit 1.

The current source unit 2 of the electrostatic breakdown protection circuit 1 includes N-channel MOS transistors 5 to 7 and a P-channel M
It is composed of transistors 8, 9, 32 made of OS.

Further, the diode switching section 3 of the electrostatic breakdown protection circuit 1 includes P-channel MOS transistors 10 to 10.
13. N-channel MOS transistors 14-1
7, 33, inverters 18 to 21, edge trigger flip-flops 22 and 23, diodes (electrostatic discharge protection elements) 24 and 25, and a resistor 26.

Further, the input buffer 4 includes a P-channel M
OS transistors 27-29, N-channel MOS
Transistors 30 and 31 and transistor 2
An inverter is constituted by 8, 30 and transistors 29, 31.

A power supply voltage V _cc is supplied to one connection portion and a gate of the transistor 5, and a reference potential V _SS is connected to the other connection portion. Transistor 5
Are connected to the gates of the transistors 6 and 7.

At the other connection of the transistors 6 and 7,
The reference potential V _SS is connected, and one connection of the transistor 6 is connected to the other connection of the transistor 8.

At one connection of the transistor 6,
The gates of the transistors 8, 9, 32 are also connected.
The power supply voltage V _cc is supplied to one connecting portion of the transistors 8 and 9, and the inverter 20 of the diode switching portion 3 and the transistor (leakage current detecting portion) 14 are connected to the other connecting portion of the transistor 9. Are connected.

The power supply voltage V _cc is supplied to one connection of the transistor 32, and one connection of the transistor 15 in the diode switching section 3 is connected to the other connection.

Further, one connecting portion of the transistor 7 is connected to the other connecting portion of the transistor (leakage current detecting portion) 10 and the latch pulse input portion RP of the flip-flop 22. The power supply voltage V _cc is supplied to one connection portion of the transistor 10, and the gate of the transistor 10 is connected to the other connection portion of the transistor 11, one connection portion of the transistor 12, and the transistor (current cutoff protection element). Thirteen gates are connected.

The data input D of the flip-flop 22 is supplied with the power supply voltage V _CC , and the data output Q of the flip-flop 22 is connected to the input of the inverter 18.

The output of the inverter 18 is connected to the input of the inverter 19 and the gate of the transistor 11, and one connection of the transistor 11 is supplied with the power supply voltage V _CC .

The output of the inverter 19 is connected to the gate of the transistor 12, and the other connection of the transistor 12 is connected to the other connection of the transistor 13, one connection of the transistor 33, and the diode 25.
Are connected.

A power supply voltage V _CC is supplied to one connection of the transistor 13. The other connection of the transistor 33 is connected to the reference potential V _SS, and the gate is connected to one connection of the transistor 5.

The anode of the diode 25 is connected to the cathode of the diode 24, one connection of the resistor 26, and an I / O pin as an external input terminal. One connection of the transistor 15 and the transistor (current cutoff protection element) 17 is connected to the anode of the diode 24, and the reference potential V _SS is connected to the other connection of the transistor 17.

The other connection of the transistor 15 is connected to the gates of the transistors 14 and 17 and one connection of the transistor 16. Transistors 14, 16
Is connected to the reference potential V _SS .

The output of the inverter 21 is connected to the gate of the transistor 15, and the data output Q of the flip-flop 23 is connected to the gate of the transistor 16. The data output section Q of the flip-flop 23 is also connected to the input section of the inverter 21.

The power supply voltage V _CC is supplied to the data input section D of the flip-flop 23, and the output section of the inverter 20 is connected to the latch pulse input section RP. Further, a reset signal output at the time of turning on power or the like is input to the reset terminals RT of the flip-flops 22 and 23.

The buffer 4 is connected to the other connection of the resistor 26.
The other connection part of the transistor 27, the transistor 2
The input section of the inverter constituted by 8 and 30 is connected. The power supply voltage V _CC is supplied to one connection portion of the transistor 27, and the reference potential V _SS is connected to the gate.

The outputs of the inverter constituted by the transistors 28 and 30 are connected to the transistors 29 and 3 respectively.
1, and the output of the inverter formed by the transistors 29 and 31 is connected to an internal circuit such as a logic circuit.

The transistor 11 and the inverter 1
8, 19, the flip-flop 22, the transistors 15, 16, the inverters 20, 21, and the flip-flop 23 constitute a current cutoff protection controller DS.

Next, the operation of the present embodiment will be described.

First, a diode 24 for protecting against electrostatic discharge.
Is not broken, the reset is performed by turning on the power, the node N4 is at a low level (reference potential V _SS ), the node N5 is at a high level (power supply voltage V _CC ),
The transistor 16 is off and the transistor 15 is on.

Therefore, the same voltage is applied to the gate of the transistor 17 and the other connecting portion, a small current flows through the transistor 17, and the node N2
Is prevented from floating. The diode 24 is pulled up by the power supply voltage V _CC supplied from the transistor 27.

Node N which is the gate of transistor 17
The voltage of No. 2 is at a low level. Since the node N2 is also the gate of the transistor 14, the transistor 1
4 is OFF.

Since the transistor 14 is OFF, the node N1 is pulled up by the current supplied from the transistor 9 of the current source unit 2 and rises to the high level. The node N4 is at the low level and the node N5 is at the high level. It has become. In this state, the negative voltage ESD
When noise is applied, ESD noise is discharged via the diode 24 and the parasitic diode of the transistor 17.

Also, a diode 25 for protecting against electrostatic discharge is provided.
Is not destroyed, a low level is input to the latch pulse input unit RP of the flip-flop 22.
The data output unit q becomes a low-level output, and the node N6
Is at a high level, and the node N7 is at a low level.

Therefore, since the transistor 11 is turned off and the transistor 12 is turned on, the same potential is applied to the gate of the transistor 13 and the other connecting portion, and a small current flows through the transistors 13 and 33. When a positive voltage ESD noise is applied via the I / O pin, the ES noise via the diode 25 and the transistor 13
D noise is discharged.

The case where the diode 24 is destroyed by ESD noise or the like and becomes short-circuited will be described.

Since the transistor 17 has a current mirror connection with the transistor 14, a current flows to the reference potential V _SS via the diode 24 and the transistor 17 which are in a short-circuit state.

As described above, since the transistor 17 is a current mirror connection, a potential difference between the gate and the other connection, that is, a gate-source voltage Vgs is generated, and the transistor 17 is connected to the gate of the transistor 17. The same voltage (Vg) is also applied to the gate (node N2) of the transistor 14.
s) is applied, and the drain (one connection) current flowing through the transistor 14, that is, the current proportional to the leak current of the diode 24 becomes larger than the constant current flowing from the transistor 9 in the current source unit 2, the node N
1 drops to low level.

When the node N1 becomes low level,
The input of the latch pulse input unit RP of the flip-flop 23 goes high, the node N4 goes high and the node N5 goes low.

Therefore, the transistor 15 is turned off, the node N2 becomes low level, the transistor 17 is cut off, the current flowing through the diode 24 is cut off by the transistor 17, and the diode 24 is destroyed at the I / O pin. It returns to the previous input impedance and the function as the input pin is reproduced.

In this case, as described above, the transistor 1
7 is OFF, so the negative voltage ESD noise is
Discharge is carried out through the destroyed diode 24 through the parasitic diode of the transistor 17 or the source-drain (one connection-the other connection) of the transistor 17 itself.

Further, a case where the diode 25 is destroyed by ESD noise or the like and becomes short-circuited will be described.

Since the transistor 13 has a current mirror connection with the transistor 10, a current flows through the short-circuited diode 25 and the transistor 13.

Therefore, since the transistor 13 is a current mirror connection, a voltage Vgs is generated between the gate and the other connection portion, and the same is applied to the gate of the transistor 10 connected to the gate of the transistor 13 (node N9). A voltage (Vgs) is applied and a drain (one connection) current flowing through the transistor 10, that is, the diode 2
When the current proportional to the leak current of node 5 becomes larger than the constant current flowing through transistor 7 of current source section 2, node N8
Rises to a high level.

When the node N8 becomes high level,
The high level is also input to the latch pulse input unit RP of the flip-flop 22, and the node N6 goes low and the node N7 goes high.

Therefore, since the node N9 is at the high level, the transistor 13 is cut off, the current flowing through the diode 23 is cut off by the transistor 13, and the I / O pin is connected to the input impedance before the diode 23 is destroyed. Return to the function as an input pin.

In this case, as described above, the transistor 1
3 is OFF, the positive-voltage ESD noise applied to the I / O pin is transmitted through the destroyed diode 23 to the parasitic diode of the transistor 13 or the source-drain (one connection portion) of the transistor 13 itself. −
Discharge takes place through the other connection).

Thus, according to the present embodiment, diode switching section 3 detects a current leak flowing when diodes 24 and 25 are destroyed by electrostatic noise or the like, and forcibly cuts transistors 13 and 17. OFF
In addition, since the parasitic diodes of the transistors 13 and 17 are used as protection elements for electrostatic noise, an apparent level of anti-static noise can be increased, and the reliability of the semiconductor integrated circuit device can be improved.

As described above, the invention made by the inventor has been specifically described based on the embodiments of the invention. However, the invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above embodiment, the electrostatic breakdown protection circuit is constituted by the current source unit and the diode switching unit. However, as shown in FIG. 2, a plurality of electrostatic breakdown protection diodes D1 to Dn are provided. May be connected in series to constitute the electrostatic discharge protection circuit 1a.

Thus, even if the electrostatic discharge protection diode near the I / O pin is destroyed by electrostatic noise,
Protection from electrostatic noise is provided by other ESD protection diodes. Further, as the ESD protection diode, a diode having the same withstand voltage or a diode having higher withstand voltage characteristics as the distance from the I / O pin increases.

[0061]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, even if the electrostatic discharge protection element is destroyed by electrostatic noise or the like, it is detected that the electrostatic discharge protection element has been destroyed by current leakage, and the leakage current is detected by the current cutoff protection element. It is possible to prevent electrostatic breakdown of the semiconductor device while shutting off.

(2) In the present invention, the reliability of the semiconductor integrated circuit device can be improved by the above (1).

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an electrostatic discharge protection circuit provided in a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of an electrostatic discharge protection circuit provided in a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

1, 1a Electrostatic discharge protection circuit 2 Current source unit 3 Diode switching unit 4 Input buffer 5 to 9 Transistor 10 Transistor (leakage current detection unit) 11, 12 Transistor 13 Transistor (current interruption protection element) 14 Transistor (leakage current detection unit) ) 15, 16 transistor 17 transistor (current cutoff protection element) 18-21 inverter 22, 23 flip-flop 24, 25 diode (electrostatic discharge protection element) 26 resistor 32 transistor 27-32 transistor DS current cutoff protection control unit RP latch pulse input Section Q data output section RT reset terminal D1 to Dn diode V _CC power supply voltage V _SS reference potential

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H03K 19/003 F-term (Reference) 5F038 BH02 BH07 BH12 BH13 DF16 DT12 EZ20 5F048 AA02 AA07 AB03 AB04 AB05 AC10 CC01 CC06 CC09 CC12 CC15 CC16 CC18 5J032 AA02 AB01 AC18

Claims (3)

[Claims] An electrostatic discharge protection element for preventing destruction of the semiconductor device due to static electricity; and a current cutoff protection element for protecting the semiconductor device from electrostatic discharge while interrupting a leak current flowing when the electrostatic discharge protection element is short-circuited. A leakage current detection unit that detects a leakage current flowing when the electrostatic discharge protection element is short-circuited; and outputs an operation control signal for operating the current interruption protection element when the leakage current detection unit detects a leakage current. A semiconductor integrated circuit device comprising an electrostatic breakdown protection means including a current cutoff protection control unit. 2. The semiconductor integrated circuit device according to claim 1, wherein said current cutoff protection element comprises a MOS transistor. 3. The semiconductor integrated circuit device according to claim 2, wherein the leakage current detecting unit includes a current mirror transistor supplied with a current from a current source for generating a reference current, and the current mirror transistor and the current mirror transistor. A semiconductor integrated circuit device comprising: a current mirror circuit including a current cutoff protection element; and detecting a leak current based on a voltage level at a current supply unit of the current mirror transistor.