JP2000150479A - Method and device for plasma process - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress static damage to obtain for good electric contact by supplying hydrogen ion group in such state as the negative ion amount of hydrogen is more than the positive ion amount of it to a body to be processed for plasma processing with the inside surface of the groove of the body. SOLUTION: Hydrogen of a gas containing hydrogen atom is introduced into a plasma generating chamber 3 through a process gas introducing opening 4, and a current is allowed to flow a filament 2 so that low pressure arc discharge is caused. A bias means 14 applies a positive bias to an object W which is to be processed to increase the amount of negative ion (density) near the surface (a surface to be processed) of the object W. The low-release energy electron which occupies large part of energy distribution is pulled back to the surface to be processed while a high release energy electron is not pulled back. The electrified charge due to the high release energy electron is canceled with a negative ion. Thus, the damage to the body to be processed under electrification is prevented, for good surface process such as cleaning, and hydrogen termination, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus and a processing method for processing a surface of an object to be processed, and more particularly to a plasma processing apparatus and a processing method for performing surface processing on the surface of an object using ions. Belongs to the technical field. Further, in the present invention, in a wiring (electrode) forming step in a semiconductor manufacturing process, after the inside of a groove such as a contact hole or a surface to be processed made of a conductor is subjected to surface treatment using negative ions, the inside of the groove or the conductor is The present invention belongs to the technical field of a semiconductor device manufacturing method for depositing a conductor on a surface to be processed.

[0002]

2. Description of the Related Art In a conventional surface treatment such as plasma etching, positive ions are mainly used.

FIG. 18 shows a cross section of a conventionally used parallel plate type plasma processing apparatus. In FIG.
201 is a high-frequency power supply, 202 is a supporting means also serving as an electrode to which high-frequency power is applied, W is a semiconductor substrate, IS is an ion sheath, PM is plasma, 206 is a vacuum vessel, 205 is a grounded counter electrode, and 203 is a process gas. Inlet 2
04 indicates an exhaust port. In this device, the support means 2
When a high frequency is applied to 02, plasma PM is generated between it and a counter electrode provided in parallel with the substrate. At this time, an electron-deficient region called an ion sheath IS is generated between the plasma and the support means 202 and between the plasma and the vacuum vessel 206 due to a difference in mobility between ions and electrons in the plasma. On the other hand, the plasma has an average positive potential with respect to the electrode. In the supporting means 202 to which a high frequency is applied, the potential difference with respect to the plasma is larger than that of the counter electrode 205 which is grounded, and may be several hundred volts at the maximum.
Positive ions in the plasma are accelerated by such a potential of the sheath, and enter the substrate W with a certain energy. Using the positive ions, etching and cleaning of the substrate surface are performed. Heretofore, in the semiconductor manufacturing process, only positive ions have been used as described above, and negative ions have hardly been used. However, recently, attention has been paid to negative ions in a process plasma containing negative atoms, and several plasma processing methods using negative ions have been proposed.

For example, Japanese Patent Application Laid-Open No. 8-181125 describes a plasma etching process in which positive and negative ions are alternately irradiated on the surface of a substrate using oxygen afterglow plasma in order to prevent charging of the substrate. Have been.

Japanese Patent Application Laid-Open No. 9-82689 discloses that
2. Description of the Related Art There is a plasma processing apparatus that treats a substrate with neutral active particles without using charged particles such as ions. Similarly, Mizutani, T. and Nishimatsu, S., "Sputter
ing Yield and Radiation Damage by Neutral Beam Bom
bardment, "J. Vac. Sci. & Technol., Vol. A6, p141
7, (1988) also describes a plasma treatment with neutral particles.

Further, Japanese Patent Application Laid-Open No. 7-122539 describes a surface treatment method for etching silicon oxide by supplying an ion beam of negative ions of fluorine of 20 eV or less to silicon oxide to which hydrogen has been dissociated and adsorbed. I have.

[0007] In addition to the plasma etching, a plasma cleaning process is also applied to a semiconductor device manufacturing process. In a semiconductor device, when an impurity diffusion layer formed on the front surface side of a substrate and a metal wiring layer are connected via a contact hole provided in an insulating layer, the aspect ratio of the contact hole (depth / opening dimension). Is much more than one. Therefore, as a method of forming a metal film for wiring in a contact hole, a chemical vapor deposition (CVD) method has begun to be used as a method of embedding a contact hole even when the aspect ratio becomes 2 or more from a sputtering method. . Various studies have been made on embedding a metal in a fine contact hole by a CVD method using tungsten, aluminum, copper, gold and the like. Of these, for aluminum, thermal CV using DMAH (dimethyl aluminum hydride) and hydrogen
A high quality film quality and a high film formation rate have been achieved by the D method, and are attracting attention as a material for filling contact holes next to tungsten.

The aluminum wiring forming process by the CVD method is performed as follows. First, after forming a contact hole in the insulating film by dry etching, the entire surface of the base including the inside of the contact hole and the surface of the insulating film,
A base conductive film such as titanium nitride called a barrier metal is formed. Next, in order to remove contaminants on the surface of the barrier metal (for example, in the case of a titanium nitride barrier metal, titanium oxide), cleaning using plasma is performed.
Further, the substrate is transferred to the CVD chamber while being held in a vacuum,
An aluminum film is deposited using MAH and hydrogen.

Here, as plasma cleaning before depositing aluminum, a method of sputtering the barrier metal surface using an inert gas plasma such as argon or etching the barrier metal surface using a halogen gas plasma such as chlorine is used. (See JP-A-7-226387) and a method of reducing and removing a natural oxide film on the barrier metal surface using hydrogen plasma (see JP-A-8-298288).

[0010]

In the conventional treatment using positive ions, positive charges are accumulated on the surface of the object to be treated during the treatment, and the surface potential of the object is charged to a high positive potential. Even when the neutral particles are used, secondary electrons are similarly emitted due to the energy impact of the neutral particles incident on the object, so that the surface of the object is still positively charged. Even with the alternating irradiation of positive and negative ions, although the degree of charging is lighter than that of the treatment using only positive ions, the surface to be processed is still charged to a high positive potential since secondary electron emission due to the incidence of positive ions is not eliminated. Would.

In cleaning the surface of the conductor, taking into account the properties of a metal such as aluminum which is subsequently deposited and the properties of the underlying conductor, oxide negative ions cannot sufficiently remove oxides and halogen negative ions. Then
A new measure is required to prevent corrosion of the conductor due to residual halogen. Even if hydrogen is used, the conventional plasma processing is a processing mainly using positive ions of hydrogen, and thus causes the above-described charging problem.

In particular, when the surface to be processed has a groove (when the surface has irregularities due to an etching pattern or the like), irregularities in the shape of the groove and poor cleaning in the groove often occur.

As described above, in the conventional method, damage due to charging (charge-up damage) occurs.

[0014]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a plasma processing apparatus and a processing method capable of suppressing damage due to charging and capable of performing a good surface treatment on a surface to be treated.

Another object of the present invention is to prevent damage due to electrification when performing a surface treatment on a surface to be processed or an inside of a groove made of a conductor before depositing the conductor, and to obtain a good electrical contact state. A method for manufacturing the obtained semiconductor device can be provided.

The plasma processing apparatus according to the present invention comprises: a vacuum vessel; support means for supporting an object to be processed in the vacuum vessel; gas introducing means for introducing a gas into the vacuum vessel; A plasma generating apparatus having plasma generating means for generating plasma of the plasma processing apparatus, comprising: extracting means for preferentially extracting hydrogen negative ions from the plasma toward the object to be processed; The method is characterized in that a group of hydrogen ions in a state larger than the amount of positive ions is supplied to the object to be processed, and the inner surface of the groove of the object is subjected to plasma processing.

[0017] Further, a vacuum vessel, supporting means for supporting an object to be processed in the vacuum vessel, gas introducing means for introducing a gas into the vacuum vessel, and generating plasma of the gas. And a metal member provided in contact with hydrogen radicals and / or hydrogen positive ions generated by the plasma generating means to generate hydrogen negative ions, The method is characterized in that a group of hydrogen ions in which the amount of negative ions is larger than the amount of positive ions of hydrogen is supplied to the object to be processed, and the inner surface of the groove of the object to be processed is processed.

The processing apparatus includes a vacuum vessel, support means for supporting the object to be processed in the vacuum vessel, and gas introducing means for introducing gas into the vacuum vessel.
A hydrogen ion generating means for generating hydrogen ions from the gas introduced by the gas introducing means, and supplying a hydrogen ion group in a state where the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen to the object to be processed. The inner surface of the groove of the object is processed.

The processing method according to the present invention, in the method for processing a surface to be processed made of a conductor, includes a step of exposing the surface to be processed to a group of hydrogen ions in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen. It is characterized by the following.

A method of manufacturing a semiconductor device according to the present invention includes a cleaning step of cleaning an inner surface of a groove formed in an insulating film provided on a substrate, and a step of depositing a wiring conductor in the groove. In the method for manufacturing an apparatus, the cleaning step includes a step of performing processing by supplying a hydrogen ion group in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen into the groove.

Further, in the method for manufacturing a semiconductor device, the method further comprises a surface treatment step of performing a surface treatment on a surface to be treated made of a conductor, and a deposition step of depositing a conductor on the surface-treated surface to be treated. The step includes exposing the surface to be treated to a group of hydrogen ions in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Processing Apparatus) FIG. 1 shows a plasma processing apparatus according to an embodiment of the present invention.

In FIG. 1, as plasma generating means,
A DC power supply 1 and a filament 2 are provided. Reference numeral 3 denotes a plasma generation chamber in a vacuum vessel, which is a plasma generation space. Reference numeral 4 denotes an inlet for a process gas such as hydrogen gas, and reference numeral 5 denotes a processing chamber in a vacuum vessel, which serves as a processing space for the processing target W having a groove. 9 is an exhaust port. Reference numeral 10 denotes an insulating plate provided as needed, reference numeral 11 denotes a support base as a support means for supporting the object to be processed in the vacuum vessel, and reference numerals 12 and 13 denote multipoles for plasma confinement provided respectively as necessary. 1 shows a permanent magnet and a magnetic filter. Reference numeral 14 denotes a bias unit for applying a positive bias to the object W to increase the amount (density) of negative ions near the surface (object surface) of the object W. In Fig. 1, the plasma generation chamber 3
And the processing chamber 5 are provided in the same vacuum vessel, and from the exhaust port 9,
Although the air is evacuated by a vacuum pump (not shown), the plasma generation chamber 3 and the processing chamber 5 may be evacuated by different vacuum pumps in order to simultaneously realize high plasma density and optimal processing of the substrate to be processed. .

Plasma generation chamber 3 from process gas inlet 4
A gas containing hydrogen or a hydrogen atom is introduced therein, the pressure is set to, for example, about 1 Pa to 7 Pa, and a current flows through the filament 2 to cause a low-pressure arc discharge.

For details of the mechanism of hydrogen negative ion generation, see Japanese Patent Application Laid-Open No.
l of Physics B Vol. 12 (1979) p3441. According to the above literature, the reaction formula of the hydrogen negative ion is as follows.

[0026] _{^{H 3 + + e - → H}} - + H 2 +

As shown in FIG. 2, according to this document, the cross-sectional area of the above-mentioned attachment / dissociation reaction has a peak at an electron temperature (electron energy) of about 8 eV. In a plasma used in a normal semiconductor manufacturing process, the electron temperature is 2 eV
Since it is 55 eV, a plasma having an electron temperature higher than this electron temperature, for example, a plasma having an electron temperature of about 6 eV to 9 eV is required for efficient generation of negative ions.

Looking at the energy distribution of secondary electrons emitted by the incidence of negative ions, there is a peak at 1 eV to 2 eV, and electrons with higher energies sharply decrease.
Therefore, electrons of low emission energy that occupy most of the energy distribution are returned to the surface to be processed, and electrons of high emission energy are not returned. However, the charged charges due to the high emission energy electrons are offset by the negative ions. From these charge balances, the surface potential of the object to be processed is saturated at a very low value and becomes a steady state. Therefore, it is important to perform surface treatment with a group of hydrogen ions in which the amount of negative ions (negative ion density) is larger than the amount of positive ions (positive ion density).
In this case, of course, a group of 100% negative ions may be irradiated.

In particular, when the incident energy of the negative ions is 10 e
If the voltage is equal to or higher than V, secondary electrons that are not pulled back are reliably emitted, so that negative charging is prevented. Further, even when the incident energy becomes several tens of eV or more and the number of emitted secondary electrons becomes two or more, the effect that the electrons are pulled back to the positively charged substrate to be processed is exerted. +8
It becomes V and becomes stable. Even with an energy of 20 eV or more, the above-described charge suppressing effect is not lost.

Another advantage of the negative ions is that the temperature of the surface of the object to which the negative ions are incident is lower than that of the positive ions. This is because the reaction of returning positive ions to neutral atoms is an exothermic reaction of 17 eV, while the reaction of returning negative ions to neutral atoms is an endothermic reaction of 3 eV. As a result, even if negative ions are incident on the object, the local surface temperature near the ion incident point is lower than when positive ions are incident, and thermal damage to the substrate (for example, disorder of the crystal, etc.) ) Becomes smaller. As described above, by using negative ions, the surface of the object to be processed is less charged, there is no shape abnormality due to electrostatic breakdown of the gate oxide film and bending of the ions, and there is less thermal damage to the object to be processed. And good surface treatment can be realized.

FIG. 1 shows a low-pressure arc discharge of a type in which a direct current flows through a filament, but a similar arc discharge can be generated by applying a high frequency. Other than arc discharge, as a discharge type for intensively supplying power to a narrow space, for example, an ECR discharge plasma in which large power is supplied at a low pressure, or an antenna such as a slot antenna or a radial line slot antenna (RLSA) is used. Microwave discharge plasma and the like are conceivable. In the case where these are used, it is necessary to select discharge conditions such that the electron temperature, which is different from the general glow discharge conditions, is about 6 eV to 9 eV.

It is also considered that the addition of atoms that easily dissociate electrons during discharge increases the electron density and further promotes the reaction. Examples of atoms that can easily dissociate electrons include cesium (Cs) and rubidium (R
b) and alkaline earth metals such as barium (Ba), strontium (Sr) and calcium (Ca).

The plasma generated by the arc discharge shown in FIG. 1 is a plasma generated locally near the filament 2. In the case of a substrate having a large area, the processing uniformity may be poor with a single filament. is there. In this case, a plurality of filaments may be provided.

In the method using arc discharge, a large amount of thermoelectrons are emitted from the filament in addition to negative ions.
In order to remove electrons from the plasma containing both negative ions and electrons, between the plasma generation chamber 3 and the processing chamber 5,
It is desirable to provide a magnetic filter 113.

When processing is performed using the apparatus having the above structure, neutral radicals are incident on the substrate to be processed in addition to negative ions because neutral radicals are not intentionally eliminated. However, since the kinetic energy of the incident radical is very low, the radical only adheres to the surface of the substrate to be treated, and a cleaning effect by a spontaneous reaction cannot be expected. However, when negative ions having energy are incident on the surface where hydrogen is adsorbed, a so-called ion assist reaction occurs, and the reaction speed is considered to be faster than when only negative ions are incident. That is, the presence of a neutral radical
Although there is an advantage of increasing the cleaning speed,
There are few disadvantages, so there is no need to intentionally eliminate them.

In the vicinity of the surface of the processing object W disposed in the processing chamber 5 downstream of the plasma generation chamber 3, the amount (density) of hydrogen negative ions is reduced by the action of a bias voltage. Bigger than enough.

When the bias voltage is set to about +50 V to +200 V, more preferably about +80 V to +200 V, negative ions having a density 100 times or more the density of positive ions can be obtained. The density of the negative ions can be measured with a commercially available quadrupole mass analyzer or the like.

When the surface to be treated is treated with ions having a larger amount of negative ions than positive ions, a favorable surface treatment without charge is performed. In particular, it is suitable for cleaning or hydrogen terminating the surface to be processed made of a conductor with negative hydrogen ions, cleaning or hydrogen terminating the inner surface of the groove with negative hydrogen ions.

FIG. 3 shows a plasma processing apparatus according to another embodiment. In the processing apparatus of FIG. 3, as a means for extracting negative ions from the plasma generation chamber, a grid electrode 8 is provided between the plasma generation chamber and the processing target W instead of biasing the processing target W having a groove. The power supply 15 applies a positive DC bias to the grid electrode 8 to maintain the grid electrode at a positive potential.
As a voltage applied to the grid electrode, +20 V to +2
When 00V, more preferably about + 80V to + 200V is selected, negative ions having a density of 100 times or more of positive ions can be easily obtained. The apparatus of this embodiment has the same configuration as that shown in FIG. 1 except for the configuration of the negative ion extracting means.

FIG. 4 shows a plasma processing apparatus according to still another embodiment of the present invention. The processing apparatus of FIG. 4 biases the object W to be processed and extracts the first preliminary grid 6, the second preliminary grid 7, and the grid electrode 8 as means for extracting negative ions from the plasma generation chamber. A positive DC bias is applied to the first and second grids 6 and 7 and the grid electrode 8 by the power supply 15 so as to maintain each grid at a positive potential. It is configured. The apparatus of this embodiment has the same configuration as that shown in FIG. 1 except for the configuration of the negative ion extracting means.

In order to extract negative ions from the plasma containing a large amount of negative ions generated as described above, DC positive voltages V1 and V2 are further applied to the first and second grids 6 and 7, respectively. And V2>V1>Vp> 0. Here, Vp is a plasma potential and usually indicates a value of several volts. With such a grid electrode arrangement, negative ions are accelerated to V2−Vp (eV) and are extracted in a direction perpendicular to the two grids. By adjusting the values of V1 and V2, the energy of the negative ions can be arbitrarily adjusted. In a plasma processing apparatus using neutral particles, for example, Japanese Patent Application Laid-Open No. 9-82689 also shows a structure having two grids downstream of the plasma in the same manner. The difference is that a positive potential is applied to one of the grids and a negative potential is applied to the other grid, whereas a positive potential is applied to a plurality of grids in order to extract negative ions. FIG. 4 shows an example in which two spares are provided for extracting negative ions. However, one spare grid may be provided.

The grid electrode 8 disposed immediately before the support also functions as a secondary electron capture electrode here.
DC voltages Vs and V3 are applied to the support 11 and the grid electrode 8, respectively.
And set the voltage value so that V3>Vs> 0. As described above, the negative ions extracted from the plasma have an energy of Vs-Vp (eV) and enter the workpiece W. The secondary electrons emitted from the surface of the object W are accelerated to the potential V3-Vs and are captured by the grid electrode 8 for capturing secondary electrons. Prevent charge build up. By adjusting the potentials of V3 and Vs, it is possible to arbitrarily adjust the incident energy of negative ions to the object W and the amount of secondary electrons emitted from the surface of the object.

Therefore, the apparatus shown in FIG. 4 can be modified so that the apparatus shown in FIG. 4 is obtained by removing the two spare grids 6 and 7.

In the case of processing an object on which a transistor having a gate insulating film having a relatively low withstand voltage is formed,
When the object 9 is placed directly on the support 11, the negative charges accumulated on the surface of the object 9 are transferred through the gate oxide film to the support 11.
And may result in gate oxide breakdown. In order to prevent this, the support base 11 and the workpiece W
Preferably, an insulating plate 10 is provided between them. As a material of the plate 10, for example, aluminum oxide, aluminum nitride, or the like can be considered. However, any material having an insulating property and high plasma resistance can be used.

FIG. 5 shows a processing apparatus according to another embodiment of the present invention. In this apparatus, a large amount of hydrogen negative ions are generated by bringing a neutral active species such as a hydrogen radical into contact with a metal member. This device employs the principle of generating negative ions by a so-called charge exchange reaction, in which when neutral particles come into contact with the metal surface, the neutral particles receive free electrons in the metal. In FIG. 5, 21 is a microwave power supply, 3 is a plasma generation chamber, 24 is a transport pipe, 4 is a process gas inlet, 5 is a processing chamber, 25 is a metal plate, 6 is a first spare grid, and 7 is a second grid. , 8 denotes a grid electrode, 10 denotes an insulating plate, and 11 denotes a support.

First, a gas containing hydrogen or a hydrogen atom is introduced into the plasma generation chamber 3 from the gas inlet 4, and a microwave is supplied from the microwave power supply 21 to generate plasma. Here, the plasma generation method is parallel plate type, ICP
Type, magnetron type, ECR type, helicon wave type, surface wave type, surface wave interference type with flat multi-slot antenna,
Any type of the RLSA type may be used, but considering the reduction in plasma density when diffusing into the processing chamber 5 downstream, the plasma density is preferably as high as possible. Next, the plasma generation chamber
The hydrogen radicals generated in 3 are transferred to the processing chamber 5 through the transport pipe 24.
Transport to On the other hand, hydrogen positive ions generated by microwave discharge also disappear during transport due to recombination with electrons, and most of the hydrogen active species are neutral active species. Next, in the processing chamber 5,
The metal member 25 is installed. Considering that the material of the metal member 25 has a higher charge exchange reaction probability as the work function of the metal surface is lower, the work function of an alkali metal such as cesium and rubidium or an alkali earth metal such as barium, calcium and strontium is considered. It is preferable that at least the surface is made of a material having a small size. Further, in order to prevent the metal member 25 from being corroded due to being exposed to the plasma and becoming high in temperature, it is necessary to cool with a coolant such as cooling water.

The process of generating negative ions is as follows. When the neutral active species reaching the processing chamber 5 through the transport pipe 24 comes into contact with the surface of the metal plate 25, the particles receive free electrons in the metal, a so-called charge exchange reaction occurs, and the neutral active species is converted to negative ions. Is converted. At this time, a negative potential is applied to the metal member 25.
By giving Vp (Vp <0), the efficiency of the charge exchange reaction can be improved.

FIG. 6 shows a metal member suitably used in the present embodiment. Since the generation of hydrogen negative ions utilizes a charge exchange reaction on the surface of the metal member 25, the structure of the metal member preferably has a surface area as large as possible.
For example, as shown in FIG. 6, a shape in which a number of fine holes 31 are formed in the metal member 25 is an example of a suitable shape. 32 is a refrigerant inlet for flowing a refrigerant such as water, and 33 is a refrigerant outlet.

In addition to converting a neutral active species into a negative ion, a negative ion can be generated by a charge exchange reaction using a positive ion and a metal member. In that case, it is not necessary to transport the generated plasma over a long distance, and a metal member may be provided near the plasma generation region. Further, by applying a negative potential Vp (Vp <0) to the metal member 25 and positively attracting positive ions to the metal plate, the efficiency of the charge exchange reaction can be further improved.

(Treatment Method) In a method of treating a surface to be processed made of a conductor according to an embodiment of the present invention, the surface to be processed is exposed to hydrogen ions in a state where the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen. It is characterized by including a step. FIG. 7 shows a processing method according to the present embodiment. Workpiece 50
Is processed using the apparatus shown in FIGS. 1 and 3 to 5 and has a processing target surface 50 made of a conductor.
Foreign matter such as the upper native oxide film is reduced and removed by hydrogen negative ions.

According to the above-described treatment method of the present invention, foreign substances such as a natural oxide film and organic substances such as photoresist residues attached to the surface of the conductor are removed and the surface is cleaned while suppressing damage due to charging. be able to.

The object to be treated having a surface to be treated made of a conductor used in the present invention includes a conductor containing silicon (Si), aluminum (Al) and copper (Cu) as main components (of course, pure Si, (Including pure Al and pure Cu) itself. Alternatively, such a conductor film may be a substrate formed on the entire surface or a part of the surface of a substrate such as an insulating substrate, a conductive substrate, and a semiconductor substrate. As the conductor, other than Si, Al, and Cu, Ti, V, C
r, Co, Ni, Y, Zr, Nb, Mo, Ru, Pd,
The conductor may include at least one selected from transition metals such as Hf, Ta, W, Ir, and Pt. Specific examples of the conductor include N-type or P-type doped polycrystalline silicon (doped silicon is a semiconductor physically, but can be regarded as a conductor in function), Al
Cu, AlSi, AlSiCu, AlGe, AlSiG
e, AlCuGe, CuGe, AlTi, AlSiT
i, TiN, TiSi, TiSiN, AlCr, CoS
i, NiSi, MoSi, AlPd, TaN, TaS
i, TaSiN, TiW, TaW, WN, and PtSi. These may have a stoichiometric ratio or may have a composition that does not.

More specifically, the S in which the trench is formed
i-wafer, Si wafer or glass substrate or quartz substrate with gate electrode pattern formed, Si wafer or glass substrate or quartz substrate with insulating film formed with contact holes or through holes, metal wiring or barrier metal formed S
i-wafer, glass substrate, quartz substrate, Si wafer, glass substrate, quartz substrate with grooves for damascene process,
And so on. Further, the present invention can be applied to optical components such as quartz, fluorite, and glass on which an optical thin film is formed, and quartz, fluorite, and glass for a diffraction grating having an uneven surface.

Further, in a surface treatment method according to another embodiment of the present invention, a surface treatment step of surface-treating a surface to be treated made of a conductor, and depositing a conductor on the surface-treated surface to be treated. The present invention can be applied to a semiconductor device manufacturing method including a deposition step. In this case, the conductor may be further deposited on the surface to be processed made of the conductor processed according to the above-described embodiment. In this case, the same material as the underlying conductor may be deposited or may be different.

FIG. 8 shows an apparatus in which the surface SF of the conductor layer 51 is surface-treated with hydrogen negative ions, and then the conductor layer 52 is formed on the surface SF to be processed. According to the present embodiment, a laminated conductor with good electrical contact without damage due to charging can be obtained.

Further, the method of manufacturing a semiconductor device according to one embodiment of the present invention includes a cleaning step of cleaning an inner surface of a groove formed in an insulating film provided on a substrate;
A step of depositing a wiring conductor in the groove; and a step of supplying hydrogen ions in a state where the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen into the groove to perform processing. It is characterized by the following.

FIG. 9 shows a method of forming another conductor after subjecting a substrate having an insulating film in which openings as grooves are formed to surface treatment with negative hydrogen ions.

First, a barrier metal 61 is formed on a part of a substrate 60 such as a silicon wafer, and an insulating film 62 such as silicon oxide is formed thereon. Openings 63 called contact holes, through holes, and via holes are formed by reactive ion etching or the like. (Step S1)

Next, the surface to be processed SF of the barrier metal 61 exposed from the opening 63 is cleaned with negative hydrogen ions using the apparatus shown in FIGS. At this time, the side surface of the opening 63 and the upper surface of the insulating film 62 are also cleaned. (Step S2)

Then, a conductor 64 for wiring is deposited in the opening 63 and on the upper surface of the insulating film 62 by a CVD method or the like. (Step S3)

According to the present embodiment, damage due to charging is suppressed, and the surface of the barrier metal is cleaned.
The electrical contact between the conductor 64 and the barrier metal is improved,
High resistance of the wiring can be suppressed.

In the present embodiment, the barrier metal 61 may be formed after the formation of the insulating film 62 and the formation of the opening 63. In this case, after the opening is formed, the exposed bottom surface may be nitrided or silicided.

The conductor 64 for wiring is formed by selectively depositing a conductor such as W, Al, Cu, Au or the like in the opening by a CVD method or the like, and then depositing in the opening by a CVD method or a sputtering method. It can also be formed in two steps of depositing a conductor again on the conductor and the insulating film 62. Or,
After depositing a conductor at least in the opening 63, unnecessary conductors are polished and removed to the upper surface level of the insulating film 62 by chemical mechanical polishing (CMP) to form a conductor in the opening, and then the CVD method is performed again. Alternatively, the conductor may be formed by a sputtering method.

FIG. 10 shows a method of manufacturing a semiconductor device according to another embodiment of the present invention. That is, after a substrate having an insulating film in which an opening as a groove is formed is subjected to a surface treatment with hydrogen negative ions, 5 shows another method of forming the conductor of FIG.

First, a diffusion layer and / or a layer 65 made of a first barrier metal is formed on a substrate 60 such as a silicon wafer, and an insulating film 62 such as silicon oxide is formed thereon.
Openings 63 called contact holes, through holes, and via holes are formed by reactive ion etching or the like. Then, a second barrier metal 66 is formed on the inner surface of the opening and the upper surface of the insulating film 62 by a CVD method, a sputtering method, or the like (step S11).

Next, using the apparatus shown in FIG. 1 and FIGS. 3 to 5, the processing surface SF of the barrier metal 66 in the opening 63 and on the insulating film 62 is cleaned with hydrogen negative ions.
(Step S12)

Then, a conductor 64 for wiring is deposited on the barrier metal 66 by a CVD method, sputtering or the like. (Step S13)

According to the present embodiment, since the surface of the barrier metal is cleaned, the electrical contact between the conductor 64 and the barrier metal 66 is improved, and the increase in the resistance of the wiring can be suppressed.

In this embodiment, the layer 65 may be formed after the formation of the insulating film 62 and the formation of the opening 63. In this case, after the opening is formed, the P-type or N-type dopant may be diffused into the exposed bottom surface, the bottom surface may be nitrided, or the bottom surface may be silicided.

The conductor 64 for wiring is made of a conductor (CVD conductor) such as W, Al, Cu, Au or the like by the CVD method.
Can be formed by depositing a thin film on the barrier metal 66, depositing a conductor again on the CVD conductor by a sputtering method, and reflowing as necessary. Alternatively, after depositing a conductor on the barrier metal 66 so that at least the inside of the opening 63 is filled, unnecessary conductors on the insulating film 62 are polished and removed by chemical mechanical polishing (CMP). After leaving only the conductor, CV again
The conductor may be formed by a D method or a sputtering method.

FIG. 11 shows a method of manufacturing a semiconductor device according to still another embodiment of the present invention. That is, a substrate having an insulating film in which a concave portion for wiring and an opening are formed as grooves is surface-treated with hydrogen negative ions. Figure 7 illustrates another method of forming another conductor after processing.

First, an insulating film 62 such as silicon oxide is formed on a substrate 60 such as a silicon wafer. Contact holes, through holes,
An opening 63 called a via hole and a recess 67 for wiring are formed. Then, a barrier metal 66 is formed on the inner surface of the opening, the inner surface of the concave portion, and the upper surface of the insulating film 62 by a CVD method or a sputtering method (Step S21).

Next, using the apparatus shown in FIG. 1 and FIGS. 3 to 5, the surface to be processed SF of the barrier metal 66 is cleaned with negative hydrogen ions. (Step S22)

Then, a conductor 64 for wiring is deposited on the barrier metal 66 by CVD or sputtering. (Step S23)

Further, unnecessary conductors 64 are polished and removed by CMP to form wirings 68 in the grooves. A method of forming a wiring using such polishing is known as a dual damascene process. (Step S24)

According to the present embodiment, since the barrier metal surface is cleaned while suppressing damage due to charging, the electrical contact between the conductor 64 and the barrier metal 66 is improved.
High resistance of the wiring can be suppressed.

The conductor 64 for wiring is made of a conductor (CVD conductor) such as W, Al, Cu, Au or the like by the CVD method.
Can be formed by depositing a thin film on the barrier metal 66, depositing a conductor again on the CVD conductor by a sputtering method, and reflowing as necessary.

Next, a method of manufacturing a semiconductor device according to another embodiment of the present invention will be described.

First, a substrate such as a silicon wafer is prepared.
A gate insulating film is formed on a surface of the silicon layer. Next, polycrystalline silicon is deposited, and Ti, Ta, P
A high melting point metal such as t, Co, W, and Mo is deposited to form a conductive layer serving as a gate electrode or another electrode. This is RI
Patterning into a desired electrode pattern by E or the like. Then, the treatment using hydrogen negative ions is performed using the apparatus shown in FIGS. 1 and 2 to 5. The situation at this time is shown in FIG.

FIG. 12 and FIG. 13 are schematic views for explaining cleaning in the groove. In FIG.
0 is a base, 71 is an insulating film, 72 is a conductor, 73 is a groove, 7
4 is a positive ion, 76 is a hydrogen negative ion, 75 is an electron, 79
Is an abnormal shape, and 77 is a secondary electron.

FIG. 13 shows a case where positive ions are used.
Positive ions 74 and electrons 75 alternately enter the substrate 70 during one cycle of the AC electric field to maintain a constant charge amount on the surface of the substrate 70, but secondary electron emission accompanying the incidence of the positive ions is attempted. Due to this, the insulator surface is slightly positively charged. Since the electron 75 has a smaller mass than the positive ion 74 and its orbit can be easily bent, the electron is bent by the electric field due to the positive charge, and as shown in FIG. 13, the cross-sectional shape has a large aspect ratio. That is, the amount of the positive ions 74 reaching the bottom of the deep hole becomes larger than that of the electrons 75, and the hole is positively charged. As a result, a large positive charge is accumulated at the bottom of the contact hole, and the ions are bent by the electric field, so that it is difficult to even reach the bottom of the hole, and cleaning failure occurs.

On the other hand, in FIG. 12, since the negative ions are mainly used, the hydrogen negative ions 76 have a large mass, and therefore uniformly enter the surface of the substrate 70 without depending on the aspect ratio, and
The 0 surface is slightly negatively charged. Secondary electrons 77 generated by the incidence of negative ions are emitted without reattaching to the surface of the semiconductor substrate 421. Therefore, the surface of the base 70 is not significantly positively or negatively charged. As described above, in the situation where the surface using the negative ions is uniformly and slightly charged by performing the treatment using the negative ions, the trajectory of the ions is not bent by the generation of the local electric field, and the shape abnormality does not occur. It is considered something.

In the embodiment described above, the grooves are
Although an opening such as a contact hole and a through hole and a concave portion for a damascene process have been described as an example, the present invention can be applied to cleaning in a trench for forming a capacitor of a DRAM and a trench for element isolation. However, in this case,
The surface to be cleaned may be a semiconductor or an insulator.

The present invention can be applied to a substrate on which a gate electrode pattern and a wiring pattern are formed as shown in FIG. In this case, a gap is formed between a plurality of gate electrode patterns and wiring patterns. Then, cleaning of the gate electrode pattern by hydrogen negative ions, hydrogen termination of polycrystalline silicon constituting the gate electrode pattern, and the like can be performed.

As the barrier metal used in the present invention, a conductor called a high melting point metal or a refractory metal is preferably used. Many of such conductors are the above-mentioned transition metals, transition metal silicides (silicides), transition metal nitrides, and the like. Specifically, Ti, Cr, Co,
Ni, Mo, W, Ta, Pt, TiSi, CoSi, N
iSi, MoSi, WSi, TaSi, PtSi, Ti
N, TiSiN, TaN, TaSiN, TiW, Ta
W, WN. These may have a stoichiometric ratio or may have a composition that does not.

The conductors for wiring used in the present invention include, for example, Al, Cu, AlCu, AlSi, A
lSiCu, AlGe, AlSiGe, AlCuGe,
A such as CuGe, AlTi, AlSiTi, AlPd
Metals containing l, Cu, Au, etc. as main components are preferably used.

In the present invention, it is preferable that after the cleaning step using hydrogen negative ions, the wiring conductor be deposited without being exposed to the air. This is performed by an in-line or single-wafer multi-chamber apparatus. Can be implemented.

FIG. 14 is a schematic perspective view showing a single-wafer multi-chamber apparatus having a plasma processing apparatus and a conductor CVD apparatus used in the present invention. Using this apparatus, a part of the structure shown in FIGS. 9 to 11 can also be manufactured.

Referring to FIG. 14, reference numerals 101 and 102 denote load lock chambers and 10 for accommodating a substrate to be processed.
Reference numerals 3, 104, 106, and 107 denote reaction chambers, 105 denotes a heating chamber, and 108 denotes a transfer chamber having a substrate transfer means (not shown) therein. Each chamber is placed on a support 111.

Each of the above-mentioned chambers is connected to an exhaust pump 109 via an exhaust pipe 110 so that the interior of the chamber can be maintained at an appropriate pressure. This apparatus is called a cluster type, and the reaction chambers 103, 104, 106 and 1
07, but depending on the manufacturing process, at least one of them may not be used, and then the unused reaction chamber may be cut off.

In the method of manufacturing a semiconductor device of the present invention described below, the reaction chamber 107 is not used.

According to this apparatus, each process can be performed continuously without exposing the substrate to the atmosphere, so that the reproducibility of the structure is excellent.

The operation method is as follows.

First, the load lock chamber 101 is set as a substrate loading chamber. The opening / closing means 112 is opened, and the substrate having the barrier metal formed on the surface is accommodated in the carry-in room 101. After evacuating the inside, the gate valve between the carry-in chamber 101 and the transfer chamber 108 is opened, and the substrate is transferred into the transfer chamber 108.

If necessary, the substrate is housed in the heating chamber 105 and the substrate is heated.

The preheated substrate is transferred to the reaction chamber 103, and the reaction chamber 103 is sealed. This reaction chamber is shown in FIGS.
5 are configured as shown in FIG. When the pressure in the reaction chamber is 1
The pressure is maintained at 3.3 Pa to 133 Pa, and the substrate temperature is 100 ° C.
At 200 ° C., the surface of the substrate, that is, the surface of the barrier metal is cleaned. The gas used is a gas obtained by diluting H ₂ , and cleaning is performed by etching the surface of the barrier metal by about 5 nm to 10 nm using negative hydrogen ions.

The gate valve of the reaction chamber 103 is opened, and the cleaned substrate is transferred through the transfer chamber 108 to the reaction chamber 10.
3 and transferred into the reaction chamber 104, and the gate valve of the reaction chamber 104 is closed. In the reaction chamber 104, a nitrogen plasma treatment is performed. The inside of the reaction chamber 104 is kept under reduced pressure at about 13.3 Pa to 133 Pa, and the substrate is heated and kept at 200 ° C. to 450 ° C. In this reaction chamber, glow discharge plasma of nitrogen gas is generated using parallel plate type electrodes. Thus, the barrier metal on the surface of the substrate is nitrided to become nitride, and the barrier characteristics are improved.

The gate valve of the reaction chamber 104 is opened, and the substrate is transferred from the reaction chamber 104 through the transfer chamber 108 to the reaction chamber 10.
In the reaction chamber 106 which is transferred to
Holding at 0 ° C., introducing DMAH gas and hydrogen gas,
Aluminum is deposited on the nitride barrier metal by a CVD method.

After the deposition of aluminum, the gate valve of the reaction chamber 106 is opened, and the substrate is transferred to the transfer chamber 108.
The gate valve of the load lock chamber 102 serving as the carry-out chamber is opened, and the base is collected in the load lock chamber 102.

If the processing conditions in each of the reaction chambers are adjusted so that the processing is performed simultaneously in each of the reaction chambers 03, 104, and 106, the number of substrates processed per predetermined time increases.

Referring to FIGS. 15 and 16, a description will be given of a manufacturing process of an example in which the structure shown in FIG. 9 is used as a source or a drain of a MOS transistor.

After a field insulating film 151 is formed on the front side of the Si wafer W by a selective oxidation method and a gate insulating film 52 is formed, a gate electrode 153 made of polysilicon is formed. Next, As ions are implanted (step S31).

Next, heat treatment is performed to form an n ⁻ -type semiconductor layer 155 to be a source / drain, and the surface is thermally oxidized. The entire surface of the substrate is anisotropically etched to leave sidewalls 154 made of silicon oxide on the side surfaces of the gate electrode 153. Then, As ions are ion-implanted (step S32).

After heat treatment to form an n ⁺ -type semiconductor layer 158 serving as a source / drain, the oxide film on the source / drain and the gate electrode is removed by etching, and a Ti film is formed on the entire surface by sputtering or CVD. accumulate. Thereafter, heat treatment is performed to cause Ti on the source / drain and the gate electrode to react with Si under the Ti and silicide to form silicide, followed by etching to remove the Ti film. Thus, titanium silicides 156 and 157 remain only on the gate electrode and on the source / drain (step S33).

An insulating film 159 is formed by the CVD method, and the contact hole 1 is formed by the reactive ion etching.
Form 60. Preferably, before etching, the insulating film 1
The surface of 59 may be polished and smoothed by CMP.

Next, steps S35 and S36 are performed using the single-wafer multi-chamber apparatus shown in FIG.

The surface of titanium silicide 157 is cleaned with negative hydrogen ions (step S34).

Next, the wafer W is kept at 400 ° C., the pressure is set to 27 Pa, and the surface of the substrate is exposed to N ₂ plasma. Thus, the titanium silicide layer exposed from the contact hole is nitrided, and the α-TiSiN film 161 having a thickness of 9 nm is formed.
Is generated (step S35).

At this time, the insulating film 15 such as silicon oxide
9 and the side surfaces of the contact holes are doped with nitrogen atoms. The nitriding treatment may be performed without plasma.

Next, selection CV using DMHA and H ₂ was performed.
The Al plug 162 is formed in the contact hole by the D method (Step S36).

Then, the substrate is taken out of the apparatus shown in FIG. Next, if necessary, unnecessary Al deposits are removed by etching or CMP, and a conductive film 16 of AlCu or the like is formed by sputtering or CVD using another apparatus.
3 is formed (Step S37).

Finally, the conductive film 63 is etched and patterned into a source / drain wiring shape (step S3).
8).

As described above, according to this embodiment, since the amorphous silicon titanium nitride (α-TiSiN) layer is used as the barrier layer, a high-quality conductor film can be formed on the barrier layer. . In particular, the barrier layer of the present invention becomes a good quality continuous thin film even if its thickness is reduced to less than 10 nm, and the resistance value in the thickness direction is sufficiently low. In addition, since no barrier layer exists on the side wall of the contact hole, and a low-resistance plug grown on the barrier layer is provided in contact with the side wall, the contact resistance is reduced. In this manner, it is possible to obtain a fine structure of a contact hole portion having a low resistance even if it is small.

[0114]

(Embodiment 1) A sectional structure of a semiconductor substrate processed in this embodiment will be described with reference to FIG. In FIG. 17, W is a silicon substrate, 432 is an element isolation insulating film, 433 is a gate oxide film, 434 is a gate electrode, 435 is a first interlayer oxide film, 436 is a first layer metal wiring, and 437 is a first layer metal. A barrier metal for wiring, 438 is an anti-reflection film of the first layer metal wiring, 439 is a second interlayer oxide film, 440 is a via hole (through hole) formed by dry etching, and 441 is a thin oxide layer on the surface of the anti-reflection film. .

At the bottom of the via hole on the surface of the silicon substrate, a natural oxide film or a crystal defect 441 introduced by ion bombardment at the time of etching remains. Due to crystal defects, the resistance value of the via hole increases, resulting in circuit delay and poor wiring continuity. Therefore, these residues need to be removed by cleaning. However, if the substrate is taken out into the air after the cleaning process, a natural oxide film grows again on the cleaned surface. Therefore, it is desirable that the substrate be kept in a vacuum from the cleaning to the formation of the second-layer metal wiring.
As a cleaning method satisfying this requirement, a method using plasma is widely and generally used. The problem here is the charge-up phenomenon due to plasma. When this cleaning is performed by the conventional positive ion treatment, the positive charges introduced from the plasma flow to the gate electrode 434 through the first layer metal wiring 436, and finally, the silicon substrate W
A voltage is applied to the gate oxide film 433 existing between the gate electrode 434 and the gate electrode 434. When this voltage reaches the breakdown voltage, the gate oxide film
433 leads to electrostatic breakdown, and a very small tunnel current flows through the gate oxide film 433 even at a breakdown voltage or less, so that its life is significantly deteriorated.

Therefore, the base shown in FIG. 17 was set on the base support 11 of the apparatus shown in FIG. Thereafter, the plasma generation chamber 3 and the processing chamber 5 are evacuated through the exhaust system, and the degree of vacuum is set to 6.
The pressure was reduced to 7 × 10 ⁻⁴ Pa. Thereafter, 150 sccm of hydrogen gas was supplied into the plasma generation chamber 3, and the pressure was set to 1.3 Pa by adjusting the throttle valve provided in the exhaust system.
Here, a current of 100 A was passed from the DC power supply 1 to the filament 2 to generate arc discharge plasma in the plasma generation chamber 3. +50 V to the first spare grid 6 and the second spare grid to take out the negative ions generated by the arc discharge
A +75 V DC voltage was applied to 7. In addition, +
A DC voltage of +105 V was applied to the grid electrode 8 at 100 V. Since it is considered that the potential in the arc discharge plasma is about several volts, when the above voltage is applied to each grid, negative ions are incident on the semiconductor substrate W with an energy of about 100 eV. . After the above-described treatment with hydrogen negative ions was performed for 30 seconds, the substrate was moved to a metal wiring film forming chamber while the vacuum was maintained, and the second-layer metal wiring was deposited. The surface morphology of the deposited film was good and its reflectance showed a value of 200% with respect to the silicon substrate. Subsequently, through a process such as patterning with a photoresist and dry etching, a second-layer metal wiring was formed, and the characteristics of the semiconductor element were evaluated.

In the case of using this embodiment, there was no device in which the performance of the gate oxide film was deteriorated.

As described above, when the treatment with negative ions is performed, the potential of the first-layer metal wiring is suppressed to several volts or less, which is the operating voltage of the semiconductor element. Hardly deteriorates.

Example 2 A substrate having the structure shown in FIG. 17 was set on the support 11 of the apparatus shown in FIG. Thereafter, the plasma generation chamber 3 and the processing chamber 5 were evacuated through the exhaust system, and the pressure was reduced until the degree of vacuum reached 6.7 × 10 ⁻⁴ Pa. After that, 150 sccm of hydrogen gas is supplied into the plasma generation chamber 3,
Adjust the pressure by adjusting the throttle valve installed in the exhaust system.
Set to 10mTorr. Next, 2.4
By supplying 5GHz microwave with 500W power,
Plasma was generated in the plasma generation chamber 3. The plasma generated in this manner was transported to the processing chamber 5 side connected to the plasma generation chamber 3 through the transport pipe 24.
In the transport tube 24, the positive ions in the plasma recombine to generate a large amount of neutral active species. The neutral active species is treated in a processing chamber.
Metal members with a voltage of -10V applied, installed in 5
The negative electrode was generated by contacting with 25 and exchanging charges. To remove the generated negative ions, a DC voltage of +50 V was applied to the first auxiliary grid 6 and a DC voltage of +75 V was applied to the second auxiliary grid 7. Further, a DC voltage of +100 V was applied to the support 11 and a DC voltage of +105 V was applied to the grid 8. When the above voltage is applied to each grid, negative ions are incident on the substrate W with an energy of 110 eV. After performing the treatment with hydrogen negative ions described above for 30 seconds, the substrate was moved to a metal wiring film forming chamber while the substrate was kept in a vacuum, and the second layer metal wiring was deposited. The surface morphology of the deposited film is good and its reflectivity is 210% for silicon wafer
It showed the value. Subsequently, through processes such as patterning with a photoresist and dry etching, the second
Layer metal wiring was formed, and the characteristics of the semiconductor element were evaluated. In the case of the present example, there was no device in which the performance of the gate oxide film was deteriorated.

[0120]

According to the present invention, since hydrogen negative ions are treated with a dominant hydrogen ion group, damage to the object to be treated due to charging can be prevented, and surface treatments such as cleaning and hydrogen termination can be favorably performed.

In the case of an object to be processed having a groove, non-uniform charging does not occur in the plane, so that the shape can be kept good and the inside of the groove can be processed well.

As described above, according to the present invention, damage due to charging is suppressed.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a plasma processing apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a cross-sectional area of an attachment-dissociation reaction and electron energy.

FIG. 3 is a diagram showing a plasma processing apparatus according to another embodiment of the present invention.

FIG. 4 is a diagram showing a plasma processing apparatus according to still another embodiment of the present invention.

FIG. 5 is a diagram showing a processing apparatus according to another embodiment of the present invention.

FIG. 6 is a diagram showing a metal member suitably used in the embodiment of the present invention.

FIG. 7 is a diagram for explaining a processing method according to an embodiment of the present invention.

FIG. 8 is a diagram showing an article in which a conductor layer is formed on a surface that has been subjected to a surface treatment.

FIG. 9 is a diagram illustrating a manufacturing process of the semiconductor device according to the embodiment of the present invention;

FIG. 10 is a view illustrating a manufacturing process of a semiconductor device according to another embodiment of the present invention;

FIG. 11 is a view showing a manufacturing process of a semiconductor device according to still another embodiment of the present invention.

FIG. 12 is a view illustrating a method of manufacturing a semiconductor device according to still another embodiment of the present invention.

FIG. 13 is a diagram for explaining a process using positive ions.

FIG. 14 is a perspective view of a single-wafer multi-chamber apparatus used in the method for manufacturing a semiconductor device of the present invention.

FIG. 15 is a view showing a first half of a method of manufacturing a semiconductor device according to still another embodiment of the present invention;

FIG. 16 is a view showing a first half of a method of manufacturing a semiconductor device according to still another embodiment of the present invention;

FIG. 17 is a schematic sectional view of a semiconductor device according to one embodiment of the present invention.

FIG. 18 is a view showing a conventional parallel plate type plasma processing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 DC power supply 2 Filament 3 Plasma generation chamber 4 Process gas introduction port 5 Processing chamber 8 Grid 11 Support base 12 Multipole permanent magnet 13 Magnetic filter

Continued on the front page F-term (reference) DA19 DA20 DA23 DA24 DA26 DA29 DB01 DB02 DB03 DB08 DB09 DB10 DB12 DB13 DB15 DB16 DB17 DB18 DB26 DB27 EB01 EB04 EB05 EB06 FA01 FA07 5F045 DP02 EH16 EH18 HA03

Claims (45)

[Claims] 1. A vacuum vessel, supporting means for supporting an object to be processed in the vacuum vessel, gas introducing means for introducing a gas into the vacuum vessel, and generating a plasma of the gas. A plasma processing apparatus having a plasma generating means, comprising: extracting means for preferentially extracting hydrogen negative ions from the plasma toward the object to be processed, wherein a negative ion amount of hydrogen is larger than a positive ion amount of hydrogen. A plasma processing apparatus for supplying the hydrogen ions to the object to perform plasma processing on the inner surface of the groove of the object. 2. The plasma processing apparatus according to claim 1, wherein said plasma generating means is means for generating an arc discharge. 3. The plasma processing apparatus according to claim 2, wherein said plasma generating means adds at least one metal atom selected from an alkali metal or an alkaline earth metal during the arc discharge. 4. The method according to claim 1, wherein the plasma generating means performs cesium, rubidium, barium, strontium,
The plasma processing apparatus according to claim 3, wherein at least one kind of metal atom selected from calcium is added. 5. The plasma processing apparatus according to claim 1, wherein said drawing means is a bias means for holding the object to be processed at a positive potential. 6. The plasma processing apparatus according to claim 1, wherein said drawing means is a grid electrode held at a positive potential. 7. The plasma according to claim 1, wherein said extraction means is bias means for maintaining the object to be processed at a positive potential, and further comprises a grid electrode for capturing secondary electrons generated from said object to be processed. Processing equipment. 8. The plasma processing apparatus according to claim 1, wherein the extracting means includes a biasing means for maintaining the object to be processed at a positive potential, and a plurality of grid electrodes which are maintained at a positive potential. 9. The plasma processing apparatus according to claim 1, wherein the extracting means has a plurality of grid electrodes, and biases the grid electrode closest to the object to be processed to the highest positive potential. 10. The plasma processing apparatus according to claim 1, wherein said plasma processing apparatus is a cleaning apparatus. 11. The plasma processing apparatus according to claim 1, wherein the plasma processing apparatus is a cleaning apparatus for cleaning the inside of a groove formed in a target object. 12. A vacuum vessel, supporting means for supporting an object to be processed in the vacuum vessel, gas introducing means for introducing a gas into the vacuum vessel, and generating a plasma of the gas. A metal member provided to come into contact with hydrogen radicals and / or hydrogen positive ions generated by the plasma generating means in order to generate hydrogen negative ions; A processing apparatus, wherein a hydrogen ion group in which the amount of negative ions is larger than the amount of positive ions of hydrogen is supplied to the object to be processed to process the inner surface of the groove of the object to be processed. 13. The electric energy of any one of a parallel plate type, a magnetron type, an ICP type, an ECR type, a helicon wave type, a surface wave type, a surface wave interference type using a flat plate multi-slot antenna, and an RLSA type. 13. The processing apparatus according to claim 12, wherein the supply unit is a supply unit. 14. The processing apparatus according to claim 12, wherein at least a surface of the metal member is made of at least one atom selected from an alkali metal or an alkaline earth metal. 15. The plasma processing apparatus according to claim 12, wherein at least a surface of the metal member is composed of at least one atom selected from cesium, rubidium, barium, strontium, and calcium. 16. The processing apparatus according to claim 12, further comprising at least one of a bias unit that holds the object to be processed at a positive potential and a grid electrode that is held at a positive potential. 17. The processing apparatus according to claim 12, further comprising: bias means for holding the object to be processed at a positive potential; and a grid electrode for capturing secondary electrons generated from the object to be processed. 18. The processing apparatus according to claim 12, further comprising: bias means for holding the object at a positive potential; and a plurality of grid electrodes held at a positive potential. 19. The processing apparatus according to claim 12, further comprising a plurality of grid electrodes, wherein the grid electrode closest to the object to be processed is biased to the highest positive potential. 20. The processing apparatus according to claim 1, wherein said plasma processing apparatus is a cleaning apparatus. 21. The processing apparatus according to claim 1, wherein the plasma processing apparatus is a cleaning apparatus for cleaning the inside of a groove formed in a processing target. 22. A processing apparatus comprising: a vacuum vessel; support means for supporting an object to be processed in the vacuum vessel; and gas introduction means for introducing gas into the vacuum vessel. Hydrogen ion generating means for generating hydrogen ions from the gas introduced by the method, and supplying a hydrogen ion group in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen to the object to be processed, A processing device for processing the inner surface of the groove. 23. The processing apparatus according to claim 22, wherein said hydrogen ion generating means includes plasma generating means for generating hydrogen plasma, and extracting means for preferentially extracting negative hydrogen ions toward said object. 24. The hydrogen ion generating means, comprising: a plasma generating means for generating a plasma containing hydrogen radicals;
23. The processing apparatus according to claim 22, further comprising hydrogen negative ion generating means for generating negative hydrogen ions by bringing the hydrogen radical into contact with the metal member. 25. The hydrogen ion generating means, comprising: a plasma generating means for generating a plasma containing hydrogen radicals;
23. The processing according to claim 22, comprising: hydrogen negative ion generating means for generating hydrogen negative ions by contacting the hydrogen radical with the metal member; and extracting means for preferentially extracting the hydrogen negative ions toward the object to be processed. apparatus. 26. A plasma processing method for processing an object to be processed using the plasma processing apparatus according to claim 1. 27. A processing method for processing an object to be processed using the processing apparatus according to claim 12. 28. A method for manufacturing a semiconductor device, comprising: a cleaning step of cleaning an inner surface of a groove formed in an insulating film provided on a substrate; and a step of depositing a wiring conductor in the groove. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of supplying a group of hydrogen ions in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen into the groove to perform processing. 29. The method according to claim 28, wherein the negative ions of hydrogen are generated by arc discharge. 30. The method according to claim 28, wherein the negative ions of hydrogen are generated by bringing a hydrogen radical into contact with a metal plate. 31. The method according to claim 28, wherein the hydrogen negative ions are supplied into the groove by applying a positive DC bias to the substrate. 32. The method according to claim 28, wherein the hydrogen negative ions are supplied into the groove by applying a positive DC voltage to at least one or more grid electrodes. 33. The groove is at least one of a contact hole, a through hole, a trench recess, a recess between electrodes, and a damascene process recess.
9. The method for manufacturing a semiconductor device according to item 8. 34. The method according to claim 28, wherein an inner surface of the groove is made of a barrier metal. 35. The method of manufacturing a semiconductor device according to claim 28, wherein the inner surface of the groove comprises a bottom surface made of a barrier metal and a side surface made of an insulator. 36. The method according to claim 34, wherein the barrier metal is a conductor containing a high melting point metal atom. 37. The barrier metal is made of Ti, V, C
r, Co, Ni, Y, Zr, Nb, Mo, Ru, Pd,
The method for manufacturing a semiconductor device according to claim 34 or 35, wherein the conductor is a conductor containing at least one selected from Hf, Ta, W, Ir, and Pt. 38. The method of manufacturing a semiconductor device according to claim 28, wherein a natural oxide film is formed on an inner surface of said groove. 39. The method according to claim 28, wherein said wiring conductor is made of metal or polycrystalline silicon. 40. The method of manufacturing a semiconductor device according to claim 28, wherein said wiring conductor is metal or polycrystalline silicon deposited by a CVD method and / or a PVD method. 41. The method of manufacturing a semiconductor device according to claim 28, wherein the wiring conductor contains a metal mainly composed of Al or Cu deposited by a CVD method. 42. The method of manufacturing a semiconductor device according to claim 28, wherein after the cleaning step, the conductor for wiring is deposited without exposing to the atmosphere. 43. A method for treating a surface to be treated comprising a conductor, comprising exposing the surface to be treated to a group of hydrogen ions in which the amount of negative ions of hydrogen is greater than the amount of positive ions of hydrogen. Processing method. 44. A method for manufacturing a semiconductor device, comprising: a surface treatment step of performing a surface treatment on a surface to be treated made of a conductor; and a deposition step of depositing a conductor on the surface-treated surface to be treated. A method of manufacturing a semiconductor device, comprising: exposing the surface to be processed to a group of hydrogen ions in which the amount of negative ions of hydrogen is larger than the amount of positive ions of hydrogen. 45. The method of manufacturing a semiconductor device according to claim 44, wherein the conductor is deposited without exposing to the atmosphere after the surface treatment step.