JP2000148093A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption without reducing a drive frequency, that is, without lowering picture quality due to a flicker of a picture by providing a charge collecting/regenerating means collecting/regenerating charges on a prescribed wiring group formed on a display panel. SOLUTION: The charge collecting/regenerating means 11 collecting/ regenerating the charges on data buses 5-1 to 5-4 is provided. In this device, when the drive of the data buses 5-1 to 5-4 is moved from positive drive to negative drive, a charge discharge control signal S1 is made an L level, and connection switch elements 15-1 to 15-4 are turned off, and the charge discharge control signal S2 is made an H level, and thin film transistors 18-1 to 18-4 are turned on. Thus, the charges charged on the data buses 5-1 to 5-4 are supplied to a DC-DC converter 19 through the thin film transistors 18-1 to 18-4, etc., and the charges on the data buses 5-1 to 5-4 are discharged, and the output charges of the DC-DC converter 19 are supplied to a battery 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a display device having a display panel, such as a liquid crystal display device or a plasma display device.

[0002]

2. Description of the Related Art FIG. 11 is a circuit diagram of a part of an example of a conventional liquid crystal display device. In FIG. 11, 1 is an image display unit,
2-11 to 2-44 are liquid crystal capacitors, 3-11 to 3-44 are holding capacitors, and 4-11 to 4-44 are thin film transistors forming switching elements.

Further, 5-1 to 5-4 are data buses, 6-
Reference numerals 1 to 6-4 denote gate buses, and reference numerals 7-1 to 7-4 denote cross capacitances between the data buses 5-1 to 5-4 and a counter substrate (common electrode substrate), gate buses 6-1 to 6-4, and the like. It is a certain data bus equivalent capacity. The actual number of data buses is 30
The actual number of gate buses is about 1000, and the number of gate buses is about 1000.

Reference numeral 8 denotes a data driver for driving the data buses 5-1 to 5-4, and 9-1 to 9-4 denote liquid crystal capacitors 2 to 5.
A changeover switch element 10 for AC-driving 11 to 2-44 is a gate driver for driving the gate buses 6-1 to 6-4.

FIG. 12 is a diagram showing a range of data voltages output from the data driver 8 to the data buses 9-1 to 9-4. FIG. 13 is a diagram showing one voltage waveform of the data buses 9-1 to 9-4. FIG. 12 is a diagram showing an example. In the conventional liquid crystal display device shown in FIG. 11, a liquid crystal having a low threshold voltage is used as a liquid crystal.
AC drive in the range of 5V, equivalent data bus equivalent capacity 7-1
7-4, charging and discharging are repeated every horizontal period (about 20 μs).

If the number of data buses is 3000, the average current I flowing from the power supply for charging and discharging the data bus equivalent capacitances 7-1 to 7-3000 is equal to the data bus equivalent capacitances 7-1 to 7-7. The total capacity value of -3000 is C
[F], the total charge amount charged to the data bus equivalent capacitances 7-1 to 7-3000 is Q [C], the charging cycle is T [s],
Assuming that the voltage charged in the data bus equivalent capacitors 7-1 to 7-3000 is V [V], I = Q / T = CV / T = 100 pF × 3000 lines × 5 V / (20 μs × 2) = 37.5 mA Becomes

Therefore, assuming that the power supply voltage is 5V, the power consumed for charging and discharging the data bus equivalent capacitances 7-1 to 7-3000 is 5V × 37.5mA = 0.19W.

When a liquid crystal having a low threshold voltage is not used, the voltage amplitude required to charge the liquid crystal capacitance is 10 V _PP, so that the current is doubled, the voltage is doubled, and the power consumption is quadrupled. 0.75W.

On the other hand, when the power consumption is reduced by using a liquid crystal having a low threshold voltage, the power consumption of the driver IC itself and the power of the entire driving circuit including the control circuit are about 0.4 W.
And about 2 W including the backlight.

[0010]

In recent years, a reflection type color liquid crystal display device has been realized. However, since a reflection type color liquid crystal display device does not require a backlight, it is possible to greatly reduce power consumption. For example, since a portable information terminal is desired to be used for a long time with a small battery, it is necessary to further reduce the power in a reflective color liquid crystal display device used for a portable information terminal and the like. .

In the conventional liquid crystal display device shown in FIG. 11, since the liquid crystal capacitors 2-11 to 2-44 must be driven by an alternating current, the data buses 5-1 to 5-4 are always charged and discharged. Although it must be repeated, the power consumption of the backlight has been about five times the power consumption of the entire drive circuit, so that the power for charging / discharging the data buses 5-1 to 5-4 does not matter at all. Was.

However, in the reflection type color liquid crystal display device, the data bus 5 to the power consumption of the whole drive circuit is not used.
The ratio of the power for charging / discharging the data buses 1-5-4 is large, and in order to further reduce the power, it is necessary to reduce the power for charging / discharging the data buses 5-1-5-4.

When the driving frequency (frame rate) is reduced, the power consumption can be reduced. However, in such a case, the image quality deteriorates due to flickering of the screen. There is a problem that it is.

In view of the foregoing, the present invention provides a display device capable of reducing power without lowering the driving frequency, that is, without lowering the image quality due to flickering of the screen. With the goal.

[0015]

According to the present invention, there is provided a display device comprising charge recovery means for recovering and regenerating charges of a predetermined wiring group formed on a display panel.

According to the present invention, since the charge collection / regeneration means for collecting and regenerating the electric charge of the predetermined wiring group formed on the display panel is provided, the electric charge of the predetermined wiring group conventionally discarded is provided. Can be recovered for regeneration.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIGS.
The first to fourth embodiments of the present invention will be described with an example in which the present invention is applied to a liquid crystal display device. 1, 5, 7, and 9, the same reference numerals are given to portions corresponding to FIG. 11, and the description thereof will not be repeated.

FIG. 1 is a circuit diagram of a part of a first embodiment of the present invention. In the first embodiment of the present invention, data buses 5-1 to 5-
A charge collection / regeneration means 11 for collecting and regenerating the charge of No. 4 is provided, and the rest is configured similarly to the conventional liquid crystal display device shown in FIG.

However, in the first embodiment of the present invention, in the case of the positive drive, the data voltage range is 3.5 to 4.5.
V, the average data voltage is 4 V, and in the case of negative drive, the data voltage range is 0.5 to 1.5 V, and the average data voltage is 1 V.
It is explained as. 2nd Embodiment of this invention mentioned later-
The same applies to the fourth embodiment. Incidentally, reference numeral 12 denotes a battery constituting the power storage circuit.

In the charge recovery / regeneration means 11, 13 is a charge recovery wiring, 14 is a charge discharge control signal wiring for transmitting a charge discharge control signal S1, and 15-1 to 15-4 are turned on and off by the charge discharge control signal S1. Is a connection switch element to be controlled.

The connection switching elements 15-1 to 15-
4 denotes data voltage output terminals 16-1 to 16-1 of the data driver 8.
16-4 and the data buses 5-1 to 5-4 are connected and disconnected. The charge discharge control signal wiring 14 and the connection switching elements 15-1 to 15-4 are connected to the data driver 8.
It may be built in the.

The charge discharge control signal S1 is supplied to the data bus 5-
After the drive of 1 to 5-4 shifts from the positive drive to the negative drive, the period until the voltage of the data bus 5-1 to 5-4 becomes substantially 1 V is set to L level, and the other period is set to H level. It is a level.

The connection switch elements 15-1 to 15-
Reference numeral 4 denotes an off state when the charge discharge control signal S1 is at the L level, and an on state when the charge discharge control signal S1 is at the H level.

Reference numeral 17 denotes a charge-discharge control signal line for transmitting a charge-discharge control signal S2; 18-1 to 18-4, thin-film transistors whose on / off are controlled by the charge-discharge control signal S2; and 19, a DC-DC converter It is.

The charge recovery wiring 13, the charge discharge control signal wiring 17, and the thin film transistors 18-1 to 18-4
Are the charge discharge control signal line 14 and the connection switch element 1
It may be incorporated in the data driver 8 together with 5-1 to 15-4.

The charge discharge control signal S2 is supplied to the data bus 5-
After the driving of 1 to 5-4 shifts from the positive driving to the negative driving, the period until the voltage of the data bus 5-1 to 5-4 becomes 1 V is set to the H level, and the other period is set to the L level. Things.

The thin film transistors 18-1 to 18-
Reference numeral 4 denotes an on state when the charge discharge control signal S2 = H level, and an off state when the charge discharge control signal S2 = L level.

FIG. 2 is a circuit diagram showing a configuration of the DC-DC converter 19. 2, 20 and 21 are input terminals, 2
Reference numerals 2 and 23 denote output terminals, 24 denotes a transformer, and 25 denotes a field-effect transistor serving as a switching element for converting an input current due to charges collected from the data buses 5-1 to 5-4 into a high-frequency current.

Reference numeral 26 denotes a control circuit for controlling the switching of the field effect transistor 25; 27, a capacitor for stabilizing the input voltage; 28, a diode as a rectifying element;
29 is a capacitor forming a smoothing circuit.

The control circuit 26 includes data buses 5-1 to 5-
At the time of charge recovery from the FET 4, the field-effect transistor 25 is turned on so that the voltage between the input terminals 20 and 21 becomes approximately 1V.
It controls off. FIG. 3 shows the control circuit 26.
3A shows a case where the input voltage is high, and FIG. 3B shows a case where the input voltage is appropriate.

That is, the control circuit 26 operates when the input voltage of the DC-DC converter 19 is high (when the input current is large).
In order to increase the output current by increasing the ON / OFF rate of the field effect transistor 25, when the input voltage of the DC-DC converter 19 is low (when the input current is small), the ON state of the field effect transistor 25 is turned on. / OFF rate to reduce the output current, input terminal 2
Control is performed so that the voltage between 0 and 21 becomes approximately 1V.

FIG. 4 is a time chart showing an operation example of the first embodiment of the present invention, and FIG.
1, FIG. 4B is a charge discharge control signal S2, FIG. 4C is an on / off state of the connection switch elements (SW) 15-1 to 15-4, and FIG. 4D is a thin film transistor (TFT) 18-1 to 1
8-4 ON / OFF state, FIG. 4E shows data bus (DB)
5 shows voltages 5-1 to 5-4.

That is, in the first embodiment of the present invention,
When the drive of the data buses 5-1 to 5-4 shifts from the positive polarity drive to the negative polarity drive, the charge discharge control signal S1 = L level, the connection switching elements 15-1 to 15-4 = OFF, and the charge discharge control signal S2 = H level, thin film transistor 18
−1 to 18-4 = ON.

As a result, the electric charges charged in the data buses 5-1 to 5-4 become thin film transistors 18-1 to 18-4.
-4 and the charge recovery wiring 13 to the DC-DC converter 19 to discharge the data buses 5-1 to 5-4, and the output charge of the DC-DC converter 19 to the battery 12. Supplied.

When the voltage of the data buses 5-1 to 5-4 drops to approximately 1 V, which is the voltage between the input terminals 20 and 21 of the DC-DC converter 19, the charge discharge control signal S1
= H level, connection switch elements 15-1 to 15-4 = O
N, the charge discharge control signal S2 = L level, and the thin film transistors 18-1 to 18-4 = OFF.

As a result, the data buses 5-1 to 5-4 are
Driven by the data driver 8, the data buses 5-1 to 5-1
The voltage of 5-4 finally becomes the value of the negative polarity data voltage output from the data driver 8.

As described above, according to the first embodiment of the present invention, when the data buses 5-1 to 5-4 are driven with a negative polarity,
The electric charges on the data buses 5-1 to 5-4 which have been discarded in the related art can be collected and regenerated in the battery 12 via the DC-DC converter 19, so that the data bus 5-1 can be used.
With respect to a liquid crystal display device that drives .about.5-4 with the same polarity, low power can be achieved without lowering the driving frequency, that is, without lowering the image quality due to flickering of the screen.

In the first embodiment of the present invention,
In order to connect and disconnect the data driver 8 and the data buses 5-1 to 5-4, the connection switch elements 15-1 to 15-1 are connected.
Although the case where 15-4 is provided has been described,
The connection switch elements 15-1 to 15-4 may not be provided.

FIG. 5 and FIG. 6 FIG. 5 is a circuit configuration diagram of a part of a second embodiment of the present invention. In the second embodiment of the present invention, data buses 5-1 to 5-
A charge collecting / regenerating means 30 for collecting and regenerating the electric charge of No. 4 is provided, and the rest is configured similarly to the conventional liquid crystal display device shown in FIG. Note that 31
Is a battery constituting a charge storage circuit.

In the charge recovery / regeneration means 30, reference numeral 32 denotes a charge recovery wiring, 33 denotes a charge / discharge control signal line for transmitting a charge / discharge control signal S3, and 34-1 to 34-4 denote charge / discharge control signals S3. This is a connection switch element whose on / off is controlled.

The connection switch elements 34-1 to 34-34
4 denotes data voltage output terminals 16-1 to 16-1 of the data driver 8.
16-4 and the data buses 5-1 to 5-4 are connected and disconnected. The charge / discharge control signal wiring 33 and the connection switching elements 34-1 to 34-4 are built in the data driver 8. You may do it.

The charge / discharge control signal S3 is supplied to the data bus 5
After the driving of −1 to 5-4 shifts from the positive driving to the negative driving, a period until the voltage of the data bus 5-1 to 5-4 becomes almost 1 V, and the data bus 5-1 to 5 -4 is changed from the negative polarity drive to the positive polarity drive, and is maintained at the L level during a period until the voltage of the data bus 5-1 to 5-4 becomes substantially 4 V, and at the H level during the other periods. It is.

The connection switch elements 34-1 to 34-34
Reference numeral 4 denotes an off state when the charge / discharge control signal S3 = L level, and an on state when the charge / discharge control signal S3 = H level.

Reference numeral 35 denotes a charge / discharge control signal line for transmitting a charge / discharge control signal S4, and reference numerals 36-1 to 36-4 denote thin film transistors whose on / off are controlled by the charge / discharge control signal S4.

The charge collection wiring 32, the charge / discharge control signal wiring 35, and the thin film transistors 36-1 to 36-36.
4 may be incorporated in the data driver 8 together with the charge / discharge control signal wiring 33 and the connection switching elements 34-1 to 34-4.

The charge / discharge control signal S 4 is supplied to the data bus 5
After the driving of −1 to 5-4 shifts from the positive driving to the negative driving, a period until the voltage of the data bus 5-1 to 5-4 becomes almost 1 V, and the data bus 5-1 to 5 -4 is at the H level during the period from when the drive of the negative polarity is changed to the drive of the positive polarity, until the voltage of the data bus 5-1 to 5-4 becomes substantially 4 V, and at the L level during the other periods. It is.

The thin film transistors 36-1 to 36-36
Reference numeral 4 denotes an on state when the charge / discharge control signal S4 = H level, and an off state when the charge / discharge control signal S4 = L level.

Further, reference numeral 37 denotes a DC-D shown in FIG. 1 (FIG. 2).
This is a DC-DC converter configured similarly to the C converter 19, where 38 and 39 are input terminals, and 40 and 41 are output terminals. In the second embodiment of the present invention,
Control is performed so that the voltage between the input terminals 38 and 39 of the DC-DC converter 37 becomes 1V.

Reference numeral 42 denotes a power supply voltage input terminal for inputting a power supply voltage of 5 V. Reference numerals 43 and 44 denote switching switch elements whose switching operations are controlled by a charge / discharge control signal S5. , Data bus 5-
After the driving of 1 to 5-4 shifts from the positive driving to the negative driving, the period until the voltage of the data bus 5-1 to 5-4 becomes 1 V is set to the H level, and the other period is set to the L level. It is said that.

The switch element 43 is connected to a node 43A.
Is connected to the input terminal 38 of the DC-DC converter 37, the node 43B is connected to the power supply voltage input terminal 42,
The node 43C is connected to the charge collection wiring 32,
When the charge / discharge control signal S5 = H level,
The node 43A is connected to the node 43C, and when the charge / discharge control signal S5 is at L level, the node 43A is connected to the node 43B.

The changeover switch element 44 has a node 44A connected to the input terminal 39 of the DC-DC converter 37, a node 44B connected to the charge recovery wiring 32, and a node 44C grounded. When the control signal S5 = H level, the node 44A is connected to the node 44C, and when the charge / discharge control signal S5 = L level, the node 44A is connected to the node 44B.

FIG. 6 is a time chart showing an operation example of the second embodiment of the present invention. FIG. 6A is a charge / discharge control signal S3, FIG. 6B is a charge / discharge control signal S4, and FIG. The signal S5 and FIG.
W) ON / OFF state of 34-1 to 34-4, FIG. 6E shows ON / OFF of thin film transistors (TFT) 36-1 to 36-4,
OFF state, FIG. 6F shows data buses (DB) 5-1 to 5-4.
Are shown.

That is, in the second embodiment of the present invention,
When the driving of the data buses 5-1 to 5-4 shifts from the positive driving to the negative driving, the charge / discharge control signal S3 = L level, the connection switch elements 34-1 to 34-4 = OFF,
The charge / discharge control signal S4 = H level, and the thin film transistors 34-1 to 34-4 = ON.

Further, the charge / discharge control signal S5 is set to the H level, and in the changeover switch element 43, the node 4
3A and 43C are connected, and in the switching element 44, the nodes 44A and 44C are connected.

As a result, the electric charges charged in the data buses 5-1 to 5-4 are transferred to the thin film transistors 36-1 to 36-3.
-4 and the electric charge recovery wiring 32, the electric power is supplied to the DC-DC converter 37, the electric charges of the data buses 5-1 to 5-4 are discharged, and the output electric charge of the DC-DC converter 37 is supplied to the battery 31. Supplied.

When the voltage of the data buses 5-1 to 5-4 drops to approximately 1 V, which is the voltage between the input terminals 38 and 39 of the DC-DC converter 37, the charge / discharge control signal S
3 = H level, connection switch elements 34-1 to 34-4 =
ON, the charge / discharge control signal S4 = L level, and the thin film transistors 36-1 to 36-4 = OFF.

As a result, the data buses 5-1 to 5-4 are
Driven by the data driver 8, the data buses 5-1 to 5-1
The voltage of 5-4 finally becomes the value of the negative polarity data voltage output from the data driver 8.

Further, the charge / discharge control signal S5 is set to L level, and the switching switch element 43
3A and 43B are connected, and in the switching element 44, the nodes 44A and 44B are connected.

Thereafter, when the driving of the data buses 5-1 to 5-4 shifts from the negative driving to the positive driving, the charge / discharge control signal S3 = L level, the connection switch element 34-1
34-4 = OFF, the charge / discharge control signal S4 = H level, and the thin film transistors 36-1 to 36-4 = ON.

As a result, the power supply voltage input terminal 42 and the switch element 4 are connected to the data buses 5-1 to 5-4.
3, DC-DC converter 37, changeover switch element 4
4. Charge recovery wiring 32 and thin film transistor 36-1
Supply of electric charge is performed via 〜36-4.

Then, when the voltage of the data buses 5-1 to 5-4 rises from the power supply voltage 5V to approximately 4V, which is lower by approximately 1V which is the voltage between the input terminals 38 and 39 of the DC-DC converter 37, Charge / discharge control signal S3 = H level, connection switching elements 34-1 to 34-4 = ON, charge / discharge control signal S4 = L level, thin film transistor 36
−1 to 36-4 = OFF.

As a result, the data buses 5-1 to 5-4 are
Driven by the data driver 8, the data buses 5-1 to 5-1
The voltage of 5-4 finally becomes the value of the positive data voltage output from the data driver 8.

As described above, according to the second embodiment of the present invention, when the data buses 5-1 to 5-4 are driven to have a negative polarity, the data buses 5-1 to 5-4 which have been discarded in the prior art are discarded. Of the battery 3 via the DC-DC converter 37
1 and can be regenerated.

When the data buses 5-1 to 5-4 are driven to have a positive polarity, the data driver 8 is not used and the DC-DC converter 37 having a small power loss is used, and the average voltage of the positive data voltage is used. Can be charged to approximately 4 V, so that power consumption by the data driver 8 can be reduced.

Therefore, according to the second embodiment of the present invention, there is provided a liquid crystal display device which drives the data buses 5-1 to 5-4 with the same polarity without lowering the driving frequency, ie,
The power consumption can be reduced without causing a decrease in image quality due to flickering of the screen.

In the second embodiment of the present invention,
In order to connect and disconnect the data driver 8 and the data buses 5-1 to 5-4, the connection switch elements 34-1 to 34-1 are connected.
Although the case where 34-4 is provided has been described,
The connection switch elements 34-1 to 34-4 may not be provided.

FIG. 7 and FIG. 8 FIG. 7 is a circuit configuration diagram of a part of a third embodiment of the present invention. The third embodiment of the present invention is based on the conventional liquid crystal display shown in FIG. A data driver 45 having a different circuit configuration from the data driver 8 provided in the device is provided, and
Charge recovery / regeneration means 4 for recovering and recovering electric charges of .about.5-4
6 are provided, and the others are configured in the same manner as the conventional liquid crystal display device shown in FIG. Reference numeral 47 denotes a battery constituting the charge storage circuit.

The data driver 45 is adapted to drive the odd-numbered data buses 5-1 and 5-3 and the even-numbered data bus 5-5.
The configuration is such that the data voltages are output so that the driving polarities of -2 and 5-4 are reversed, and the other configuration is the same as that of the data driver 8 shown in FIG.

In the charge collecting / regenerating means 46, 4
Reference numerals 8 and 49 denote charge collection lines, 50 denotes a charge / discharge control signal line for transmitting a charge / discharge control signal S6, and 51-1 to 5-5.
1-4 are connection switching elements that are turned on and off by the charge / discharge control signal S6.

The connection switch elements 51-1 to 51-
4 is a data voltage output terminal 16-1 of the data driver 45.
16-4 and the data buses 5-1 to 5-4 are connected and disconnected. The charge / discharge control signal wiring 50 and the connection switch elements 51-1 to 51-4 are connected to the data driver 45. It may be built-in.

The charge / discharge control signal S6 is transmitted to the data bus 5
After the driving of −1 to 5-4 shifts from the positive driving to the negative driving, a period until the voltage of the data bus 5-1 to 5-4 becomes almost 1 V, and the data bus 5-1 to 5 -4 is changed from the negative polarity drive to the positive polarity drive, and is maintained at the L level during a period until the voltage of the data bus 5-1 to 5-4 becomes substantially 4 V, and at the H level during the other periods. It is.

The connection switch elements 51-1 to 51-
Reference numeral 4 denotes an off state when the charge / discharge control signal S6 = L level, and an on state when the charge / discharge control signal S6 = H level.

Reference numeral 52 denotes a charge / discharge control signal line for transmitting a charge / discharge control signal S7, and reference numerals 53-1 to 53-4 denote thin film transistors whose on / off are controlled by the charge / discharge control signal S7.

The charge collection lines 48 and 49, the charge / discharge control signal line 52, and the thin film transistors 53-1 to 53-1
53-4 is the data driver 4 together with the charge / discharge control signal wiring 50 and the connection switch elements 51-1 to 51-4.
5 may be incorporated.

The charge / discharge control signal S7 is transmitted to the data bus 5
After the driving of −1 to 5-4 shifts from the positive driving to the negative driving, a period until the voltage of the data bus 5-1 to 5-4 becomes almost 1 V, and the data bus 5-1 to 5 -4 is at the H level during the period from when the drive of the negative polarity is changed to the drive of the positive polarity, until the voltage of the data bus 5-1 to 5-4 becomes substantially 4 V, and at the L level during the other periods. It is.

The thin film transistors 53-1 to 53-
Reference numeral 4 denotes an on state when the charge / discharge control signal S7 = H level, and an off state when the charge / discharge control signal S7 = L level.

Also, reference numerals 54 and 55 denote the D shown in FIG. 1 (FIG. 2).
DC-DC configured similarly to C-DC converter 19
In the DC-DC converter 54, 56 and 57 are input terminals, 58 and 59 are output terminals, and D
In the C-DC converter 55, 60 and 61 are input terminals, and 62 and 63 are output terminals.

Incidentally, also in the third embodiment of the present invention,
The voltage between the input terminals 56 and 57 of the DC-DC converter 54 is controlled to be 1V, and the voltage between the input terminals 60 and 61 of the DC-DC converter 55 is controlled to be 1V.

Reference numerals 64 and 65 denote power supply voltage input terminals for inputting a power supply voltage of 5 V. Reference numerals 66 to 69 denote switching switch elements whose switching operation is controlled by a charge / discharge control signal S8.

The switch element 66 is connected to a node 66A.
Is connected to the input terminal 56 of the DC-DC converter 54, the node 66B is connected to the power supply voltage input terminal 64,
The node 66C is connected to the charge collection wiring 48,
When the charge / discharge control signal S8 = H level,
The node 66A is connected to the node 66C, and when the charge / discharge control signal S8 is at L level, the node 66A is connected to the node 66B.

The changeover switch element 67 has a node 67A connected to the input terminal 57 of the DC-DC converter 54, a node 67B connected to the charge collection wiring 48, and a node 67C grounded. When control signal S8 = H level, node 67A is connected to node 67C, and when charge / discharge control signal S8 = L level, node 67A is connected to node 67B.

The changeover switch element 68 has a node 68A connected to the input terminal 60 of the DC-DC converter 55, a node 68B connected to the power supply voltage input terminal 65, and a node 68C connected to the charge collection wiring 49. When the charge / discharge control signal S8 = H level, the node 68A is connected to the node 68B. When the charge / discharge control signal S8 = L level, the node 68A is connected.
A is connected to the node 68C.

The changeover switch element 69 has a node 69A connected to the input terminal 61 of the DC-DC converter 55, a node 69B connected to the charge collection wiring 49, and a node 69C grounded. When the control signal S8 = H level, the node 69A is connected to the node 69B. When the charge / discharge control signal S8 = L level, the node 69A is connected to the node 69C.

FIG. 8 is a time chart showing an operation example of the third embodiment of the present invention. FIG. 8A is a charge / discharge control signal S6, FIG. 8B is a charge / discharge control signal S7, and FIG. The signal S8 and FIG.
W) ON / OFF state of 51-1 to 51-4, FIG. 8E shows ON / OFF of thin film transistors (TFT) 53-1 to 53-4,
OFF state, FIG. 8F shows data buses (DB) 5-1 and 5-3.
FIG. 8G shows the voltages of the data buses (DB) 5-2 and 5-4.

That is, in the third embodiment of the present invention,
When the driving of the data buses 5-1 and 5-3 shifts from the positive polarity driving to the negative polarity driving, and the driving of the data buses 5-2 and 5-4 shifts from the negative polarity driving to the positive polarity driving, the electric charge is charged. Discharge control signal S6 = L level, connection switch element 51
-1 to 51-4 = OFF, charge / discharge control signal S7 = H
Level, thin film transistors 53-1 to 53-4 = ON.

Further, the charge / discharge control signal S8 is set to the H level, and the changeover switch element 66
6A and 66C are connected, the switching element 67 is connected between the nodes 67A and 67C, the switching element 68 is connected between the nodes 68A and 68B, the switching element 69 is the node 69A, 69B are connected.

As a result, the electric charges charged in the data buses 5-1 and 5-3 become thin film transistors 53-1 and 53-3.
-3 and the charge recovery wiring 48 to the DC-DC converter 54 to discharge the data buses 5-1 and 5-3, and to output the charge of the DC-DC converter 54 to the battery 47. Supplied.

Further, the power supply voltage input terminal 65, the changeover switch element 68,
DC-DC converter 55, changeover switch 69, charge recovery wiring 49, and thin film transistors 53-2, 53-
The supply of electric charge is carried out via 4.

Then, the voltage of the data buses 5-1 and 5-3 drops to approximately 1 V, which is the voltage between the input terminals 56 and 57 of the DC-DC converter 54, and the data buses 5-2 and 5-4
Rises from the power supply voltage 5V to approximately 4V, which is a voltage lower by approximately 1V which is the voltage between the input terminals 60 and 61 of the DC-DC converter 55, the charge / discharge control signal S6 =
H level, connection switch elements 51-1 to 51-4 = O
N, the charge / discharge control signal S7 = L level, and the thin film transistors 53-1 to 53-4 = OFF.

As a result, the data buses 5-1 and 5-3 are
Driven by the data driver 45, the data bus 5-
The voltages 1, 5 and 3 finally become negative data voltages output from the data driver 45, and the data buses 5-2 and 5-4 are driven by the data driver 45, The voltages of the buses 5-2 and 5-4 eventually become positive data voltage values output from the data driver 45.

Further, the charge / discharge control signal S8 is set to L level, and the changeover switch element 66
6A and 66B are connected, in the switching element 67, the nodes 67A and 67B are connected, in the switching element 68, the nodes 68A and 68C are connected, and in the switching element 69, the nodes 69A and A connection state is established between 69C.

Thereafter, the drive of the data buses 5-1 and 5-3 shifts from the negative drive to the positive drive, and the drive of the data buses 5-2 and 5-4 shifts from the positive drive to the negative drive. In this case, the charge / discharge control signal S6 = L level,
Connection switch elements 51-1 to 51-4 = OFF, charge / discharge control signal S7 = H level, thin film transistor 53-
1-53-4 = ON.

As a result, the power supply voltage input terminal 64 and the switch element 6 are connected to the data buses 5-1 and 5-3.
6, DC-DC converter 54, changeover switch 67,
Charge collection wiring 48 and thin film transistors 53-1 and 53-1
Supply of electric charge is performed via 3-3.

The electric charges charged in the data buses 5-2 and 5-4 are transferred to the thin film transistors 53-2 and 53-4.
Then, the charge is supplied to the DC-DC converter 55 via the charge collection wiring 49 to discharge the data buses 5-2 and 5-4, and the output charge of the DC-DC converter 55 is supplied to the battery 47. You.

Then, the voltage of the data buses 5-1 and 5-3 rises from the power supply voltage 5V to about 4V which is a voltage lower by about 1V which is a voltage between the input terminals 56 and 57 of the DC-DC converter 54, When the voltage of the data bus 5-2, 5-4 is D
When the voltage drops to approximately 1 V, which is the voltage between the input terminals 60 and 61 of the C-DC converter 55, the charge / discharge control signal S6 =
H level, connection switch elements 51-1 to 51-4 = O
N, the charge / discharge control signal S7 = L level, and the thin film transistors 53-1 to 53-4 = OFF.

As a result, the data buses 5-1 and 5-3 are
Driven by the data driver 45, the data bus 5-
The voltages 1, 5 and 3 finally become positive data voltages output from the data driver 45, and the data buses 5-2 and 5-4 are driven by the data driver 45, The voltages of the buses 5-2 and 5-4 eventually become negative data voltage values output from the data driver 45.

As described above, according to the third embodiment of the present invention, when the data buses 5-1 and 5-3 are driven with the negative polarity,
The electric charges of the data buses 5-1 and 5-3, which were conventionally discarded, can be collected and regenerated by the battery 47 via the DC-DC converter 54, and the data buses 5 and 5-3 can be regenerated.
In the case of driving the electrodes 2 and 5-4 with the negative polarity, the electric charges of the data buses 5-2 and 5-4, which were conventionally discarded, can be recovered to the battery 47 via the DC-DC converter 55 and regenerated.

When the data buses 5-1 and 5-3 are driven with a positive polarity, the average value of the positive polarity data voltage is obtained by using the DC-DC converter 54 having a small power loss without using the data driver 45. When driving the data buses 5-2 and 5-4 with positive polarity, the DC-DC converter 55 with small power loss is used without using the data driver 45. Since the battery can be charged to approximately 4 V, which is the average value of the positive polarity data voltage, power consumption by the data driver 45 can be reduced.

Therefore, according to the third embodiment of the present invention, the liquid crystal in which the driving polarities of the odd-numbered data buses 5-1 and 5-3 and the even-numbered data buses 5-2 and 5-4 are reversed. With regard to the display device, power consumption can be reduced without lowering the driving frequency, that is, without lowering the image quality due to screen flicker.

In the third embodiment of the present invention,
In order to connect and disconnect the data driver 45 and the data buses 5-1 to 5-4, the connection switch elements 51-1 to 51-1 are connected.
The case where 51-4 is provided has been described,
The connection switch elements 51-1 to 51-4 may not be provided.

Fourth Embodiment FIG. 9 and FIG. 10 FIG. 9 is a circuit configuration diagram of a part of the fourth embodiment of the present invention.
4 and a charge collection / regeneration means 70 for collecting and regenerating charges of the gate buses 6-1 to 6-4, and the other configuration is the same as that of the conventional liquid crystal display device shown in FIG. . Incidentally, reference numeral 71 denotes a battery constituting the charge storage circuit.

The charge recovery / regeneration means 70 is connected to the gate bus 6
In order to collect and regenerate the electric charges 1 to 6-4, the thin film transistors 72-1 to 72-4 and the electric charge collecting wiring 73
And a DC-DC converter 74, and the other configuration is the same as that of the charge recovery / regeneration means 30 shown in FIG.

Here, the thin film transistors 72-1 to 72-2
Reference numeral -4 denotes on / off controlled by the charge discharge control signal S9, and may be configured to be built in the gate driver 10. In the gate driver 10, 75-1 to 75-4 are connection switch elements for sequentially outputting a gate voltage (20 V) required for scanning to the gate buses 6-1 to 6-4 in order.

Further, the DC-DC converter 74 is the same as that shown in FIG.
It has the same configuration as the DC-DC converter 19 shown in FIG. 2 (see FIG. 2), where 76 and 77 are input terminals, and 78 and 79 are output terminals.

FIG. 10 is a time chart showing an operation example of the fourth embodiment of the present invention. FIG. 10A is a charge discharge control signal S9, and FIG. 10B is a thin film transistor (TFT).
2, FIG. 10C shows the voltage of the gate bus (GB) 6-2, FIG.
10D is a charge discharge control signal S3, FIG. 10E is a charge discharge control signal S4, FIG.
Is the on / off state of the connection switch elements (SW) 34-1 to 34-4, and FIG. 10H is a thin film transistor (TFT).
FIG. 10I shows the voltages of the data buses (DB) 5-1 to 5-4.

That is, in the fourth embodiment of the present invention,
Collection of charges on the data buses 5-1 to 5-4 when the data buses 5-1 to 5-4 are driven with a negative polarity, and data bus 5- when the data buses 5-1 to 5-4 are driven with a positive polarity. The supply of the electric charges to 1 to 5-4 is performed in the same manner as in the case of the second embodiment of the present invention shown in FIG.

Further, the thin film transistor 72-i (however,
i = 1, 2, 3, 4) are turned on for a certain period when the connection switch element 75-i is turned off, and as a result, the gate bus 6-i shifts from the selected time to the non-selected time. ,
The charge of the data bus 5-i, which was conventionally discarded, is transferred to DC-
The battery can be recovered to the battery 71 via the DC converter 74 and regenerated.

Therefore, according to the fourth embodiment of the present invention, a liquid crystal display device that drives the data buses 5-1 to 5-4 with the same polarity is intended to achieve lower power consumption than in the second embodiment of the present invention. be able to.

In the fourth embodiment of the present invention,
In order to connect and disconnect the data driver 8 and the data buses 5-1 to 5-4, the connection switch elements 34-1 to 34-1 are connected.
Although the case where 34-4 is provided has been described,
The connection switch elements 34-1 to 34-4 may not be provided.

Also, in the first to fourth embodiments of the present invention, the case where the output charge of the DC-DC converter is recovered to the battery and regenerated is described. The output charge of the DC converter may be supplied to a power consuming circuit for regeneration.

The third embodiment of the present invention may be configured to add a means for recovering the electric charge of the gate bus provided in the fourth embodiment of the present invention. Therefore, it is possible to achieve lower power consumption than in the third embodiment of the present invention.

In the first to fourth embodiments of the present invention, the case where the present invention is applied to a liquid crystal display device is described as an example, but the present invention is also applied to a plasma display device and the like. be able to.

Also, in the first to fourth embodiments of the present invention, the DC-DC converters 19, 37, 5
The case where the voltage between the input terminals 4 and 55 is controlled to be 1 V has been described.
The average voltage of the data voltage may be checked, and control may be performed so as to set the average voltage. In this case, the data buses 5-1 to 5-4 are connected to the data drivers 8 and 45. The rate of charging can be reduced and efficiency can be increased.

Also, in the first to fourth embodiments of the present invention, the DC-DC converters 19, 37, 5
The case where the voltage between the input terminals 4 and 55 is controlled to be 1 V has been described.
The average voltage of the display data is checked, and the DC-DC converter 1
The voltage between the input terminals 9, 37, 54 and 55 may be controlled so as to be the average voltage of the display data. In this case, the data buses 5-1 to 5-5-
4 can be reduced by the data drivers 8 and 45, and the efficiency can be increased.

In order to obtain the average voltage of the display data, all the display data may be digitally added and finally divided by the number of display data. In this case, only the predetermined upper bit of the display data is used. May be used. For example, when the display data is 8 bits, the average voltage of the display data may be obtained using only the upper 4 bits.

[0116]

As described above, according to the present invention, the charge collecting / regenerating means for collecting and regenerating the electric charge of the predetermined wiring group formed on the display panel is provided. Since it is possible to collect and regenerate the charge of the predetermined wiring group, without reducing the driving frequency,
That is, it is possible to reduce the power consumption without causing a decrease in image quality due to flickering of the screen.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a part of a first embodiment of the present invention.

FIG. 2 is a circuit diagram illustrating a configuration of a DC-DC converter included in the first embodiment of the present invention.

FIG. 3 is a time chart showing output waveforms of a control circuit constituting a part of the DC-DC converter provided in the first embodiment of the present invention.

FIG. 4 is a time chart illustrating an operation example of the first embodiment of the present invention.

FIG. 5 is a circuit configuration diagram of a part of the second embodiment of the present invention.

FIG. 6 is a time chart showing an operation example of the second embodiment of the present invention.

FIG. 7 is a circuit configuration diagram of a part of a third embodiment of the present invention.

FIG. 8 is a time chart illustrating an operation example of the third embodiment of the present invention.

FIG. 9 is a circuit configuration diagram of a part of a fourth embodiment of the present invention.

FIG. 10 is a time chart illustrating an operation example of the fourth embodiment of the present invention.

FIG. 11 is a circuit configuration diagram of a part of an example of a conventional liquid crystal display device.

12 is a diagram showing a range of a data voltage output from a data driver to a data bus in the conventional liquid crystal display device shown in FIG.

FIG. 13 is a diagram showing an example of a voltage waveform of a data bus in the conventional liquid crystal display device shown in FIG.

[Explanation of symbols]

 5-1 to 5-4 Data bus 6-1 to 6-4 Gate bus 13, 32, 48, 49, 73 Wiring for charge recovery

Claims (13)

[Claims] 1. A display device comprising charge recovery means for recovering and regenerating charges of a predetermined wiring group provided on a display panel. 2. The display device according to claim 1, wherein said display panel is a liquid crystal display panel. 3. The charge collection / regeneration means collects and regenerates charges of a data bus group provided on the display panel, and includes a charge collection wiring, and each data bus of the data bus group. 3. The display device according to claim 1, further comprising a first connection switch element group for connecting and disconnecting with the charge collection wiring. 4. 4. The charge collection / regeneration means has a second connection switch element group for connecting and disconnecting each data bus of the data bus group to a data bus drive circuit, and driving the data bus group. Is controlled such that the connection switch elements of the first connection switch element group are turned on and the connection switch elements of the second connection switch element group are turned off for a certain period after the transition from the positive drive to the negative drive. The display device according to claim 3, wherein: 5. A DC for supplying a charge collected from the data bus group through the first connection switch element group and the charge collection wiring, and supplying an output charge to a power storage circuit or a power consumption circuit. The display device according to claim 3, further comprising a DC converter. 6. The charge recovery unit according to claim 1, wherein the charge recovery unit recovers and recovers the electric charges of the first and second data bus groups provided on the liquid crystal display panel, the driving polarities being reversed. And a second charge collection / regeneration means, wherein the first charge collection / regeneration means includes a first charge collection wiring, each data bus of the first data bus group, and the first charge collection line.
A first connection switch element group for connection and disconnection with the electric charge collection wiring, and a second connection for connection and disconnection between each data bus of the first data bus group and the data bus drive circuit. A switch element group, and the connection switch elements of the first connection switch element group are turned on for a certain period after the drive of the first data bus group shifts from the positive drive to the negative drive. The connection switch elements of the second connection switch element group are controlled to be turned off, and the second charge collection and regenerating means includes a second charge collection wiring and each data bus of the second data bus group. The second
A third connection switch element group for connecting / disconnecting to / from the charge collection wiring, and a fourth connection / disconnection between each data bus of the second data bus group and the data bus driving circuit. A connection switch element group, and the connection switch elements of the third connection switch element group are turned on for a certain period after the drive of the second data bus group shifts from positive drive to negative drive. The display device according to claim 1, wherein the connection switch elements of the fourth connection switch element group are controlled to be turned off. 7. An electric charge collected from the first data bus group through the first connection switch element group and the first charge collecting wiring, and the output electric charge is stored in a power storage circuit or a power storage circuit. A first DC-DC converter to be supplied to a consumption circuit; and a charge recovered from the second data bus group via the third connection switch element group and the second charge recovery wiring. 7. The display device according to claim 6, further comprising: a second DC-DC converter that supplies an output charge to the power storage circuit or the power consumption circuit. 8. The charge collecting and regenerating means collects and regenerates charges of a gate bus group provided on the display panel, and includes a charge collecting wiring, and a gate bus of the gate bus group. A connection switch element group for connecting to and disconnecting from the charge collection wiring, wherein each connection switch element of the connection switch element group is fixed after a corresponding gate bus shifts from selection to non-selection. The display device according to claim 1, wherein the display device is controlled to be on during a period. 9. A charge collected from each gate bus of said gate bus group via a corresponding connection switch element of said connection switch element group and said charge collection wiring,
D that supplies output charge to a power storage circuit or power consumption circuit
The display device according to claim 8, further comprising a C-DC converter. 10. The charge collection / regeneration means collects and regenerates charges of a data bus group and a gate bus group provided on the display panel, and includes first and second charge collection / regeneration means. The first charge collection / regeneration means includes a first charge collection wiring, and a first connection / disconnection between each data bus of the data bus group and the first charge collection wiring. A connection switch element group, and a second connection switch element group for connecting / disconnecting each data bus of the data bus group to / from a data bus drive circuit, wherein the driving of the data bus group is changed from a positive polarity drive. The connection switch elements of the first connection switch element group are controlled to be turned on and the connection switch elements of the second connection switch element group are turned off for a certain period after the shift to the negative polarity drive, and Charge recovery and recovery means A second charge collection line, and a third connection switch element group for connecting / disconnecting each gate bus of the gate bus group with the second charge collection line; 3. The display according to claim 1, wherein each connection switch element of the connection switch element group is controlled to be turned on for a certain period after the corresponding gate bus shifts from selection to non-selection. apparatus. 11. An electric charge collected from said data bus group through said first connection switch element group and said first electric charge collecting wiring, and output electric charges to a power storage circuit or a power consuming circuit. A first DC-DC converter for supplying, a corresponding connection switch element of the third connection switch element group from each gate bus of the gate bus group, and the second DC-DC converter.
Charge collected through the charge collection wiring of
The display device according to claim 10, further comprising a second DC-DC converter that supplies the output charge to the power storage circuit or the power consumption circuit. 12. The charge recovery unit according to claim 1, wherein the charge recovery unit recovers and recovers charges of the first and second data bus groups and the gate bus group provided on the display panel for reversing the drive polarity. , First, second, and third charge recovery regenerating means, wherein the first charge recovery regenerating means includes a first charge recovery wiring, each data bus of the first data bus group, and 1
A first connection switch element group for connection and disconnection with the electric charge collection wiring, and a second connection for connection and disconnection between each data bus of the first data bus group and the data bus drive circuit. A switch element group, and the connection switch elements of the first connection switch element group are turned on for a certain period after the drive of the first data bus group shifts from the positive drive to the negative drive. The connection switch elements of the second connection switch element group are controlled to be turned off, and the second charge collection and regenerating means includes a second charge collection wiring and each data bus of the second data bus group. The second
A third connection switch element group for connecting / disconnecting to / from the charge collection wiring, and a fourth connection / disconnection between each data bus of the second data bus group and the data bus driving circuit. A connection switch element group, and the connection switch elements of the third connection switch element group are turned on for a certain period after the drive of the second data bus group shifts from positive drive to negative drive. The connection switch elements of the fourth connection switch element group are controlled to be turned off, and the third charge recovery regeneration means includes a third charge recovery wiring, each gate bus of the gate bus group, and And a fifth connection switch element group for making connection and disconnection with the third charge collection wiring, wherein each connection switch element of the fifth connection switch element group is in a non-operating state when the corresponding gate bus is selected. One period after transition at the time of selection The display device according to claim 1 or 2, characterized in that it is controlled to be turned on. 13. An electric charge collected from the first data bus group through the first connection switch element group and the first charge collection wiring, and the output charge is stored in a power storage circuit or a power storage circuit. A first DC-DC converter to be supplied to a consumption circuit; and a charge recovered from the second data bus group via the third connection switch element group and the second charge recovery wiring. A second DC-DC converter for supplying an output charge to a power storage circuit or a power consumption circuit, a corresponding connection switch element of the fifth connection switch element group and the charge recovery from each gate bus of the gate bus group. A third D which inputs the charge collected through the wiring for supply and supplies the output charge to the power storage circuit or the power consuming circuit.
The display device according to claim 12, further comprising a C-DC converter.