JP2000137465A - Video signal processing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce uneven brightness caused by dispersion in light emitting characteristics among plural LEDs arranged as pixels. SOLUTION: This video signal processing circuit is for an LED display device in which plural light emitting diodes are arrayed as pixels, and is provided with correction data generating parts 11-15 for sequentially generating brightness correction data corresponding to each light emitting characteristic of the plural light emitting diodes synchronizing with an input video signal, and a correction circuit 16 for correcting the input video signal based on the brightness correction data generated from the correction data generating parts 11-15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to an LED display device in which a plurality of light emitting diodes (LEDs) are arranged as pixels, and more particularly to an LED display device for displaying an image corresponding to an input video signal. The present invention relates to a video signal processing circuit.

[0002]

2. Description of the Related Art Conventionally, there has been known an LED display device that displays images such as characters, figures, and moving images using a plurality of LEDs. This LED display device generally includes a display panel in which a plurality of LED modules are arranged in the same plane to obtain a desired screen size, and a display panel controller that controls the display panel. Each LED module is composed of a plurality of LEDs arranged in a matrix as pixels. These LEDs are three primary colors of light, red, green and blue,
Or two of these three primary colors, or these three
It is composed of one of the primary colors. When a plurality of colors are used, these LEDs are combined to form a predetermined coloration pattern. The display panel controller controls the display panel to display an image corresponding to a video signal input from a video camera, a computer, or another video signal source.

The display panel controller includes, for example, an input signal processing unit and a display signal generation unit. The input signal processing unit converts the input video signal into a digital format when the input video signal is in an analog format, and further separates horizontal and vertical synchronization from a synchronization signal input together with the input video signal to generate a display timing signal. The display signal generator generates a display signal to be supplied to the display panel based on the digital video signal and the display timing signal obtained from the video signal processor.

[0004]

Incidentally, since the screen of the display panel is constituted by a combination of a plurality of LED modules, brightness unevenness in which the brightness level becomes non-uniform on the screen is likely to occur. In order to reduce the uneven brightness, each LED module is constituted by LEDs having the same light emitting characteristics, but it is not possible to completely eliminate variations in the light emitting characteristics. Further, depending on the type of display panel, it may be possible to make the luminance level uniform by adjusting the LED module unit. However, since there is a limit to this adjustment, when the same luminance or the same color is designated for the entire screen, luminance unevenness becomes conspicuous.

It is an object of the present invention to provide a video signal processing circuit capable of reducing luminance unevenness caused by variations in light emission characteristics of a plurality of LEDs arranged as pixels.

[0006]

According to the present invention, there is provided a video signal processing circuit for an LED display device in which a plurality of light emitting diodes are arranged as pixels, wherein the plurality of light emitting diodes are synchronized with an input video signal. Provided is a video signal processing circuit including a correction data generation unit that sequentially generates luminance correction data respectively corresponding to light emission characteristics, and a correction circuit that corrects an input video signal based on luminance correction data generated from the correction data generation unit. You.

In this video signal processing circuit, even if the light emitting characteristics of the plurality of light emitting diodes vary, the correction circuit corrects the input video signal based on the luminance correction data sequentially generated from the correction data generator. Therefore, even when the same luminance or the same color is designated for the entire screen, the luminance unevenness is inconspicuous, and a more natural display can be performed.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an LED display device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a schematic configuration of the LED display device. The LED display device includes a display panel controller 2 connected to a video signal source 1 such as a video camera, a computer, a character generator, and a graphic generator for generating a digital or analog video signal together with a synchronization signal. An LED display panel 3 to be connected is provided. The display panel controller 2 controls the LED display panel 3 based on a video signal and a synchronization signal input from the video signal source 1. LED display panel 3
Has a plurality of LED modules arranged in the same plane in order to obtain a desired screen size, and displays images such as characters, graphics, and moving images corresponding to the input video signal under the control of the display panel controller 2. Each LED module is composed of a plurality of LEDs arranged in a matrix as pixels. The display panel controller 2 includes an input signal processor 4 and a display signal generator 5 as shown in FIG. When the input video signal is in analog format, the input signal processing unit 4 converts the analog video signal into digital format, and further separates horizontal and vertical synchronization from a synchronization signal input together with the input video signal to generate a display timing signal. The display signal generator 5 generates a display signal for controlling the display panel based on the digital video signal and the display timing signal obtained from the video signal processor 4.

FIG. 2 shows the configuration of the input signal processing section 4 shown in FIG. As shown in FIG. 2, the input signal processing unit 4 includes a signal changeover switch 8, an A / D converter 9, a sync separator 10, a timing generator 11, an address generator 12, a coefficient memory 13, a write switch 14, a coefficient It comprises a generation memory 15 and a signal converter 16. When a digital video signal is input from the video signal source 1 to the input signal processing unit 4, the digital video signal is supplied to the signal changeover switch 8 via the video signal line 113. On the other hand, when an analog video signal is input from the video signal source 1 to the input signal processing unit 4, the analog video signal is A / D-converted via the video signal line 111.
The signal is supplied to a converter 9, converted into a digital format by the A / D converter 9, and further supplied to a signal changeover switch 8 via a video signal line 112. The signal changeover switch 8 performs a changeover operation based on a changeover signal input from outside via a changeover signal line 114. The switching signal is supplied to the video signal line 11 when the digital video signal is input to the input signal processing unit 4.
The signal changeover switch 8 is controlled to output the video signal from the video signal line 3, and the signal changeover switch 8 is controlled to output the video signal from the video signal line 112 when the analog video signal is input to the input signal processing unit 4. I do. The video signal output from the signal changeover switch 8 is supplied to the signal converter 16 via the video signal line 115. The signal converter 16 converts the level of the video signal and supplies the level to the display signal generator 5 via the video signal line 125. This level conversion is performed based on coefficient values sequentially generated from the coefficient generation memory 15 as luminance correction data corresponding to the light emission characteristics of all the LEDs of the LED display panel 3 in synchronization with the input video signal. As a result, the signal converter 16 functions as a correction circuit that corrects the input video signal so as to compensate for variations in the light emission characteristics of all LEDs.

On the other hand, the synchronization signal is input from the video signal source 1 to the input signal processing unit 4 and supplied to the synchronization separator 10 via the synchronization signal line 116. The sync separator 10 separates vertical and horizontal sync components from the input sync signal and supplies the sync signal to the timing generator 11 via the sync signal line 117.
The timing generator 11 generates a reference timing clock synchronized with these synchronous components, supplies the reference timing clock to the LED display timing generator 18 via the clock line 126, and supplies the reference timing clock to the address generator 12 via the clock line 118. Supply. The LED display timing generator 18 synchronizes with this reference timing clock to
A horizontal and vertical scanning timing signal for scanning all the LEDs of the ED display panel is generated.
The signal is supplied to the display signal generation unit 5 via the display unit 27. The address generator 12 generates an address signal which is sequentially updated in response to the reference timing clock from the timing generator 11, and supplies this address signal to the coefficient generation memory 15 via the address signal line 123. Coefficient generation memory 15
Holds a plurality of coefficient values serving as luminance correction data respectively corresponding to the light emission characteristics of all the LEDs of the LED display panel 3 at addresses corresponding to the horizontal and vertical coordinates of the LEDs. Generate a coefficient value held at an address specified in the scanning order.

The coefficient memory 13 is used for writing into the coefficient generation memory 15 and holds a predetermined number of coefficient values slightly different from each other. Write switch 14 is closed when the write mode is set by a write mode signal externally input via write mode signal line 121. In the write mode, the address of the coefficient memory 13 is arbitrarily specified by an address signal supplied from the address generator 12 via the address signal line 119, and the coefficient value read from this address is written via the write switch 14. It is sent to the coefficient generation memory 15 and written to the address of the coefficient generation memory 15 specified by the address generator 12. The writing mode is released after the writing of the coefficient value is completed for all the LEDs of the display panel 3, and accordingly, the writing switch 1
4 is opened.

Hereinafter, the luminance correction using the coefficient values held in the coefficient generation memory 15 will be further described.

FIG. 3 is a graph showing an example of variations in the light emission characteristics of a plurality of LEDs arranged on the display panel 3.
In FIG. 3, a straight line 201 represents the emission characteristic of the brightest first LED among all the LEDs, and straight lines 202 and 20
Reference numeral 3 represents the light emission characteristics of the second and third LEDs, which are darker than the first LED. The maximum luminance level Lmax of each LED is a luminance level obtained when the input video signal is at the maximum level (100%). A straight line 204 represents the light emission characteristics of a reference LED assumed as a reference for luminance correction. This reference LE
The maximum brightness level of D is set as a reference maximum brightness level Lref, which is substantially equal to the average value Lave of the maximum brightness levels of all the LEDs. In FIG. 3, the maximum luminance level Lmax of the brightest first LED among all the LEDs is set to 100%, and the reference maximum luminance level Lref is set to 80% of the maximum luminance level Lmax of the first LED. In this case, the second LE
The maximum luminance level Lmax of D is the reference maximum luminance level Lref
It can be seen that the maximum brightness level Lmax of the third LED is smaller than the reference maximum brightness level Lref. In the coefficient generation memory 15, a plurality of coefficient values K are held for the pixel coordinates (X, Y) of all of the plurality of LEDs arranged on the display panel 3, and the emission characteristics of these LEDs are represented by a straight line 204 of the reference LED. It is used to correct the input video signal so as to match the light emission characteristics. Each coefficient value K
Means that the maximum luminance level Lmax is equal to the reference maximum luminance level Lref
K is set to 1 so as not to perform substantial luminance correction on the LED that is less than K, and K = Lref / to perform substantial luminance correction on the LED whose maximum luminance level Lmax is equal to or greater than the reference maximum luminance level Lref. Lmax is set.

Here, the display panel 3 shown in FIGS.
This will be described more specifically on the basis of the pixel coordinates (X, Y). When the input video signal is maintained at the maximum level (100%), it is specified that the LEDs at all pixel coordinates emit light at the maximum luminance level of 100% as shown in FIG. However, if the light emission characteristics of these LEDs vary, the maximum luminance level Lmax of these LEDs becomes non-uniform as shown in FIG. 5, for example. For this reason, the coefficient generation memory 15 stores the coefficient values K prepared for all pixel coordinates as shown in FIG.
Are sequentially generated in synchronization with the input video signal, and the signal converter 16
Performs level conversion of the input video signal using the coefficient value K generated from the coefficient generation memory 15. As a result, the maximum luminance level of most of the LEDs is adjusted to the reference maximum luminance level Lref of 80% as shown in FIG.

In the above-described LED display device, even if the light emission characteristics of a plurality of LEDs arranged as pixels on the display panel 3 vary, the signal converter 16 operates in the coefficient generation memory 1.
The input video signal is corrected based on the coefficient value generated as the luminance correction data generated from step 5. Therefore, even when the same luminance is designated for the entire screen, luminance unevenness is not noticeable, and a more natural display can be performed.

The present invention is not limited to the above-described embodiment, and can be variously modified without departing from the gist thereof. For example, the signal converter 16 may be configured by a signal conversion multiplier 17 that multiplies an input video signal by a coefficient value as shown in FIG. Further, the signal converter 16 may be constituted by a mapping memory that generates an output signal corresponding to the input video signal and the coefficient value.

The LEDs arranged as pixels on the display panel 3 are constituted by three primary colors of light, red, green and blue, two of these three primary colors, or one of these three primary colors. . Also, pixels for complementary colors, for example, yellow-green,
In some cases, blue and green LEDs are arranged. When a plurality of colors are used, these LEDs are combined to form a predetermined coloration pattern. Incidentally, when correcting the input video signal for each of these colors, the input signal processing unit 4 is redundantly provided according to the number of colors. For example, when a red input signal processing unit, a green input signal processing unit, and a blue input signal processing unit are provided, the red input signal processing unit sets the video signal level of the red pixel to 100% and the video signals of the green and blue pixels. With the signal level set to 0%, the input video signal is corrected as described above. The green input signal processing unit corrects the input video signal as described above, with the video signal level of the green pixel being 100% and the video signal levels of the red and blue pixels being 0%. Further, the blue input signal processor corrects the input video signal as described above, setting the video signal level of the blue pixel to 100% and the video signal levels of the red and green pixels to 0%. As a result, there is no variation in the emission luminance of each color, and there is an effect of improving color unevenness.

[0019]

As described above, according to the present invention, it is possible to provide a video signal processing circuit capable of reducing luminance unevenness caused by variations in light emission characteristics of a plurality of LEDs arranged as pixels.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram illustrating a configuration of an LED display device according to an embodiment of the present invention.

FIG. 2 is a block circuit diagram showing a configuration of an input signal processing unit shown in FIG.

FIG. 3 shows a plurality of LEs arranged on a display panel shown in FIG. 1;
13 is a graph illustrating an example of a variation in light emission characteristics of D.

FIG. 4 shows a plurality of LEs arranged on the display panel shown in FIG.
FIG. 6 is a diagram showing distribution of input video signal levels respectively assigned to D in pixel coordinates.

FIG. 5 is a diagram showing, in pixel coordinates, a distribution of luminance levels obtained from a plurality of LEDs corresponding to the distribution of the input video signal levels shown in FIG. 4;

6 is a diagram showing, in pixel coordinates, a distribution of a plurality of coefficient values prepared for a plurality of LEDs corresponding to the distribution of the luminance level shown in FIG. 5;

7 is a diagram showing, in pixel coordinates, a distribution of luminance levels obtained from a plurality of LEDs as a result of correcting an input video signal using the plurality of coefficient values shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Video signal source 2 ... Display panel controller 3 ... LED display panel 4 ... Input signal processing part 5 ... Display signal generation part 8 ... Signal changeover switch 9 ... A / D converter 10 ... Synchronous separator 11 ... Timing generator 12 ... Address generator 13 ... Coefficient memory 14 ... Write switch 15 ... Coefficient generation memory 16 ... Signal converter 17 ... Multiplier 18 ... LED display timing generator

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[Procedure amendment]

[Submission date] December 27, 1999 (1999.12.
27)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

Claims (6)

[Claims] 1. A video signal processing circuit for an LED display device in which a plurality of light emitting diodes are arranged as pixels,
A correction data generator for sequentially generating brightness correction data corresponding to the light emission characteristics of the plurality of light emitting diodes in synchronization with the input video signal; and an input video signal based on the brightness correction data generated from the correction data generator. A video signal processing circuit, comprising: a correction circuit that corrects a video signal. 2. The apparatus according to claim 1, wherein the correction data generating unit generates a plurality of coefficient values as luminance correction data respectively corresponding to the light emitting characteristics of the plurality of light emitting diodes, and the plurality of light emitting diodes in accordance with a scanning order of the plurality of light emitting diodes. An address generation unit for specifying an address of the coefficient generation memory so as to generate a coefficient value of the signal. The correction circuit performs a level conversion of the input video signal according to the coefficient value generated from the coefficient generation memory. The video signal processing circuit according to claim 1, wherein the video signal processing circuit is configured by a converter. 3. The coefficient value K assigned to each light emitting diode is a reference maximum luminance level Lref set depending on the maximum luminance level Lmax of this light emitting diode and the average value of the maximum luminance levels of all of the plurality of light emitting diodes. Is set to K = 1 when Lref> Lmax, and L
When ref ≦ Lmax, K = Lref / Lmax is set, and the signal converter performs a level conversion such that the luminance level of the bright light emitting diode is adjusted to the luminance level of the dark light emitting diode. 3. The video signal processing circuit according to 2. 4. The video signal processing circuit according to claim 2, wherein said signal converter comprises a mapping memory for generating an output signal corresponding to said input video signal and said coefficient value. 5. The video signal processing circuit according to claim 2, wherein said signal converter comprises a multiplier for multiplying said input video signal by said coefficient value. 6. The correction data generation unit further includes a coefficient memory for holding a plurality of coefficient values written in an address of the coefficient generation memory specified by the address generation unit in a write mode. The video signal processing circuit according to claim 2.