JP2000133721A - Short-circuit protecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce variation of overcurrent sensing level, when supply voltage is gradually dropped by providing an overcurrent sensing MOS transistor, which has sufficiently low threshold voltage relative to the other components and in which the gate is controlled by voltage across the terminals of an overcurrent sensing resistor. SOLUTION: The threshold voltage of an overcurrent sensing nMOS transistor N1 is set lower than that of the other components. Also, the overcurrent sensing nMOS transistor N1 is set not to perform p-control diffusion. If such an overcurrent sensing nMOS transistor N1 is used, the difference between operating points of output pMOS transistor P1 and shunt pMOS transistor can be reduced. Accordingly, since an overcurrent sensing level will not rise significantly even when supply voltage VDD is gradually dropped, a simple and economy constant-voltage power supply is obtained, which has a structure similar to a common short-circuit sensing circuit and a necessary and sufficient overcurrent protection cut-off capability.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a short-circuit protection circuit, and more particularly to a short-circuit protection circuit for use in a constant-voltage power supply circuit of a semiconductor integrated circuit without impairing the input / output characteristics of the constant-voltage power supply circuit.
In addition, the present invention relates to a short-circuit protection circuit having a small variation in an operation value due to a variation in power supply voltage.

[0002]

2. Description of the Related Art FIG. 6 shows an example of a conventional constant voltage power supply circuit and its short-circuit protection circuit. 6, the source is connected to the power supply VDD, and the output voltage Vout is output from the output terminal 1 via the overcurrent detection resistor R3 from the drain of the output pMOS transistor P1 whose gate potential is controlled by the output of the error amplifier OP1. Taken out. Output voltage V
out is a voltage dividing resistor R connected between the output terminal 1 and the ground.
1, the voltage is divided by R2 and supplied to the non-inverting input terminal of the error amplifier OP1 whose inverting input terminal is grounded. In this way, the output pMOS transistor P1 is subjected to negative feedback control, and the output voltage Vout is controlled to a constant value with respect to a certain range of load fluctuation.

In the prior art shown in FIG. 6, a source is connected to an output terminal 1 and its drain is connected to an overcurrent signal output resistor R4.
, The gate potential of the overcurrent detection nMOS transistor N1 connected to the power supply VDD is controlled by the drain potential of the output pMOS transistor P1, and the nMOS transistor N
1 is output as an overcurrent signal Vlim,
The overcurrent signal Vlim controls the gate potential of the overcurrent blocking pMOS transistor P3 whose source is connected to the power supply VDD and whose drain is connected to the gate of the output pMOS transistor P1, so that the output pMOS
The current of the transistor P1 is limited.

The operation of the overcurrent detection nMOS transistor N1 and the overcurrent cutoff pMOS transistor P3 will be described below. When the power supply voltage Vdd supplied from the power supply VDD is high and the potential difference from the output voltage Vout is sufficiently larger than the threshold voltage Vth of the overcurrent detection nMOS transistor N1, the current flowing through the output pMOS transistor P1 divided by the load current Io When Io ≧ Vth / R3, the overcurrent detection nMOS transistor N1 turns on, and the potential of the overcurrent signal Vlim becomes almost equal to the output voltage Vout.
Descends. This voltage drop causes an overcurrent cutoff pMOS
By turning on the transistor P3 and raising the gate potential of the output pMOS transistor P1 to the power supply voltage Vdd, it is turned off to perform overcurrent protection, that is, short-circuit protection.

However, in the conventional example shown in FIG. 6, an overcurrent detection resistor R3 is inserted between the drain of the output pMOS transistor P1 and the output terminal 1 to detect an overcurrent. Input / output voltage characteristics are sacrificed, especially in battery-powered portable devices, etc.
When the battery voltage drops, the constant voltage output cannot be maintained even though the battery voltage is higher than the set voltage, and there is a problem that the usable time of the device is shortened.

In order to avoid such a voltage drop due to the overcurrent detection resistor R3, a short-circuit protection circuit having the configuration shown in FIG. 1 is often used. Compared with the short-circuit protection circuit of FIG. 6, the drain of the output pMOS transistor P1 that performs negative feedback control and voltage regulation by the output of the error amplifier OP1 is directly connected to the output terminal 1, as in FIG. Shunt pMO provided in parallel between output pMOS transistor P1, power supply VDD and output terminal 1
It is connected between the drain of the S transistor P2 and the output terminal 1. The shunt pMOS transistor P2 is set, for example, to 1/10 the size of the output pMOS transistor P1, has its source connected to the power supply VDD, and is controlled by the same gate potential as the output pMOS transistor P1.

Therefore, when the currents flowing through the output pMOS transistor P1 and the shunt pMOS transistor P2 are I1 and I2, respectively, the power supply voltage Vdd is sufficiently higher than the output voltage Vout and the output pMOS transistor P2
When both 1 and the shunt pMOS transistor P2 are in the saturation region, the source-drain voltages of both pMOS transistors differ by the voltage drop I2 · R3 due to the overcurrent detection resistor R3, but both I1 and I2 depend exclusively on the gate potential. Therefore, both are in a proportional relationship, that is, in the above example, I1
≒ 10 · I2. Therefore, I2 · R3 ≧ Vt
h, that is, when I1 = 10 · I2 ≧ 10 · Vth / R3 (1), the overcurrent detection nMOS transistor N1 is turned on, and the output p is set in the same manner as in the short circuit protection circuit of FIG.
The MOS transistor P1 is protected and cut off. Thus, in the circuit of FIG. 1, the overcurrent protection of the constant voltage power supply circuit, that is, the short-circuit protection can be performed without sacrificing the input / output characteristics by the overcurrent detection resistor R3.

The circuit shown in FIG. 2 is often used.
The circuit of FIG. 2 is the same as the circuit of FIG. 1 except that the back gate of the overcurrent detection nMOS transistor N1 is grounded. In the circuit of FIG. 2, when the output voltage Vout is at a high potential, that is, during a normal operation, the threshold voltage Vth of the overcurrent detection nMOS transistor N1 increases due to the effect of the back gate at the ground potential, and the equation (1) Of 1
0 · Vth / R3, that is, the overcurrent detection level increases. However, when Vout drops to the ground potential due to, for example, a grounding accident, the threshold voltage Vth becomes equal because the potentials of the back gate and the source become equal. Normal value.
Therefore, by setting the value of the overcurrent detection resistor R3 so as to sufficiently protect against a grounding accident, a larger instantaneous load can be tolerated in a normal operation, so that a large load can be driven by a relatively small-capacity constant-voltage power supply. There are advantages.

[0009]

However, the short-circuit protection circuits shown in FIGS. 1 and 2 have a problem that the overcurrent detection level fluctuates greatly when the power supply voltage Vdd drops. FIG. 3 is a characteristic diagram showing the relationship between the source-drain voltage and the drain current of a MOS transistor when the gate voltage is fixed. With the above problems,
1, the difference between the power supply voltage Vdd and the output voltage Vout, that is, when the source-drain voltage Vdsl of the output pMOS transistor P1 approaches the pinch-off voltage Vp, as shown in FIG.
Although the operating point O1 of the OS transistor P1 is in the saturation region, the operating point O2 of the shunt pMOS transistor P2 is such that its source-drain voltage Vds2 is equal to the overcurrent detection resistance R3.
Vds2 = Vds1−I2 · R3 <Vp Since the voltage drop is smaller than the pinch-off voltage Vp, it enters the unsaturated region,
The proportional relationship between I1 and I2 is broken, and in the above example, I1 >> 10
・ It becomes I2. Thus, the overcurrent detection nMOS transistor N1 is turned on when I2 ≧ Vth / R3. As shown in FIG. 3, the value of I1 at this time, that is, the overcurrent detection level is equal to the detection level 10 · Vth
/ R3 greatly increases.

Further, the power supply voltage Vdd drops, and Vds1
When <Vp, the operating point O1 of the output pMOS transistor P1 also enters the unsaturated region, but the drain current in the unsaturated region depends on the source-drain voltage.
The proportional relationship between 1 and I2 breaks down, and in the above example, I1> 10 ·
I2, and the overcurrent detection level is lower than when the output pMOS transistor P1 is in the saturation region.
The value is still larger than the detection level of Expression (1).

FIG. 4A is a graph showing the load current-output voltage characteristics of the short-circuit protection circuit of FIG. 1. Ia, Ib and Ic indicate the above-described power supply voltage Vdd when the power supply voltage Vdd is sufficiently high. Represents the overcurrent detection level when the difference between the output voltage and the output voltage Vout approaches the pinch-off voltage, and when the difference becomes equal to or less than the pinch-off voltage. In the short-circuit protection circuit of FIG. 2, as in the circuit of FIG.
(B) As shown by Ia, Ib, Ic and Ia ', Ib'Ic', the overcurrent detection levels at the time of normal operation and at the time of short circuit are different, but both are at the overcurrent detection level Ia when the power supply voltage Vdd is sufficiently high. , Ia ′, the overcurrent detection levels Ib, Ib ′ and Ic, Ic ′ when the power supply voltage Vdd drops become large values.

For this reason, in the short-circuit protection circuits of FIGS. 1 and 2, the loss of the input / output characteristics due to the overcurrent detection resistor is improved, but the overcurrent detection is performed so that sufficient protection can be performed even when the power supply voltage drops. When the value of the resistor R3 is set, the operating current value when the power supply voltage is sufficient is limited, and there is a problem that a constant-voltage power supply having a larger allowable load than necessary must be used.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and does not sacrifice the input / output characteristics of a constant voltage power supply circuit. It is an object of the present invention to provide a simple and economical constant-voltage power supply that implements a short-circuit protection circuit with little fluctuation.

[0014]

According to the present invention, there is provided a short-circuit protection circuit in a constant voltage power supply circuit having an output MOS transistor provided between a power supply and an output terminal and having a gate potential negatively controlled in accordance with the output terminal voltage. In the short-circuit protection circuit, a shunt M connected between the power supply and the output terminal in parallel with the output MOS transistor via an overcurrent detection resistor and having a gate connected to the gate of the output MOS transistor
An OS transistor and an overcurrent detection MOS transistor having a threshold voltage sufficiently smaller than that of other elements and having a gate controlled by a voltage between terminals of the overcurrent detection resistor, wherein the voltage between the terminals is equal to the threshold voltage; Means for limiting the drain current of the output MOS transistor when the voltage is exceeded.

Further, a back gate of the overcurrent detecting MOS transistor is grounded.

Further, the overcurrent detection MOS transistor is formed without performing diffusion and ion implantation into a channel region for adjusting a threshold voltage.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS. Normally, when forming an nMOS transistor on an IC chip or the like, p
The p-control diffusion as shown in FIG. 5A is performed in the channel region composed of the well. In one embodiment of the present invention, in order to solve the above-described problem, the short-circuit protection circuit shown in FIGS. In the above, an nMOS transistor which does not perform the p-control diffusion as shown in FIG. 5B is used as the overcurrent detection nMOS transistor N1.

Therefore, the threshold voltage Vth of the overcurrent detection nMOS transistor N1 of the present invention has a lower value than other elements. As shown in FIG.
Output pMO when MOS transistor N1 is turned on
The separation on the horizontal axis between the operating points O1 and O2 of the S transistor P1 and the shunt pMOS transistor P2 is determined by the difference between the source-drain voltages of the two, and this is the overcurrent detection nMO.
When the threshold voltage of the S transistor N1 is reached, overcurrent cutoff is performed.

Therefore, overcurrent detection n with a low threshold voltage
According to the present embodiment using the MOS transistor N1, the difference between the operating points of the output pMOS transistor P1 and the shunt pMOS transistor P2 at the time of overcurrent detection can be suppressed to a small value, and when the power supply voltage Vdd decreases. Since the overcurrent detection level does not greatly increase,
A simple and economical constant-voltage power supply having a configuration equivalent to the conventional short-circuit detection circuit described with reference to FIGS. 1 and 2 and particularly having the necessary and sufficient overcurrent protection cutoff capability in the configuration shown in FIG. A circuit can be provided.

Further, as described above, the overcurrent detection nMOS transistor N1 having a low threshold voltage according to the present embodiment comprises:
Since it can be obtained by omitting the p-control diffusion process for adjusting the threshold voltage only for the channel region of the transistor, it is possible to manufacture the IC chip inexpensively and easily without particularly changing the manufacturing process. it can.

The embodiment of the present invention using the MOS transistor having a low threshold voltage formed without the p-control diffusion has been described above. However, the present invention is not limited to this embodiment. For example, various applications are possible, such as obtaining the effect of the present invention in exactly the same manner even if a MOS transistor having a low threshold voltage and n-diffused in a channel region is used.

[0022]

As described above, according to the present invention,
It is possible to provide a simple and economical constant-voltage power supply circuit having a necessary and sufficient overcurrent protection / interruption capability. In particular, by applying the present invention to a battery-driven device, the usable time can be extended.

[Brief description of the drawings]

FIG. 1 is a circuit diagram illustrating an example of a short-circuit protection circuit.

FIG. 2 is a circuit diagram showing another example of the short-circuit protection circuit.

FIG. 3 is a characteristic diagram showing a relationship between a source-drain voltage and a drain current of a pMOS transistor when a gate voltage is fixed.

FIG. 4A is a characteristic diagram showing an example of a breaking characteristic of a conventional short-circuit protection circuit. (B) is a characteristic diagram showing another example of the cutoff characteristic of the conventional short-circuit protection circuit.

FIG. 5A is a cross-sectional view showing the formation of a general nMOS transistor. (B) is a cross-sectional view showing one example of the formation of an nMOS transistor having a low threshold voltage according to the present invention.

FIG. 6 is a circuit diagram showing an example of a conventional short-circuit protection circuit.

[Explanation of symbols]

 Reference Signs List 1 output terminal P1 output pMOS transistor P2 shunt pMOS transistor P3 overcurrent cutoff pMOS transistor N1 overcurrent detection nMOS transistor OP1 error amplifier R1, R2 voltage dividing resistor R3 overcurrent detection resistor R4 overcurrent signal output resistor VDD power supply

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 21/822 H02H 9/02 F term (Reference) 5F038 AR09 BB04 BB05 BH02 BH07 BH12 DF01 DF17 EZ13 EZ20 5F048 AB07 AB08 AB10 AC03 AC10 BA01 BB18 BD04 BE03 BE09 BG12 CC01 CC12 CC13 CC16 CC18 5G013 AA02 AA16 BA01 CA07 5H410 BB04 CC02 DD02 EA11 EB37 FF03 FF05 FF21 FF25 LL06 LL13

Claims (3)

[Claims] 1. A short-circuit protection circuit in a constant voltage power supply circuit having an output MOS transistor provided between a power supply and an output terminal and having a gate potential negatively controlled in accordance with an output voltage, via an overcurrent detection resistor. A shunt MOS connected between the power supply and the output terminal in parallel with the output MOS transistor, and having a gate connected to the gate of the output MOS transistor
A transistor and an overcurrent detection MOS transistor having a threshold voltage sufficiently smaller than that of other elements and having a gate controlled by a voltage between terminals of the overcurrent detection resistor, wherein the voltage between the terminals is equal to the threshold voltage. Means for limiting the drain current of the output MOS transistor when the voltage exceeds the threshold. 2. The overcurrent detection MOS transistor according to claim 1, wherein a back gate is grounded.
2. The short-circuit protection circuit according to 1. 3. The overcurrent detection MOS transistor according to claim 1,
2. The short-circuit protection circuit according to claim 1, wherein the short-circuit protection circuit is formed without performing diffusion and ion implantation into a channel region for adjusting a threshold voltage.