JP2000114887A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize the influence of wiring between input and output steps and to provide satisfactory frequency characteristics, high speed and attenuation characteristics. SOLUTION: As the input step, a single ended push-pull amplifier circuit 1 provided with the collector of a first transistor 3 having collector and emitter resistors 7 and 8 and second and third transistors 4 and 5 serially connected between a power source and the ground is used while connecting a base to the collector and emitter of this first transistor 3. The output step is an emitter follower circuit 2 having a transistor 6 and an emitter resistor 11. Both circuits 1 and 2 are connected by wiring 17.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit (I).
C), in particular, to amplifier circuits manufactured using IC technology.

[0002]

2. Description of the Related Art In general, an IC is manufactured by forming various types of active and passive elements such as a transistor and a resistor on a silicon substrate (substrate) in a very small size. Since an IC forms a circuit having a large number of elements in a minute area, unnecessary inductance and capacitance due to conductors for interconnecting the elements are small, and a signal propagation time is short. Therefore, the IC is very suitable for a high-speed and high-frequency circuit. There is an advantage. For this reason, it is no exaggeration to say that the electronic circuits of recent electronic devices and electronic application devices almost use ICs.

Further, an analog circuit, for example, an amplifier circuit has a multi-stage configuration in order to obtain a required gain or to perform necessary input / output impedance or level conversion. In particular, an emitter follower (source follower in the case of a field effect transistor) circuit is used for the input / output circuit. The reason is that the output impedance of the emitter follower circuit is a function of the impedance of the signal, so that the inductance component of the input wiring looks like a circuit connected in series. In this case, peaking occurs in the frequency characteristics, and ringing occurs at the time of rising / falling of the output signal waveform, thereby causing a problem that a noise margin is reduced.

Generally, as shown in FIG. 2, an equivalent circuit of a wiring includes an inductance component L1, a resistance component R1, and a capacitance (capacity) component C1 to a lower potential (for example, ground) side.
It consists of. When a voltage V is applied to the series circuit of L1, R1, and C1, a current i flowing through the series circuit is expressed by the following equation (1). i = V / Z = V / (R1 + jωL1 + 1 / jwC1) = V / ｛R1 + j (wL1-1 / ωC1) (1)

The change of | i | with respect to the angular frequency ω is shown in FIG.
A characteristic curve shown in FIG. This L1, R1 and C1
When the reactance component of the series circuit is 0, that is, at the time of series resonance when the imaginary part of the denominator of the above equation (1) is 0, the current | i
| Is the maximum value V / R1. This series resonance angular frequency is ω
o, where fo is the series resonance frequency, this fo is expressed by the following equation (2). fo = 1 / 2π√ (LC) (2)

An example of a conventional multi-stage emitter follower circuit is disclosed in Japanese Patent Laid-Open No. 7-7415, and FIG.
It is configured as shown in FIG. That is, the first emitter follower circuit 101 and the second emitter follower circuit 102 are interconnected by an equivalent circuit 117 of wiring. These two emitter follower circuits 101 and 102 include transistors 103 and 106, respectively, and resistors 108 and 111 for grounding the emitters of these transistors. The base of the transistor 103 of the first emitter follower circuit 101 is an input terminal 114, and the collector is a positive voltage source 112.
Is directly connected. On the other hand, a resistor 11 is connected to the collector of the transistor 106 of the second emitter follower circuit 102.
8, a positive voltage source 113 is connected, and an output terminal 115 is connected to the emitter.

In the multi-stage emitter follower circuit having such a configuration, a damping resistor is equivalently interposed in the output impedance of the second or output-stage emitter follower circuit 102, thereby reducing the rise in frequency characteristics and reducing the output signal. It absorbs ringing that can occur in the waveform.

FIG. 9 shows that a resistor 119 is connected in series with an equivalent circuit 117 of a wiring between a first emitter follower circuit 201 and a second emitter follower circuit 202. A relatively large delay time constant is formed by the series resistance 119 and the base-collector or base-emitter capacitance (capacitance) of the transistor 106, thereby reducing the rise in frequency characteristics.

[0009]

In the conventional circuits shown in FIGS. 8 and 9, the first emitter follower circuits 101 and 20 are used.
The wiring 117 between the first and second emitter follower circuits 102 and 202 is variously different in pattern design.
The impedance of the wiring differs depending on the difference between the wiring width and the wiring length. As a result, there is a variation in the lifting amount of the frequency characteristic, and it is difficult to physically adjust the frequency characteristic.

In a high frequency range, there is a correlation between the collector-emitter voltage of the transistor and the cutoff frequency, and the cutoff frequency tends to decrease as the collector-emitter voltage decreases. Therefore, the damping effect due to the resistance between the collector of the transistor and the bias power supply results in a reduction in the voltage between the collector and the emitter, resulting in deterioration of the frequency characteristic band.

Further, in order to obtain a damping effect, the base resistor forms a low-pass filter with a base-emitter capacitance, a base-collector capacitance, or a base-collector capacitance of the transistor. Therefore, if the value of the base resistance is increased in order to reduce the lifting, the attenuation characteristics become steep,
In the high-frequency range, there is a problem that the amplitude of the output signal is reduced, or in the case of a square wave input, the phase delay is different in the input frequency component, resulting in overshoot or ringing in the output.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit capable of reducing a rise in frequency characteristics and maintaining high-speed characteristics and attenuation characteristics without depending on a wiring width and a length between input / output circuits connected in multiple stages. Is to do.

[0013]

In order to solve the above-mentioned problems, a semiconductor integrated circuit according to the present invention employs the following characteristic configuration.

(1) A semiconductor integrated circuit in which the output of a single-end push-pull amplifier is connected via a wiring to an emitter follower circuit as a buffer amplifier.

(2) The single-ended push-pull amplifier circuit comprises a first transistor having a collector connected to a resistor and an emitter connected to a second transistor and a third transistor having a base connected to the collector and an emitter of the first transistor. The semiconductor integrated circuit according to (1), including a transistor.

(3) The semiconductor integrated circuit according to (2), wherein collectors and emitters of the second and third transistors are directly connected between a power supply and a ground.

(4) The semiconductor integrated circuit according to (2) or (3), wherein emitter resistors of the second and third transistors are respectively connected in series.

(5) The semiconductor integrated circuit according to (4), wherein the emitter resistance connected to the emitter of the second transistor is selected on the order of several KΩ.

(6) The semiconductor integrated circuit according to any one of (1) to (5), wherein the transistor is an npn bipolar transistor.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and operation of a preferred embodiment of a semiconductor integrated circuit according to the present invention will be described below in detail with reference to the accompanying drawings, particularly FIGS.

FIG. 1 shows a circuit in which a single-ended push-pull amplifier circuit 1 as a preferred embodiment of a semiconductor integrated circuit according to the present invention and an emitter follower circuit 2 at the next stage are interconnected by a wiring 17. The single-ended push-pull amplifier circuit 1 at the front (or input) stage includes three npn bipolar transistors 3, 4, and 5. The collector of the input transistor 3 is connected to the positive power supply 1 via the resistor 7.
2 and the emitter is grounded via a resistor 8.
The bases of the next-stage transistors 4 and 5 are connected to the collector and the emitter of the transistor 3, respectively. The collector of the transistor 4 is connected to the positive power supply 12, and the emitter is connected to the collector of the transistor 5 via the resistor 9. Further, the emitter of the transistor 5 is connected via the resistor 10. Input terminal 14 at the base of transistor 3
Is connected, and the collector of the transistor 5 is used as the output of the single-end push-pull amplifier circuit 1 as the wiring 17 described above.
Is connected to one end.

Next, the emitter follower circuit 2 in the output stage
Is a general circuit configuration, and includes one npn bipolar transistor 6 and a resistor 11 connected between the emitter of the transistor 6 and ground. The collector of the transistor 6 is connected to the positive power supply 13, and the emitter is connected to the output terminal 15. This emitter follower circuit 2
Functions as a buffer (relaxation) amplifier circuit for the output of the single-end push-pull amplifier circuit 1.

The operation of the semiconductor integrated circuit of FIG. 1 will be described.
Since the semiconductor integrated circuits 1 and 2 are represented by a cascade connection circuit of a common emitter circuit and a common collector circuit,
It can be regarded as a circuit as shown in FIG. In FIG. 4, a voltage source V0 having an internal impedance ρ is connected to an input terminal 16 which is an emitter of the transistor 3. The wiring 17 between the collector of the transistor 5 in the common emitter circuit and the base of the transistor 6 in the emitter follower circuit is represented by an equivalent circuit of the inductance L1, the resistance R1, and the capacitance C1.

FIG. 5 shows an AC equivalent circuit for obtaining the input / output impedance of the circuit of FIG. If the input impedance of the next stage is Zi2, the load impedance of the first-stage transistor 5 is a parallel combined impedance of R9 and Zi2. If this is R11, it is expressed by the following equation (3). Note that R9 means the resistance value of the resistor 9. R11 = R9 // Zi2 (3)

Next, Zi2 is the input impedance of the grounded collector circuit, and is represented by the following equation (4). Zi2 = √ (R12 + (ωL1-1 / ωC1) 2) + rb2 + (1 + β2) (re2 + R11) (4)

On the other hand, the input impedance Zi1 of the first-stage grounded-emitter circuit is irrelevant to the load resistance R11, and is expressed by the following equation (5). Zi1 = V1 / ib1 = rb1 + (1 + β1) re1 (5)

Next, when the impedance of the grounded collector circuit at the output stage is determined, the first stage R9 and the capacitance component (1 / jωC1) of the wiring 17 are in parallel, and the inductance component (jωL1) and the resistance (R1) of the wiring 17 are Considering that the output stage transistor 6 enters the base of the output stage transistor 6 in series, the output impedance Z02 can be expressed by the following equation. Z02 = V2 / −ie2 = re2 + {{(R12 + (ωL1-1 / ωC1) 2) + rb2 + R9} / (1 + β2)

Here, when the value of the common emitter output resistance R9 of the single-end push-pull amplifier circuit is set to a sufficiently large value, the influence of the impedance of the wiring 17 on the output impedance is reduced. For example, when the wiring film thickness is 0.
Wiring 1 with 6 μm, wiring width 2 μm, and wiring length 500 μm
The impedance of 7 is assumed to be a resistance component of 15Ω, an inductance component of 500 PH, and a capacitance component of 200 fF. fc is 10
In the case of GHz, the impedance of the wiring 17 is about 50Ω. Therefore, when the value of R9 is set to several KΩ, the output impedance of the single-end push-pull amplifier circuit 1 is substantially determined by R9.

Next, the frequency characteristics of the semiconductor integrated circuit of the present invention and the conventional circuits shown in FIGS. 8 and 9 will be described with reference to FIG. The frequency characteristic A is a case where two stages of a simple emitter follower circuit having no collector resistance are cascaded in the conventional circuit of FIG. Frequency characteristics B are the same as those of the conventional circuit shown in FIG. The frequency characteristic C is a characteristic of the conventional circuit shown in FIG. The frequency characteristic D is a characteristic of the semiconductor integrated circuit according to the present invention shown in FIG.

As is clear from the frequency characteristic A, a simple 2
In the case of the emitter follower circuit connected in cascade, lifting due to wiring is remarkable. When the series resonance frequency fo of the wiring in the case of each component described above is calculated by the equation (2), fo = 1 / 2n√ (500PH / 200fF) = 16 GHz. In the frequency characteristic B, the effect of damping by inserting a collector resistor in the emitter follower circuit of the next stage is small. Further, if a resistor is inserted into the base as in C, the attenuation characteristic becomes steep, which is not preferable. In the case of the semiconductor integrated circuit of the present invention indicated by the frequency characteristic D, it can be understood that the semiconductor integrated circuit does not lift and the LP has no deterioration in the attenuation characteristic.

FIG. 7 shows an output signal waveform when a trapezoidal wave input signal (a) is input. Waveforms (b), (c), (d), and (e) show the cases of the frequency characteristics A, B, C, and D of FIG. 6, respectively. In (b), ringing occurs at the time of rising / falling. In (c), a slight overshoot / undershoot remains. In (d), the output waveform distortion is large because the attenuation characteristic accompanying the band degradation is steep. On the other hand, in the case of the semiconductor integrated circuit of the present invention, it is apparent that the output waveform most accurately represents the input waveform (a) as shown in (e).

Although the configuration and operation of the preferred embodiment of the semiconductor integrated circuit of the present invention have been described in detail above, this is merely an exemplification of the present invention, and various modifications can be made in accordance with a specific application. I can understand that.

[0033]

As can be understood from the above description, according to the semiconductor integrated circuit of the present invention, by using the single-ended push-pull amplifier circuit and the emitter follower circuit in the input stage and the output stage, the impedance of the wiring between them can be improved. Can be optimized to optimize the frequency characteristics, high-speed characteristics, and attenuation characteristics, so that practical effects as a high-frequency and high-speed amplifier circuit are remarkable.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a preferred embodiment of a semiconductor integrated circuit according to the present invention.

2 is an equivalent circuit of a wiring between an input stage and an output stage of the semiconductor integrated circuit of FIG. 1;

FIG. 3 is a frequency characteristic of a current of the equivalent circuit of FIG. 2;

FIG. 4 is a schematic view of the semiconductor integrated circuit of FIG. 1 including an input stage and an output stage and wiring.

FIG. 5 is an equivalent circuit diagram of FIG.

FIG. 6 is a diagram showing frequency characteristics of the circuit of FIG. 1 and a conventional circuit in comparison.

7 is an output waveform diagram in the case of each frequency characteristic of FIG. 6 with respect to a trapezoidal wave input signal waveform.

FIG. 8 is an example of a conventional two-stage cascaded emitter follower circuit.

FIG. 9 is another example of a conventional two-stage cascade-connected emitter follower circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Single-end push-pull amplifier circuit 2 Emitter follower circuit 3 First transistor 4 Second transistor 5 Third transistor 7, 8, 9, 10 Resistance 17 Wiring

Claims (6)

[Claims] 1. A semiconductor integrated circuit wherein an output of a single-end push-pull amplifier is connected to an emitter follower circuit as a buffer amplifier via a wiring. 2. The single-ended push-pull amplifier circuit according to claim 1, wherein a first resistor is connected to a collector and a first resistor is connected to an emitter.
2. The semiconductor integrated circuit according to claim 1, further comprising a transistor, and second and third transistors each having a base connected to a collector and an emitter of the first transistor. 3. The semiconductor integrated circuit according to claim 2, wherein collectors and emitters of said second and third transistors are directly connected between a power supply and a ground. 4. The semiconductor integrated circuit according to claim 2, wherein an emitter resistor of each of the second and third transistors is connected in series. 5. The semiconductor integrated circuit according to claim 4, wherein the emitter resistance connected to the emitter of said second transistor is selected on the order of several KΩ. 6. The semiconductor integrated circuit according to claim 1, wherein said transistor is an npn bipolar transistor.