JP2000102250A - High-voltage power limiting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-voltage power limiting circuit which is capable of canceling high voltage stabilizing action with reliability, when a high-voltage load current exceeds a specified value, thus enabling reduction for the maximum power of equipment, improvement in the reliability of components, and prevention of X-ray radiation from an image picture tube. SOLUTION: When a high-voltage load current Ia exceeds a limit current Ial, a direct-current voltage Em obtained by rectifying the crest value of auxiliary pulses Vm through a rectifying circuit 18 exceeds a reference voltage Es2, and the output voltage Eo1 of a compactor 19 is brought to a high level. Then a feedback circuit is formed of the rectifying circuit 18, the compactor 19, a diode 20, and a timing circuit 17. The timing circuit 17 shifts the phase of timing pulses Vtm or its output, according to a phase control voltage Ep input, and acts to make the crest value of the auxiliary pulses Vm constant.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a high voltage generating circuit for supplying a cathode voltage of a picture tube of a picture tube display device. In this way, the safety of the apparatus is enhanced by preventing unnecessary power from being supplied to the picture tube.

[0002]

2. Description of the Related Art FIG. 6 is a circuit diagram showing an example of a conventional horizontal deflection high voltage generating circuit. In FIG. 6, a horizontal excitation switching element 1 is a field effect transistor (FET), and a horizontal oscillation pulse V
osc is supplied and on / off operation is performed. An excitation transformer 2 is connected to the drain terminal of the horizontal excitation switching element 1.
One end of the primary winding 2a is connected, and the other end of the primary winding 2a is connected to a DC power supply E via a current limiting resistor 3.

[0003] One end of the secondary winding 2b of the excitation transformer 2 is
It is connected to a base electrode of a horizontal output switching element (transistor) 5 via a base resistor 4. The emitter electrode of the transistor 5 is connected to the other end of the secondary winding 2b, and a damper diode 6 and a return resonance capacitor 7 are connected in parallel between the collector electrode and the emitter electrode. A series circuit of a horizontal deflection coil 8 and an S-shaped correction capacitor 9 is connected between the collector electrode of the transistor 5 and the ground.

The flyback transformer 10 and the high-voltage rectifier diode 11 constitute a high-voltage generating circuit. One end of a primary winding 10a of the flyback transformer 10 is connected to a collector electrode of the transistor 5, and a DC power supply Eb is connected to the other end. A high voltage rectifier diode 11 is connected to one end of the secondary winding 10b of the flyback transformer 10, and a high voltage DC HV to be supplied to the cathode of the picture tube is generated on the cathode side.

An auxiliary horizontal output switching element (FE)
T) 12 is a field effect transistor (FET) whose source terminal is grounded and whose drain terminal is connected to the emitter terminal of the horizontal output transistor 5. A parallel circuit of a damper diode 13 and a return resonance capacitor 14 is connected between the drain terminal and the source terminal.
On the other hand, the voltage dividing resistor 15 divides the high voltage HV to obtain a small voltage Ehv, which is supplied to the input terminal of the comparator 16. Then, the comparator 16 compares the small voltage Ehv with the reference voltage Es1 of another input terminal to obtain a comparison output Eo.
7. As an output of the timing circuit 17,
A timing pulse Vtm is obtained and supplied to the gate terminal of the FET 12.

If it is assumed in FIG. 6 that the FET 12 is not provided and the emitter terminal of the transistor 5 is directly grounded, this is a configuration of an ordinary horizontal deflection high voltage generating circuit, and the collector of the transistor 5 is formed by a well-known principle. Generates a half-sine retrace pulse Vc, and a sawtooth-shaped deflection current Iy flows through the horizontal deflection coil 8 to perform horizontal deflection of the picture tube electron beam. At the same time, the retrace pulse Vc is applied to the secondary winding 1 of the flyback transformer 10.
The voltage is boosted to 0b to obtain a high-voltage pulse Vhv, which is rectified by the high-voltage rectifier diode 11 to become a DC high-voltage HV.

However, in FIG. 6, the auxiliary pulse Vm generated at the drain terminal of the FET 12 is applied to the emitter terminal of the transistor 5, and the retrace pulse Vc is raised by the amount of the auxiliary pulse Vm. Therefore, high pressure HV
When the load current increases and the HV decreases, the auxiliary pulse Vm is increased to increase the value of the retrace pulse Vc, so that the high-voltage pulse Vhv also increases, and the reduction of the high-voltage HV can be compensated.

The high voltage dividing resistor 15, the comparator 16, and the timing circuit 17 shown in FIG. 6 constitute a phase control circuit, and perform an operation for stabilizing the high voltage. That is, when the voltage Ehv obtained by the high-voltage dividing resistor 15 is about to fall below the reference voltage Es1, the output Eo of the comparator 16 shifts the phase of the timing pulse Vtm, which is the square wave output from the timing circuit 17, forward. The auxiliary pulse Vm increases as a result. Then, the peak value of the retrace pulse Vc increases, and the decrease in the high voltage is compensated for, and the high voltage is stabilized.

FIG. 7 is a waveform chart for explaining the operation of FIG. 6 in more detail. FIG. 7A shows the oscillation pulse Vosc. Since the excitation FET 1 is turned off during the bottoming period and turned on during the high level period, the excitation pulse Vd output to the drain is as shown in FIG. It becomes a waveform.
The polarity of the excitation transformer 2 is determined so that the base current of the transistor 5 flows in the positive direction during the high level period of the excitation pulse Vd, and the base current Ib having a waveform as shown in FIG. Flows.

When the high level period of the excitation pulse Vd ends, the base current Ib once turns to the negative direction, and returns to zero after a lapse of the intrinsic storage time tst of the transistor 5. Immediately after the accumulation time tst, the collector of the transistor 5
A resonance retrace pulse Vce indicated by a broken line in FIG. 7D rises between the emitters, returns to a zero level after about half a cycle has elapsed in a resonance cycle determined by a circuit constant, and the pulse ends.

On the other hand, at the time T when the timing pulse Vtm shown in FIG.
ET12 is turned off. Then, as shown in FIG. 4F, the auxiliary pulse (drain pulse) V
m stands up. As can be seen from FIG. 4D, the period in which the FET 12 is off is also the period in which the transistor 5 is in the off state.
4, the same sine wave is divided according to the capacitance value. Therefore, the pulse Vce and the auxiliary pulse V
The time position of the peak value coincides with m, and the auxiliary pulse Vm returns to the zero level in a period tm shorter than the retrace time tr. Then, the damper diode 13 automatically conducts, and the FET
Twelve drain terminals are fixed to zero.

Next, when the timing pulse Vtm returns to the high level, the FET 12 is turned on.
Otherwise, it can be said that the combined electronic switch formed in parallel with the FET 12 and the damper diode 13 is in the ON state. As a result, the voltage Vc between the collector of the transistor 5 and the ground is a composite of two half-sine-wave pulses as shown by the solid line in FIG. Although the pulse Vce portion hardly changes even when the high-voltage load state changes, the auxiliary pulse Vm portion changes greatly, and the operation of compensating for the fluctuation of the high-voltage value and making it constant.

[0013]

As described above, FIG.
The high-voltage stabilizing function of the above works extremely effectively, and an almost constant high-voltage value can be obtained regardless of the magnitude of the high-voltage load current. This helps to increase the stability and brightness of the picture tube picture. On the other hand, however, there are also problems. In this method, when the high-voltage load current Ia increases and the high-voltage value HV tries to decrease, the auxiliary pulse Vm is added to the original retrace pulse to compensate, so that it is difficult to determine the limit of compensation. For example, as shown by the solid line in FIG. 8, there is a case where the high voltage value does not decrease at all even if the high voltage load current Ia increases.

Although this seems at first glance to be favorable for the picture quality of the picture tube, if the high voltage value does not decrease even in the high load current region, there is a danger of X-ray emission from the picture tube. come. Further, if such complete stabilization is performed, the power of the circuit in the high current region increases without limit, which is not desirable in terms of the reliability of the device. As shown by the broken line in FIG. 8 as well, it is necessary that the high voltage value decreases at a current value exceeding the practical range.

For this purpose, it is conceivable to set the circuit so that the position of the falling point T of the timing pulse Vtm shown in FIG. 7E does not come before a predetermined point. For example, a limiter may be provided at the voltage Eo. Then, since the peak value of the auxiliary pulse Vm shown in FIG. 7 (F) cannot be increased beyond a certain value, the characteristic as indicated by the broken line in FIG. 8 is obtained. However, in practice, the peak value of the auxiliary pulse Vm greatly changes due to a slight difference in the time position of T. Therefore, if the characteristic shown by the broken line in FIG. Practical application is difficult due to the large variation of the current value at the limit of activation.

FIG. 9 shows a case where the pulse start position T of the timing pulse Vtm is located before the retrace time tr (the OFF period of the transistor 5) in FIG. That is, the transistor 5 is turned off only during the retrace time tr from the end of the accumulation time tst of the base current Ib shown in FIG. 9A.
As shown in FIG. 9C, it is assumed that the time position T precedes the retrace time tr by the time length tpr.

In such a case, while the transistor 5 is still in the ON state during the time tpr, the FET 12
Is turned off, all the sine wave pulses generated from the time T are applied between the drain and the source. Then, as shown in FIG. 9 (D), the auxiliary pulse Vm generated at the drain rises rapidly during the time tpr, and then the sine wave of the sine wave is generated by the voltage dividing action from the time when the time tr starts and the transistor 5 starts to be turned off. The amplitude decreases.

As a result, even if the position at the time T is slightly earlier than the retrace time tr, the auxiliary pulse Vm generated at the drain of the FET 12 increases sharply. This FET12
Since it is desirable that the on-resistance is as low as possible in terms of loss, the breakdown voltage is often set to the minimum necessary and there is no margin. Therefore, the rapid increase of this pulse
It increases the risk of breakage.

Of course, in such a case, the value of the retrace pulse Vc generated at the collector of the transistor 5 is increased by that amount, so that the high voltage value increases and the high voltage dividing resistor 1 shown in FIG.
5, As long as the feedback loop of the high voltage control formed by the comparator 16 and the timing circuit 17 operates, the position of T does not precede the retrace time tr. However, during a transient state such as when the power of the device is turned on, the position of T is not determined, and as described above, the peak value of the auxiliary pulse Vm becomes abnormally large and the FE is increased.
There is a disadvantage that the breakdown voltage of T12 may be exceeded.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and in a high-voltage generating circuit for supplying an anode voltage of a picture tube, when a high-voltage load current exceeds a predetermined value, a high-voltage stabilizing operation is ensured. It is an object of the present invention to provide a high-voltage power limiting circuit capable of reducing the maximum power of a device, improving the reliability of components, and preventing X-ray emission from a picture tube.

[0021]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a plurality of switching elements which are turned on and off at a constant cycle and generate half-sine-wave pulses at both ends thereof by resonance. A high-voltage generating circuit for boosting and rectifying a combined pulse obtained by substantially adding pulses generated at both ends of the plurality of switching elements to obtain a DC high voltage; and at least one of the plurality of switching elements.
A phase control circuit that controls the point in time when the switching elements are turned on from off within a pulse period of the composite pulse; and a peak value of a pulse generated at both ends of the switching element in which the off point is controlled. And a detection circuit for detecting when the output of the detection circuit exceeds a predetermined value,
A feedback circuit that operates to move the time point of turning off to the phase control circuit further backward, and controls the peak value of the pulse so as not to rise to a predetermined value or more. A power limiting circuit is provided.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-voltage power limiting circuit according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram showing an example of a high-voltage power limiting circuit according to the present invention, and FIGS.
FIG. 5 is a characteristic diagram for explaining the operation of the circuit of FIG. In FIG. 1, the same parts as those in FIG.
A detailed description thereof will be omitted. The main difference from FIG. 6 is that
The Vm rectifier circuit 18, the comparator 19, and the diode 20 are added to form a new feedback circuit that controls the operation of the timing circuit 17 by the movement of the auxiliary pulse Vm. The operation will be described below.

The rectifier circuit (detection circuit) 18 is provided with an auxiliary pulse V
The operation of inputting and rectifying m and detecting the peak value of the auxiliary pulse Vm is performed, and a DC voltage Em proportional to the peak value of the auxiliary pulse Vm is obtained. This DC voltage Em is supplied to the comparator 19
And is compared with a second reference voltage Es2 applied to other inputs. The output voltage Eo1 of the comparator 19 is applied to the phase control input of the timing circuit 17 via the resistor 21 and the diode 20. The timing circuit 17 shifts the phase of the timing pulse Vtm, which is the output thereof, according to the phase control voltage Ep, as in FIG.

On the other hand, as described with reference to FIG. 6, the comparator 16 for high voltage control outputs a DC voltage Eo which is a result of comparison with the reference voltage Es1 according to the high voltage fluctuation. This DC voltage Eo passes through the resistor 23 and the diode 22 to the comparator 19.
Is combined with the DC voltage Eo1 from the control circuit to become the phase control voltage Ep, and controls the timing circuit 17. The capacitor 24 is for removing unnecessary ripple.

The specific operation will be described below. FIG. 2 shows the voltage Em (pulse Vm) with respect to the movement of the high-voltage load current Ia.
(Proportional to the peak value). That is, as described with reference to FIGS. 6 and 7, when the high-voltage load current Ia increases, the voltage-dividing resistor 15, the comparator 16, and the timing circuit 17
And the like, and the auxiliary pulse Vm,
This is compensated by increasing the value of the collector retrace pulse Vc by five. Accordingly, as shown in FIG. 2, the values of the auxiliary pulse Vm and the rectified voltage Em increase with the high-voltage load current Ia, and continue to rise as shown by the broken line in the case of FIG.

However, in the case of FIG. 1 of the present invention, when the voltage Em exceeds the reference voltage Es2, the circuit state changes. That is, it is assumed that the voltage Em reaches the reference voltage Es2 at the point of the limit current Ia1 in FIG. As a result, as shown in FIG.
The output Eo1 is kept at a low level until the high-voltage load current Ia reaches the limit current Ia1, but when the current Ia exceeds the limit current Ia1, the rectified voltage Em exceeds the reference voltage Es2, and thus changes to a high level.

While the voltage Eo1 is at the low level, that is, when the high-voltage load current Ia is less than the limit current Ia1, the diode 20 is off and the diode 22 is on, so that the DC Regarding the voltage Eo1, the timing circuit 17 is controlled only by the DC voltage Eo output from the comparator 16 irrespective of the operation of the entire circuit. As a result, the high voltage HV is changed to the high voltage load current I by changing the value of the auxiliary pulse Vm as described above.
It operates as a stabilizing circuit that stabilizes regardless of the value of a.

Next, when the DC voltage Eo1 goes to a high level, that is, when the high-voltage load current Ia exceeds the limit current Ia1, the diode 20 is turned on. Then, in response to the change of the auxiliary pulse Vm, the rectifier circuit 18, the comparator 19,
A feedback circuit including the diode 20 and the timing circuit 17 is formed, and functions to stabilize the peak value of the auxiliary pulse Vm. The fact that the auxiliary pulse Vm is fixed to a constant value above the limit current Ial means that the high voltage value decreases in the future, but the value of Ehv naturally drops below the reference voltage Es1, so that the comparator 16 The output DC voltage Eo becomes low level as shown in FIG. 4, the diode 22 is turned off, and the circuit loses the function of stabilizing high voltage.

As a result, as shown in FIG. 5, the value of the high voltage HV keeps a substantially constant value until the high voltage load current Ia reaches the limit current Ia1. Thus, such a characteristic is obtained that the voltage gradually decreases as the high-voltage load current Ia increases. Note that the diode 22 can be omitted in some cases. That is, even in this case, when the high-voltage load current is equal to or less than the limit current Ia1, the diode 20 is in the off state, so that the high-voltage stabilizing operation by the DC voltage Eo acting on the timing circuit 17 does not change.

When the high voltage load current Ia exceeds the limit current Ia1, if the value of the resistor 21 is set sufficiently smaller than the value of the resistor 23, the DC voltage Eo of the high voltage change component has almost no effect on the movement of the phase control voltage Ep. Instead, the timing circuit 17 performs an operation exclusively for stabilizing the voltage Em. Of course, the limit current Ia1 of the high-voltage load current can be finely adjusted by changing the value of the reference voltage Es2. Since the maximum value of the auxiliary pulse Vm, which is a component accumulated on the retrace pulse Vc, is thereby defined, the value of the limit current Ia1 does not greatly vary.

[0031]

As described in detail above, the high-voltage power limiting circuit of the present invention is capable of reliably stabilizing a high-voltage power supply in a high-voltage generating circuit for supplying an anode voltage of a picture tube when a high-voltage load current exceeds a predetermined value. Since the operation can be canceled, there are extremely excellent effects such as reduction of the maximum power of the device, improvement of the reliability of the components, prevention of X-ray emission from the picture tube, and the like.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a characteristic diagram for explaining the operation of FIG.

FIG. 3 is a characteristic diagram for explaining the operation of FIG. 1;

FIG. 4 is a characteristic diagram for explaining the operation of FIG. 1;

FIG. 5 is a characteristic diagram for explaining the operation of FIG. 1;

FIG. 6 is a circuit diagram showing a conventional example.

FIG. 7 is a waveform chart for explaining the operation of FIG. 6;

FIG. 8 is a characteristic diagram for explaining the operation of FIG. 6;

FIG. 9 is a waveform chart for explaining the operation of FIG. 6;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 horizontal excitation switching element (FET) 2 horizontal excitation transformer 5 horizontal output switching element (transistor) 6,13 damper diode 7,14 retrace resonance capacitor 8 horizontal deflection coil 9 S-shaped correction capacitor 10 flyback transformer 11 high voltage rectifier diode 12 Auxiliary horizontal output switching element (FET) 15 High voltage dividing resistor 16, 19 Comparator 17 Timing circuit 18 Rectifier circuit (detection circuit) Vosc Horizontal oscillation pulse Vc Retrace pulse Vm Auxiliary pulse Vtm Timing pulse Ib Base current Iy Deflection current Ia High voltage Load current Ia1 Limit current E, Eb DC power supply voltage Ehv High voltage detection voltage Es1, Es2 Reference voltage Eo, Eo1 DC voltage (comparison result voltage) Ep Phase control voltage tr Retrace time tst Accumulation time T When auxiliary output FET turns off

Claims (1)

[Claims] 1. A plurality of switching elements which are turned on / off at a constant cycle and generate half-sine-wave pulses at both ends thereof by a resonance action, and the pulses generated at both ends of the plurality of switching elements are substantially added. A high-voltage generation circuit that obtains a DC high voltage by boosting and rectifying the synthesized pulse obtained by the above-described method; and a time when at least one switching element of the plurality of switching elements is turned on to off is defined as a pulse period of the synthesized pulse. A phase control circuit that controls within a range, a detection circuit that detects a peak value of a pulse generated at both ends of the switching element whose turning-off time is controlled, and when an output of the detection circuit exceeds a predetermined value. Operates to move the time point of turning off to the phase control circuit further backward, and controls so that the peak value of the pulse does not rise above a predetermined value. A high voltage power limiting circuit, comprising: