JP2000101924A - Defect detection correction device in image input device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a defect detection correction device that is applicable to various photographing scenes and to almost all defect detection systems by discriminating a pixel to be defective, in when the correlation of three consecutive pixels satisfies a prescribed correlation condition and the pixel is a pixel placed in the center of the three consecutive pixels. SOLUTION: A mean value calculation section 303 calculates the mean value of three consecutive pixels, where a target pixel is a center pixel of the three pixels. Comparators 304, 306 that simultaneously receive the output of the mean value calculation section 303 compare respectively the means level with the levels of the three consecutive pixel signals, divides the pixel distribution into 2 to 1 under a boundary of the mean value level and give the result to result to a decode section 307. A comparator 310 compares the absolute value output of a differential absolute value calculation section 309 with a prescribed threshold and provides the output of a discrimination pulse that denotes possibility of a defect of the target pixel, when the absolute value output is larger than the threshold. Only when an output of the decode section 307 and the output of the comparator 310 are both at an L level, is it finally discriminated that the target pixel is defective.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a defect detection and correction in an image input device for electrically detecting and correcting a pixel defect and a defective singular point signal generated on a solid-state image sensor or in an image output from the solid-state image sensor. Related to the device.

[0002]

2. Description of the Related Art Generally, in an image input device such as a high-definition camera using a solid-state image pickup device having a large number of pixels, the frequency of occurrence of defective pixels, that is, defective pixels, increases. Technology is indispensable. By correcting the singular point pixels represented by these defective pixels, the yield of the solid-state imaging device is improved, and the cost of the device can be significantly reduced.

As a technique for electrically correcting such defective pixels, the following method is known. That is,
A memory that holds in advance the positions of defective pixels that are generated uniquely during the manufacture of solid-state imaging devices is created, and this is mounted on an image input device such as a camera. There is a method of complementing with an average value or the like. However, this method has a problem that it cannot sufficiently cope with a defect that changes depending on the light amount or the temperature, and cannot cope with a defect generated after the product is shipped at all.

As a technique for coping with this, Japanese Patent Application Laid-Open No. 6-205302 discloses a technique in which a pixel of interest and four adjacent pixels in the vicinity thereof are used, and a pixel signal of interest protrudes from a peripheral pixel signal by a certain value or more. In addition, a method is disclosed in which when a pixel signal before and after an adjacent pixel is equal to or higher than a certain level, a pixel of interest is determined to be defective, and this is corrected.

However, Japanese Patent Application Laid-Open No. Hei 6-20530 discloses
The technique disclosed in Japanese Patent Application Laid-Open Publication No. 2002-133873 is not applicable to all types of images, and a defect may not be detected depending on an image pattern, or a normal pixel may be erroneously detected as a defect. Japanese Patent Application Laid-Open No. 5-8 / 1990 discloses a technique for coping with this.
Japanese Patent No. 3638 discloses a method in which a defect is determined for each pixel for each imaging frame or field, and position data of a pixel that is frequently determined to be defective is stored in a memory, and correction is performed based on the data. It has been disclosed.

[0006]

As described above, Japanese Patent Laid-Open Publication No. Hei 6-205302 discloses a method of determining a pixel which protrudes only one pixel in a flat level as a defect. However, it cannot cope with a defect that exists in an area where the periphery is not flat, nor can it cope with a defect that occurs when the ambient signal level is low, that is, a dark background.
In other words, the peripheral pixel conditions that can determine a defect as a defect, that is, the imaging scene, are limited. Further, since the number of pixels required for defect detection is as large as five pixels including the pixel of interest, there is a problem that the defect detection capability is low for an image pattern in which the pixel signal level greatly varies within five pixels.

[0007] In addition, in the method including the one disclosed in the above-mentioned publications, it is impossible to accurately detect only a defect from any image in a method in which the right or wrong of a defect of a pixel of interest is determined only from neighboring pixels in the immediate vicinity. There is an image pattern for which a defect cannot be detected for each method. Therefore, in a case where the source image for obtaining the defect detection frequency disclosed in the above-mentioned Japanese Patent Application Laid-Open No. Hei 5-83638 is inappropriate for the adopted defect detection method for a long time, an erroneous result is obtained. There is a problem that the effect of frequency accumulation is lost because accumulation is continued.

The present invention has been made to solve the above problems in the conventional defect detection method.
An object of the invention according to 3 is to provide a defect detection and correction device in an image input device adapted to various imaging scenes. The invention according to claims 4 and 5 is
It is an object of the present invention to provide a defect detection and correction device in an image input device which can be adapted to most defect detection methods.

[0009]

In order to solve the above problems, the invention according to claim 1 is to reduce the signal level distribution of three consecutive pixels on a solid-state image sensor or in an input image to two to one. Level distribution dividing means for dividing into two,
Quantitative distribution value calculation means for quantifying the level distribution state of the divided two pixels, distribution quantitative values of the two pixels and the signal level of the one pixel obtained by the quantitative distribution value calculation means A correlation value calculating means for calculating a correlation with a pixel, a correlation value obtained by the correlation value calculating means satisfying a predetermined correlation value condition, and a pixel located at the center of three consecutive one-side pixels A defect detecting means for determining one pixel as a defect and a defect correcting means for correcting a pixel determined to be defective by the defect detecting means. It constitutes.

[0010] In the defect detection / correction device configured as described above, the defect detection is performed on the central pixel using three consecutive pixels, so that erroneous detection is reduced and it is possible to adapt to various imaging scenes. Become.

According to a fourth aspect of the present invention, there is provided an electronically rewritable storage means for storing a defect position on a solid-state imaging device or in an input image, a means for performing defect detection only at a specific operation, Means for managing the frequency of defects detected during a specific operation for each pixel by the storage means, means for making the storage capacity of the defect detection frequency by the storage means pseudo infinite, and storage means under specific conditions And a means for appropriately updating the content stored in the image input device constitute a defect detection and correction device in the image input device.

In the defect detection and correction device thus configured, a means for storing the defect position is provided to accumulate the defect detection frequency. Therefore, the defect detection and correction device is not affected by the characteristics of the defect detection method. Performance can be embodied, and the system has a pseudo-infinite means for managing the frequency of defect detection, so that the amount of information is constantly increased, minimizing the erroneous determination of the defect detection method depending on the image pattern. It is possible to keep it to a minimum.

[0013]

Next, an embodiment will be described. FIG. 1 is an overall block diagram showing a first embodiment of a defect detection and correction apparatus according to the present invention. This embodiment corresponds to the inventions according to claims 1 to 3. In FIG. 1, 100 is a solid-state imaging device, 200 is an A / D converter, 30
Reference numeral 0 denotes a pixel defect detection and correction circuit, and an electric signal obtained by photoelectrically converting the light intensity in the solid-state imaging device 100 is A / A
The data is digitally converted by the D converter 200, subjected to defect detection and correction by the pixel defect detection and correction circuit 300, and sent to the subsequent image processing device or the like.

FIG. 2 is a diagram showing a detailed configuration of the pixel defect detection and correction circuit 300. In FIG. 2, reference numerals 301 and 302 denote flip-flops (FF). Each flip-flop is a pixel of interest X (m, n) (m and n are natural numbers) and a pixel signal X (m, n + 1) continuous with the pixel of interest. Are respectively stored. Here, the continuous pixel signal means a pixel signal input to the pixel defect detection and correction circuit 300, and the solid-state imaging device 10
This includes the case where signals from pixels arranged at positions separated by 0 are continuously received. Here, it is assumed that X (m, n) indicates a pixel or a pixel signal level existing at the position of m rows and n columns in the area image.

The above two pixel signals X (m, n) and X (m, n + 1)
Pixel signal X (m, n-1) and flip-flop 301
, 302 are output from comparators (COMP) 304, 3 respectively.
06, and at the same time, an average value calculation unit (AVE) 303
Is input to The average value calculation unit 303 calculates the average value (Ave1 in FIGS. 4 and 6) of three consecutive pixels centered on the target pixel X (m, n) represented by the following equation (1). [X (m, n-1)) + X (m, n) + X (m, n + 1)] / 3 (1) Then, the outputs of the average value calculation unit 303 are simultaneously output. The received comparators 304 and 306 compare the average value level with each of the three consecutive pixel signal levels, and make a two-to-one pixel distribution with the average value level shown in equation (1) as a boundary. Split. In the logical value table shown in FIG. 3, a and c indicate the outputs of the comparators 304 and 306, respectively, and the average level A
H is output when the pixel signal level is higher than ve1, and L is output when the pixel signal level is lower than ve1.

The outputs of the two comparators are supplied to a decoding section (DE
CODE) 307, based on the logical value code of FIG.
After it is determined whether or not the pixel located at the center of the three consecutive pixels is one on the pixel distribution side, the pixel is sent to a defect determination flag OR gate (OR) 311. Here, alphabets a, a in the logical value table shown in FIG.
c and d indicate the input and output of the decoding unit 307 in FIG. 2. The 1-bit output result d indicates that there is a possibility that the pixel is a normal pixel if "H" and a defective pixel if it is "L". Is shown.

The above is the first stage of defect detection. Here, the concept of the defect detection will be described. 3 consecutive
The distribution patterns of the two pixels are shown in FIG.
(B) and (C), and FIGS.
There are six types in which the levels of the pixel signal levels in (B) and (C) are inverted. Since the inverted type can be detected exactly the same, the illustration is omitted. In FIG. 4A, Xn
In the case where the signal levels of two pixels on two sides of the pixel distribution are inverted, such as when the levels of Xn + 1 and Xn + 1 are inverted, they are not shown because they can be detected equally. In the distribution patterns shown in FIGS. 4A and 4C, there is a high possibility that both sides of the distribution pattern naturally change from the target pixel Xn, that is, there is a high possibility that the target pixel Xn is an image edge. On the other hand, FIG.
The pixel of interest Xn in FIG. 3B is clearly protruded by one point. Therefore, in the defect detection section of the present defect detection and correction circuit, Xn in the former [(A) and (C) of FIG. 4] is a normal pixel, and Xn in the latter [(B) of FIG. 4] is a pixel having a high possibility of a defect. Has been detected as Note that, by setting the target pixel as the center pixel of the three consecutive pixels, a pixel protruding only by one point is detected.

In FIG. 2, the average value calculation unit 308 calculates a pixel X on both sides thereof, excluding the pixel of interest, represented by the following equation (2).
The average value (Ave2 in FIGS. 4 and 6) of the levels of (m, n-1) and X (m, n + 1) is calculated. [X (m, n-1)) + X (m, n + 1)] / 2 (2) The output result of this average value calculation unit 308 is the absolute difference Value calculator
At 309, the difference from the target pixel signal level is obtained, and the absolute value represented by the following equation (3) is output. | X (m, n) − [X (m, n−1)) + X (m, n + 1)] / 2 | (3) Then, the absolute value of the difference absolute value calculation unit 309 The value output is input to the comparator 310. Further, the absolute value output is supplied to the comparator 310
Is compared with a predetermined threshold value Thr, and if it is larger than the threshold value Thr, it is determined that the pixel of interest may be defective, and a 1-bit determination pulse is output to the OR gate 311 for the defect determination flag. Here, assuming that the comparator 310 outputs “L” when the pixel of interest is determined to be defective, the OR gate 311 is output only when both the output of the decoding unit 307 and the output of the comparator 310 are “L”. Becomes "L", whereby the target pixel is finally determined to be defective, and the selector (SE)
In L) 312, the pixel of interest is replaced with the output of the average value calculation unit 308, that is, the average value of the pixels on both sides shown in the equation (2).

FIG. 5 shows the defect detection and correction circuit 30 in FIG.
FIG. 3 is a block diagram showing a block diagram of FIG. 2 according to the functions of defect detection and defect correction.
, 302 shift the shift register section 320 and the average value calculating section 303.
The OR gate 311 constitutes the defect detecting section 321 and the selector 312 constitutes the defect correcting section 322.

In the device disclosed in Japanese Patent Application Laid-Open No. 6-205302, the number of adjacent pixels required for detecting a defect is as large as four pixels, and as shown in FIG. When the center pixel Xn is detected as a defect, there is a high possibility that the original image edge will be crushed. However, in the present embodiment, the number of adjacent pixels required for detecting a defect is as small as two pixels, and Since the defect detection pattern for Xn is as shown in FIG. 4A, it is not erroneously detected as a defect.
Therefore, in high-frequency image reproduction required as the number of pixels increases, the adaptive performance of defect detection is high. In addition, since the defect detection is performed on the center pixel of the three consecutive pixels, the image edge portion having a width of one pixel or more is not erroneously determined as a defect.

Next, a second embodiment will be described. In the first embodiment described above, the defect detection processing is performed only in one-dimensional direction. However, the second embodiment extends the defect detection processing to two dimensions. . FIG. 7 is a schematic block diagram showing a defect detection and correction circuit according to the second embodiment. The detailed configuration of the shift register 333, the horizontal and vertical defect detection units 332 and 334, and the defect correction unit 336 is shown in FIG. It is the same as shown. In this embodiment, the line memory 33 for all pixels in the pixel arrangement direction (horizontal direction) in which the processing is performed.
0 and 331 are prepared, and the same processing is executed for a pixel row that is perpendicular to the processing direction of the first embodiment. The data is updated in the line memories 330 and 331 for each horizontal line, and the input c to the vertical defect detector 332 is input.
The inputs a and b are respectively delayed by one horizontal line and delayed by two horizontal lines. In the vertical defect detection unit 332, for the three pixels of the inputs a, b, and c,
The same processing as in the first embodiment is executed. Therefore, the OR gate 335 stores the result of the defect determination of the same pixel in the horizontal direction and the result of the defect determination in the vertical direction in the first pixel.
Is input with the polarity of the embodiment. Only when both pixels are determined to be defective, the pixel is finally determined to be defective and sent to the defect correction unit 336 to complete predetermined complementation.

In the case of a one-line vertical line image as shown in FIG.
If only the defect detection from the horizontal direction is performed, the vertical line corresponding part pixel is recognized as a defect, and the vertical line is crushed.However, in the defect detection from the vertical direction, the pixel is determined as a normal pixel.
In the present embodiment, only when a defect is determined in both the horizontal and vertical directions, the defect is finally determined, so that the vertical line is not collapsed. Also, by using the line memories 330 and 331 for defect detection in the vertical direction, it is possible to perform exactly the same processing on pixels adjacent in the diagonal direction. Thus, only when a defect is determined from the horizontal, vertical, and oblique directions, if it is finally determined to be a defect, the oblique line as a normal pixel is not crushed.
Further, highly accurate defect detection becomes possible.

Next, a third embodiment will be described. FIG. 9 is a schematic block diagram showing a defect detection and correction circuit according to the third embodiment. In this embodiment, a shift register 340 and a defect detection unit 341 detect a defect in the horizontal direction as in the first embodiment. Then, as a result of determining whether the target pixel X (m, n) is defective or not by the corresponding defect detection processing in the horizontal direction, the defect position memory 342 stores, for example, “L” for a defective pixel and “L” for a normal pixel. H ”digital data 1 bit
If it is determined that the defect is a defect, 1 bit indicating whether the defect is a white defect or a black defect, for example, "L" for a black defect and "H" for a white defect, for a total of 2 bits. Whether the defect is white or black depends on whether the signal level of X (m, n) is X (m, n-1)) and X
The determination may be made based on whether the signal level average value Ave2 (or Ave1 is completely equivalent) of (m, n + 1) is larger or smaller.

In the decoding determining section 343, the defect detecting section 341
, The defect determination result of the pixel X (m-1, n) adjacent to the same column (vertical direction) held in the defect position memory 342 is obtained at the same time as the defect determination result of X (m, n) is obtained. Defect judgment is performed based on the logical value table shown in FIG. A, b, c, d, e in the table
Are the defect determination result of the output of the defect detection unit 341, the black and white determination result of the defect of the output of the defect detection unit 341, the defect determination result of the output of the defect position memory 342, and the black and white of the defect of the output of the defect position memory 342. The judgment result and the defect judgment result of the decoding judgment unit 343 are shown, and "-" indicates indefinite (either "H" or "L" is acceptable).

In the decoding determining unit 343, X (m, n) and X (m, n)
(M-1, n), that is, when a pixel in the same column is detected as a defect in which black and white matches over two rows, it is highly possible that the pixel is not a defect but a white or black vertical line image. In such a case, determination is made so that the target pixel X (m, n) is recognized as a normal pixel.

In the second embodiment shown in FIG.
In order to store the pixel signal level as it is, two lines of memory having a storage capacity of one pixel data bit length are required for one pixel, but according to the present embodiment, one pixel has a storage capacity of two bits. Only one line of memory is required. Therefore, the size of the memory can be significantly reduced.

Next, a fourth embodiment will be described. This embodiment corresponds to the invention according to claim 4, and in a color camera with an auto focus (AF) function, a defect position is detected using an input image used for white balance processing as a source, and thereafter, While detecting an imaging state in which a defect can be easily detected using AF, the defect detection result at this time is accumulated, so that a comprehensive defect determination is performed. FIG. 11 is a block diagram showing a defect detection / correction circuit according to the fourth embodiment. The overall system configuration is exactly the same as that of the first embodiment shown in FIG. / D
A defect included in the converted digital image signal is detected and corrected by a defect detection and correction circuit.

Although the defect detecting section 350 and the defect correcting section 357 in this embodiment need not be the same as the defect detecting section and the defect correcting section shown in each of the above-mentioned embodiments, the explanation is simple. In order to achieve this, description will be made using substantially the same components as those shown in FIGS. However, in the first embodiment shown in FIG. 5, when the output of the defect detection unit 321 is "L", it is determined that the defect is a defect. However, the polarity is inverted in the defect detection unit 350 in this embodiment. When a defect occurs, "H" is output.

The judgment result in the defect detection section 350 is added to an adder 351.
The output of the defect position memory 354 is added to the result obtained by shifting the output of the defect position memory 354 by a predetermined bit by the bit shift circuit 355. Each address of the defect location memory 354 has
The number of times of defect detection is stored for each pixel, but "L" is written by default. Further, the memory controller 358 which controls the operation of the defect position memory 354 transmits the memory output timing in the adder 351 to the defect detector 35.
The defect position memory 354 is controlled in synchronization with the entire system so that the pixel at the same position as the output of the pixel to be determined at 0 is obtained.

At the time of the first white balance acquisition, writing into the defect position memory 354 becomes possible for the first time, and the detected data is stored in the defect position memory 354 as "H" = "1" as it is. After that, the memory writing operation is prohibited unless the specific imaging condition is satisfied, and the reading is continued while the contents of the defective position memory are held. The output of the defect position memory 354 is sent to a defect judging unit 356, and the memory output bit is compared with a data threshold for defect judgment. For example, if the memory data length is 8 bits or more than 256 gradations, it becomes 128 or more. Is determined only as a defect. The memory output bit length indicates the frequency at which each pixel is detected as a defect, and the data threshold (= the number of defect detections) for determining the defect may be adjusted by an external operation.

The AF controller 359 detects and controls the focus of the image pickup. Here, it is possible to appropriately create an intentional defocus state contrary to the focusing condition, and when this specific state is sent to the memory controller 358, the defect position memory 354 can update the defect position data. That is, writing becomes possible. Then, the result obtained by shifting the memory output by a predetermined bit by the adder 351 and the result of the defect detection unit 341 are added, and when the output of the defect detection unit 350 becomes “H”, the number of times of defect detection is newly added by +1. The data is held in the defect position memory 354. On the memory output circulating side (output side of the adder 351), the lower several bits of data
Is bit-shifted and truncated (or rounded off), and the accumulated data bit length is compressed, so that the storage capacity of defect input data can be expanded indefinitely.

The contents of the defect location memory can be simultaneously updated (hereinafter referred to as refresh) by recognizing a predetermined mode. The mode may be set by an external key input 360 as shown in FIG. 11, and is sent to the memory controller 358 to recognize the mode.
What is necessary is just to write the "L" signal. A in the defect location memory 354
As a method of writing "L", an output control buffer 352 is prepared at the output of the adder 351 and the input terminal of the memory 354 is pulled down by a resistor 353 so that the output of the output control buffer 352 is set to a high impedance at the time of refresh. What should I do? The stored data is retained without being erased immediately before the power is turned off, and is reflected as initial data after the next power-on.

According to this embodiment, the following operation and effect can be obtained. That is, the white balance of a color camera is to adjust the sensitivity difference between the three reference colors in order to properly reproduce white under a predetermined color temperature.
Ideally, processing is performed such that white is captured at a predetermined color temperature, and the spectral integration values of the three reference colors at this time in the entire sensitivity wavelength region of the camera are electrically equalized. Therefore, in the case of a camera mainly for industrial use, a subject at the time of white balance often assumes a predetermined white image over the entire imaging region, and there is a high probability that an image having few edges is inevitably obtained.

Defects in the method of detecting a defect from an image are roughly classified into two types, one involving an image edge and one involving a noise. A subject in a white balance in which a flat image is highly likely to be obtained is used for defect detection. The probability of a favorable image also increases. Similarly, as a result of defocusing at the time of defocusing, the image edge is smoothed, while the defective pixel is constantly present without blurring regardless of the image,
Detecting a defect at this time is convenient for suppressing erroneous detection.

Providing the defect position memory 354 and accumulating the defect detection frequency therein is highly effective for realizing the defect detection performance which is not affected by the characteristics of the detection method. That is, there is no possibility that a defect cannot be detected under a specific image pattern or a normal pixel is erroneously detected as a defect. Further, when the defect detection and the defect correction are performed for each image pickup, the pixel which repeats the defect detection or the non-detection in the short image pickup frame cycle due to the influence of the noise does not flicker on the screen.

The fact that the defect judging section 356 can operate the magnitude of the defect frequency for judging a defect improves the adaptability of the system. For example, in a high-temperature environment, the dark current in the solid-state imaging device increases and white spot defects increase. As a result, the absolute number of defects increases, and by lowering the frequency threshold for defect determination to make it easier to detect defects,
The defects can be prevented from being noticeable when the system is suddenly operated at a high temperature.

Further, by carrying out the cyclic addition by shifting the accumulated defect detection frequency by bit shifting, it is possible to pseudo-infinitely accumulate the defect detection frequency. As a result, by constantly increasing the information, it is possible to minimize the influence of the performance of the defect detection method depending on the image pattern and the influence of erroneous determination due to noise, and to achieve the maximum defect detection accuracy as a whole. Contribute to raising.

The simultaneous update function is an emergency countermeasure means in the event that abnormal data is accumulated for a long period of time. When the defect detection / correction system becomes abnormal, an erroneous defect position memory data is stored. This can be dealt with by deleting.

Next, a fifth embodiment will be described. In this embodiment, instead of acquiring the defect position data from the image at the time of obtaining the white balance or at the time of defocusing as in the fourth embodiment, a moving image is detected, and the defect detection result in the moving image shooting state is obtained. , Cumulative writing to the defect location memory.

As the moving image detecting means, a method of obtaining a correlation between time-series images, a method of using an acceleration sensor, and the like can be considered. FIG. 12 is a block diagram of a configuration for performing the most general method as a method for obtaining a correlation between time-series images. An absolute value circuit calculates a level difference for each pixel in two consecutive frames obtained by the one-frame delay circuit 400 and the subtractor 401.
An absolute value is obtained at 402, and a comparator 404 which receives the output of the absolute value circuit 402 and the threshold value set at the threshold value setting circuit 403 as inputs is used. At this time, in order to prevent the luminance change from being erroneously recognized as a movement, the predetermined threshold may be set to correspond to the luminance change.

In this embodiment, the following operation and effect can be obtained. That is, in the case of a multi-pixel CCD image sensor, since the read frame speed is low, when a moving subject is imaged, the image is deteriorated due to motion. At this time, as in the case of defocusing, the number of edges in the image is reduced, and an image state suitable for defect detection is obtained. Therefore,
By referring to the defect detection result at the time of moving image, defect determination with few errors can be performed.

It should be noted that, by detecting an image having a small number of edges or an image having a small amount of noise other than those shown in the above-described fourth and fifth embodiments, if the defect detection results at that time are accumulated and then performed, Exactly the same effect can be obtained.

[0043]

As described above with reference to the embodiments, according to the first to third aspects of the present invention, it is configured that defect detection is performed on the central pixel using three consecutive pixels. Therefore, erroneous detection is reduced, and a defect detection and correction device in an image input device that can be adapted to various imaging scenes can be realized. According to the fourth and fifth aspects of the present invention, a means for storing a defect position is provided to accumulate the defect detection frequency.
Defect detection can be performed without being affected by the characteristics of the defect detection method.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram showing an overall configuration of a first embodiment of a defect detection and correction device for an image input device according to the present invention.

FIG. 2 is a block diagram showing a detailed configuration of a defect detection and correction circuit according to the first embodiment shown in FIG.

FIG. 3 is a diagram illustrating logical value codes used in a decoding unit of the defect detection and correction circuit illustrated in FIG. 2;

FIG. 4 is a diagram illustrating an example of a pattern of three consecutive pixels.

FIG. 5 is a block diagram showing the defect correction circuit shown in FIG. 2 divided into blocks by function.

FIG. 6 is a diagram illustrating an example of a normal pixel row including five pixels.

FIG. 7 is a schematic block diagram illustrating a defect detection and correction circuit according to a second embodiment of the present invention.

FIG. 8 is a diagram showing a vertical line image in one column.

FIG. 9 is a schematic block diagram illustrating a defect detection and correction circuit according to a third embodiment.

10 is a diagram illustrating a logical value code used in a decoding determination unit of the defect detection and correction circuit illustrated in FIG. 9;

FIG. 11 is a schematic block diagram illustrating a defect detection and correction circuit according to a fourth embodiment.

FIG. 12 is a block diagram illustrating a configuration of a time-series image correlation acquisition unit used in the fifth embodiment.

[Explanation of symbols]

 100 solid-state imaging device 200 A / D converter 300 defect detection and correction circuit 301,302 flip-flop 303 average value calculation unit 304,306 comparator 307 decoding unit 308 average value calculation unit 309 difference absolute value calculation unit 310 comparator 311 OR gate 312 selector 320 shift Register 321 Defect detection unit 322 Defect correction unit 330,331 Line memory 332 Vertical defect detection unit 333 Shift register 334 Horizontal defect detection unit 335 OR gate 336 Defect correction unit 340 Shift register 341 Defect detection unit 342 Defect position memory 343 Decode judgment unit 344 Defect correction Unit 350 Defect detection unit 351 Adder 352 Output control buffer 353 Pulldown resistor 354 Defect position memory 355 Bit shift circuit 356 Defect judgment unit 357 Defect correction unit 358 Memory controller 359 AF control unit 360 Key input 400 One frame delay circuit 401 Subtractor 402 Absolute value circuit 403 Threshold setting circuit 404 Comparator

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Sho Kikuchi 2-43-2 Hatagaya, Shibuya-ku, Tokyo F-term in Olympus Optical Co., Ltd. 5C024 AA01 CA09 FA01 FA11 HA12 HA14 HA18 HA23

Claims (5)

[Claims] 1. A level distribution dividing means for dividing a signal level distribution of three consecutive pixels on a solid-state image pickup device or an input image into two parts one by one, and said two divided two parts.
Distribution quantitative value calculation means for quantifying the level distribution state of the individual pixel, and 2 obtained by the distribution quantitative value calculation means.
Correlation value calculation means for calculating the correlation between the distribution quantitative value of the individual pixel and the signal level of the one pixel, and the correlation value obtained by the correlation value calculation means satisfies a predetermined correlation value condition, and When the one-side pixel is a pixel located at the center of three consecutive pixels, a defect detection unit for determining the one-side pixel as a defect, and correcting the pixel determined to be defective by the defect detection unit And a defect correction unit for an image input device. 2. The level distribution dividing means comprises means for dividing based on the magnitude of the signal level of each pixel with respect to the average value of the signal levels of the three pixels. The correlation value calculating means is configured to calculate a difference value between the signal level of the one-side pixel and the average value of the pixel signal of the two-side pixel, and The correlation value condition is a magnitude relationship between the difference value calculated by the correlation value calculation means and a predetermined threshold value to be compared, and the defect correction means calculates the two pixel values calculated by the distribution quantitative value calculation means. 2. A defect detection and correction device in an image input device according to claim 1, comprising means for correcting the signal level of the defective pixel based on the average value of. 3. The image input device according to claim 1, wherein the three consecutive pixels on the solid-state imaging device or in the image are pixels consecutive in a horizontal direction, a vertical direction, or an oblique direction. Defect detection and correction device. 4. An electrically rewritable storage means for storing a defect position on a solid-state imaging device or in an input image; a means for detecting a defect only during a specific operation; Means for managing the frequency for each pixel by the storage means, means for making the management capacity of the defect detection frequency by the storage means pseudo infinite,
Means for appropriately updating the contents stored in the storage means under specific conditions. 5. The specific operation is performed at the time of defocus shooting of the image input device, at the time of moving image shooting, or at the time of white balance information acquisition at the time of color shooting, and the management capacity pseudo infinity means includes: 5. The defect detection and correction in the image input device according to claim 4, wherein the output data of the defect position storage means is bit-shifted and circulated, and after a predetermined operation, is input to the storage means again. apparatus.