JP2000101594A - Overflow alarm detecting device, method therefor an recording medium recorded with control program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect inversion of a cell transmission order by the fault of one address by comparing respective points after a free address search by contention control and confirming the sequential relation. SOLUTION: After contention control, a search start pointer SP, a read pointer RP, a write pointer WP and a carry flag CRY are set. In this case, it is normal (S4) at the time RP<SP and RP<WP and not being CRY=1, it is normal (S7) at the time of not RP<SP, not RP<WP and not CRY=1 and it is normal (S8) in the case of RP<SP and not RP<WP. Also, an overflow alarm is detected (S9) at the time RP<SP and RP<WP and CRY=1, the overflow alarm is detected (S10) at the time RP<SP and RP<WP and the overflow alarm is detected (S11) at the time not RP<SP, not RP<WP and CRY=1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overflow alarm detecting device, a detecting method, and a recording medium on which a control program is recorded. More particularly, data of a plurality of connections, such as an ATM-crossconnect device and an ATM-SLT device, are transmitted in cell units. Further, the present invention relates to an overflow alarm detecting device and a detecting method used in a device having a shaping function as traffic control, and a recording medium recording a control program.

[0002]

2. Description of the Related Art At present, ATM (Asynchronous Transfer Mode) has been put to practical use as a technique for transmitting multimedia such as voice, image and data. ATM is a system that uses fixed-length packets called cells, has a heterogeneous multiplexing / switching function, and enables high-speed transmission.

[0003] The features of ATM include the following. (1) Multiplexing at arbitrary different speeds becomes possible. (2)
By using the statistical multiplexing effect, it is possible to effectively store randomly generated burst data. (3) Network design, operation, and management can be simplified by non-hierarchical multiplexing. (4) There is fluctuation in the delay.
(5) Cell loss may occur. (6) Channel setting and its capacity setting can be performed separately.

[0004] In the ATM network, a buffer is provided in the SW section and the MUX section to handle a plurality of connections. When burst-like data is input to the network, a difference in transmission density occurs, and a load is imposed on the buffers of the SW unit and the MUX unit. Shaping this bursty data at regular intervals is called shaping.

[0005] As a result of the shaping process, the ring memory
This is a memory for storing cells for a time corresponding to several cells when output is made after several cells. The present invention relates to detection of an overflow alarm of the ring memory.

FIG. 5 is a block diagram of an example of a conventional overflow alarm detecting device. This overflow alarm detection device is generally called a shaper (meaning a circuit having a shaping function). Hereinafter, the overflow alarm detection device may be referred to as a shaper.

The shaper includes a cell identification unit 51 for identifying the type and connection number of an input cell, an algorithm operation unit 52 for determining an ideal transmission time of the input cell, and a main signal memory 53 for holding the input cell until the ideal transmission time. (Ring memory), a memory control unit 54 for controlling read / write of the main signal memory 53, and an algorithm operation unit 5
The mapping unit 55 includes a mapping unit 55 that searches for a write address to the main signal memory 53 by contention control from the ideal transmission time obtained in step 2, and an output unit 56 that performs output processing.

FIG. 6 is a configuration diagram of an example of the mapping unit. The mapping unit 55 has a data flag of the main signal memory 53, and as shown in FIG.
Registers 61 to 67 having data flags 1 to 7) are connected in a ring shape.

The detection of the overflow alarm of the ring memory is performed by taking the AND (logical product) of the data flags of the respective registers. When all the data flags are in the write state, the alarm is detected.

[0010] The shaper is a type of traffic control performed to guarantee the information quality of various communication media in an ATM network. When the user sends information over the contract value to the network, the information is shaped so that the amount of information is within the contract value. An outline of the operation of the shaper will be described with reference to FIG.

The cell input to the shaper is a cell identification unit 5
In step 1, the cell type and connection number are identified from the header information of the input cell, and the cell information is notified to the algorithm operation unit 52.

At the same time, data is output to the memory control unit 54. In the algorithm operation unit 52, the cell identification unit 51
Then, the ideal transmission time is obtained based on the cell information from the base station, and is notified to the mapping unit 55.

The mapping section 55 performs contention control by searching for an empty address from the ideal transmission time, and uses the search result as a write address of the main signal memory 53 as a memory control section 54.
Notify.

The memory control unit 54 writes the data input from the cell identification unit 51 into the main signal memory 53 according to the write address information from the mapping unit 55. The memory control unit 54 also reads from the main signal memory 53, sequentially reads the data in accordance with the arrival time of the data, and outputs the data to the output unit 56.

Next, contention control using the ring memory 53 in the mapping unit 55 will be described with reference to FIG.

The ideal transmission time calculated by the algorithm operation unit 52 is calculated by the mapping unit 55 using the search start pointer S
Converted to P. In the mapping unit 55, the main signal memory 5
3 has the data flags FLG of all the addresses, and if the search start pointer SP is given, the data flag of the search start address to which the search start pointer SP is given is confirmed.

If the data flag is "empty", the corresponding address is notified to the memory control unit 54 as a write pointer WP. If the data flag is in the "present" state, the data flag at the address obtained by adding "1" to the search start pointer SP is confirmed. Repeat this until an "empty" condition is found.

If an "empty" state is not found even after searching to the end of the main signal memory 53, the main signal memory 5
Since 3 is a ring memory, the search is continued by returning to the head of the memory. In this case, the carry flag CRY is set to “1”.

When data is read from the main signal memory 53, the data flag at the address of the read pointer RP is set to "empty".

In the case of FIG. 6, the search start pointer SP converted from the ideal transmission time indicates the address 3 (add3). First, the state of the data flag of add3 is confirmed.

In this case, since the data flag of add3 is in the "present" state, "1" is added to the search start pointer SP, and the data flag of add4 is confirmed. However, since the data flag of add4 is also in the “present” state,
Further, “1” is added to the search start pointer SP, and add
Check the data flag of No. 5. Then, since the data flag of add5 is "empty", add5 becomes the write pointer WP.

On the other hand, on the read side, the write pointer W
After searching for P, the pointer value a of the read pointer RP
Check the state of dd6. In this case, since the data flag is in the “present” state, after reading the data from the main signal memory 53, the data flag is set to the “empty” state. In addition,
If the data flag is "empty", this process is not performed.

The access to the main signal memory 53 is random on the write side, but is sequential on the read side.

That is, in the access to the main signal memory 53, the write side does not access in order of numbers, for example, add1 is accessed next to add3, and then add5 is accessed next. On the side, for example, when add6 is accessed, the next access is add7, the next returns to add1, and the next is add2, and so on.

Access to the main signal memory 53 performed within one cell time is performed once each in the order of write and read.

For this reason, even when data is written to all addresses where writing is completed, one cell data is read in the same cell time reading, so that an empty address is always created when writing the next cell. As a result, the memory does not normally overflow, and if the memory overflows, the memory has failed.

In the overflow alarm detection system of the prior art, the "presence" state is detected by ANDing all the flags of the addresses with the AND gate 68. If the "presence" state is detected, an overflow occurs. Was determined to have occurred.

An example of this type of overflow alarm detecting device is disclosed in Japanese Patent Laid-Open No. Hei 4-26251 (hereinafter referred to as prior art). This device sends out a control signal for limiting the acceptance of a call to a required bus when the result of measuring the queue length of a buffer in a multiplexing cross-connect device reaches a certain value smaller than the buffer length. Therefore, cell loss due to buffer overflow can be reduced.
That is.

[0029]

However, in the prior art, since the overflow alarm is detected by ANDing the status flags of the main signal memory 53, an overflow alarm due to a flag failure at a certain address cannot be detected. There was a disadvantage.

As shown in FIG. 6, normal read data is data A at time 0, data B at time 4, data C at time 5, data D at time 6, and so on.

On the other hand, referring to the configuration diagram of another example of the mapping unit shown in FIG. 7, since add1, 2, 5, 7 fail and all data flags appear to be in the "present" state, their ANDs are taken. The memory overflow alarm 68 becomes "1", and in this case, a failure alarm can be detected.

On the other hand, referring to the configuration diagram of another example of the mapping unit in FIG. 8, if only add5 fails, the memory overflow alarm 68 does not become "1".
Despite the failure not being detected by the memory overflow alarm 68, the read data is data A at time 0 and data 1 at time 0.
Data D, data B at time 4 and data C at time 5, and the reading order is changed in a normal case.

More specifically, referring to FIG.
Although set to d3, add3 and 4 are in the "present" state.
However, the next add5 is "empty", so WP is added.
Try to set to 5.

However, since add5 is out of order, it looks like "present" and WP cannot be set. Subsequently, since add6 is also in the “presence” state, WP eventually becomes ad.
It is set to d7.

If the WP was originally set to add5, the read order was changed because add5 was set to add7 because it was a fault.

As described above, conventionally, in the case of a failure of one address, there is a fatal defect that this failure cannot be detected even though the cell transmission order is reversed.

It is therefore an object of the present invention to provide an overflow alarm detecting device and a detecting method capable of detecting the reversal of the cell sending order due to a failure of one address, and a recording medium on which a control program is recorded.

[0038]

According to a first aspect of the present invention, there is provided a ring memory in which a plurality of data are sequentially written from a lower address in accordance with a preset reading order, and each address of the ring memory. A data flag indicating whether or not the data has been written, and a first address for specifying a temporary address at which the data is to be written to the ring memory.
A pointer, a second pointer that specifies a write address to be written to the ring memory based on the data flag of the temporary address, a third pointer that specifies a read address of the ring memory, and the write address reaches the end. Further, an overflow alarm detection device includes a carry flag indicating whether or not the head has returned to the head, and a reverse rotation detecting means for detecting a reverse of the order of reading data from the ring memory based on the first to third pointers and the carry flag. Is constituted.

According to the first aspect, the reversal of the data reading order is detected based on the positional relationship between the addresses where the first to third pointers are set and whether the carry flag is set. it can.

According to a second aspect of the present invention, there is provided a ring memory in which a plurality of data are written in order from a lower address in accordance with a preset reading order, and whether or not the data is written to each address of the ring memory. A data flag indicating a temporary address at which the data is written to the ring memory; a second pointer specifying a write address at which the data is written to the ring memory based on the data flag of the temporary address; A third pointer for designating a read address of the ring memory, a carry flag indicating whether the write address has reached the end and has returned to the beginning, and a first pointer from the ring memory based on the first to third pointers and a carry flag. An overflow alarm detecting device including a reverse rotation detecting means for detecting a reverse of the order of reading data. A detection method, the reverse detecting means, first determines whether the address of the third pointer is lower than the address of the first pointer
Processing, and when it is determined in the first processing that the address of the third pointer is lower than the address of the first pointer, the address of the third pointer is changed to the second address.
A second process of determining whether or not the address of the pointer is lower than the address of the pointer; and, in the second process, determining that the address of the third pointer is lower than the address of the second pointer. A third process for determining whether or not the carry flag indicates that the write address has returned from the end to the beginning; and in the third process, the carry flag indicates that the write address has returned from the end to the beginning. And determining that the order of reading data from the ring memory is reversed.

According to the second aspect, the same operation and effect as those of the first aspect can be obtained.

Further, according to a third aspect of the present invention, there is provided a ring memory in which a plurality of data are sequentially written from a lower address in accordance with a preset reading order, and whether or not the data is written to each address of the ring memory. A data flag indicating a temporary address at which the data is written to the ring memory; a second pointer specifying a write address at which the data is written to the ring memory based on the data flag of the temporary address; A third pointer for designating a read address of the ring memory, a carry flag indicating whether the write address has reached the end and has returned to the beginning, and a first pointer from the ring memory based on the first to third pointers and a carry flag. An overflow alarm detecting means for detecting a reverse of the order of reading data. A first process for determining whether or not the address of the third pointer is lower than the address of the first pointer on the recording medium on which the control program of the apparatus is recorded; When it is determined that the address of the third pointer is lower than the address of the first pointer, it is determined whether the address of the third pointer is lower than the address of the second pointer. A second process, and when it is determined in the second process that the address of the third pointer is lower than the address of the second pointer, the carry flag changes the write address from the last to the first. A third process of determining whether or not the return has been performed, and determining that the carry flag indicates that the write address has returned from the end to the top in the third process. If it, characterized in that the reading order of data from the ring memory has recorded a control program for executing a fourth process for determining that the reverse to the computer.

According to the third aspect, the same operation and effect as those of the first aspect can be obtained.

[0044]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a configuration diagram of a main part of an overflow alarm detection device according to the present invention, FIG. 2 is a diagram in which contention control operations are classified according to conditions, and FIG. 3 is a flowchart showing operations of the present invention.

First, the outline of the present invention will be described. In the conventional method, in order to detect an overflow alarm, the data flags of all addresses have to be in the "present" state. On the other hand, according to the present invention, after searching for a free address by conflict control, each pointer is compared and the context is confirmed, thereby detecting an alarm when the order of the cells is reversed.

According to the present invention, the search start pointer SP, the write pointer WP, the read pointer RP, and the carry CRY
Is set, and as shown in FIG. 3, when “RP <SP and RP <WP and CRY = 1” of the condition 4, “RP ≧
SP and RP <WP and condition 6 “RP ≧ SP”
When RP ≧ WP and CRY = 1, an overflow alarm is detected.

As a result, even in the case of a failure of only one address, which cannot be detected by the conventional method, the failure can be detected.

Also, according to the present invention alone, the WP cannot be set when the data flags of all the addresses for which an alarm has been detected in the prior art are "present", so that the alarm cannot be detected.

Therefore, the overflow alarm is detected by using the present invention in combination with the conventional method, that is, the method of ANDing the flags of all addresses.

The overall configuration of the overflow alarm detecting device according to the present invention is the same as that of the conventional example shown in FIG.
Since the configuration of the mapping unit also includes the configuration of FIG. 6, illustration and operation description are omitted.

In the present invention, the mapping unit 55 includes the configuration of FIG. 1 in addition to the configuration of FIG. That is, the present invention is shown in FIG.
And an overflow alarm having a configuration shown in FIG. 1 and an overflow alarm having a configuration shown in FIG.

Next, a first embodiment will be described. In the first embodiment, after searching for a free address by contention control, each pointer value is compared and the context is confirmed, thereby outputting an alarm when the order of the cells is reversed.

The detailed procedure will be described with reference to FIGS. After the conflict control, the search start pointer SP, the read pointer RP, the write pointer WP, and the carry flag CRY
Set.

FIG. 2 shows the positional relationship between the pointers after the conflict control.
These conditions can be classified into the following six conditions, and each condition is represented in a flowchart as shown in FIG.

That is, referring to the flowchart of FIG.
If RP <SP (YES in S1), RP <WP (YES in S2), and if CRY = 1 is not true (NO in S3), it is normal (S4). This is condition 1.

Also, not RP <SP (NO in S1),
If RP <WP is not satisfied (NO in S5) and CRY = 1 is not satisfied (NO in S6), it is normal (S7). This is condition 2.

If RP <SP (YES in S1),
If it is not RP <WP (NO in S2), it is normal (S8). This is condition 3.

If RP <SP (YES in S1),
If RP <WP (YES in S2) and CRY = 1 (YES in S3), an overflow alarm is detected (S9). This is condition 4.

Also, not RP <SP (NO in S1),
If RP <WP (YES in S5), an overflow alarm is detected (S10). This is condition 5.

Also, not RP <SP (NO in S1),
If RP <WP is not satisfied (NO in S5) and CRY = 1 (YES in S6), an overflow alarm is detected (S11). This is condition 6.

Next, the main part of the present invention, that is, the mapping unit 5
5 will be described. Referring to FIG. 1, mapping unit 55 includes comparison circuits CMP1 and CMP2 and OR gate OR.
1 to 3 and AND gates AND1 to AND5.

As described above, the mapping unit 55 also has an overflow alarm having the configuration shown in FIG.

FIG. 1 Comparison between RP and SP in CMP1
RP and WP are compared by CMP2. Next, the “RP <SP” output of the CMP1 and the “RP <SP” output of the CMP2 are ANDed (AND1), and the output obtained by ANDing this output of the AND1 and CRY (AND3) is the condition 4.

Further, “RP = SP” and “RP>
SP ”OR (OR1) and CMP2“ RP <SP ”
AND4 (AND4) is the output of AND4.

Further, “RP = SP” and “RP>
SP ”OR (OR1) and CMP2“ RP = WP ”
AND (OR2) of “RP> WP” with AND (AND
2) Then, the output of AND2 and CRY are ANDed.
(AND5) The output of AND5 is the condition 6.

Finally, these ANDs 3 to 5 are ORed (OR
3) Use the output as an overflow alarm.

Next, a second embodiment will be described. The second embodiment relates to a recording medium on which a control program for an overflow alarm detection device is recorded.

FIG. 4 is a configuration diagram of a recording medium and its driving device. Referring to FIG. 1, the driving device includes a CPU (central processing unit) 71, an input unit 72, a storage device 73, an output unit 74, and a mapping unit 1, and is driven by this driving device for convenience. The recording medium 2 is also displayed.

The mapping unit 1 has the configuration shown in FIG. 1, and the recording medium 2 stores the program shown in the flowchart of FIG.

Next, the operation of the driving device will be described. A program load instruction is input from the input unit 72 to the CPU.
When input to 71, CPU 71 reads the program recorded on recording medium 2 and writes the read program in storage device 73.

Next, when a program run command is input to the CPU 71 from the input section 72, the CPU 71 reads out the program recorded on the recording medium 2 and controls the mapping section 1 according to the program.

The description of the control contents of the mapping unit 1 has been described above, and will not be repeated. The overflow alarm is displayed on the output unit 74.

[0073]

According to the first aspect of the present invention, a ring memory in which a plurality of data are written sequentially from a lower address in accordance with a preset reading order, and whether the data is written to each address of the ring memory A first address specifying a temporary address at which the data is to be written to the ring memory; and a second pointer specifying a write address at which the data is to be written to the ring memory based on the data flag of the temporary address. A third pointer that specifies a read address of the ring memory, a carry flag that indicates whether the write address has reached the end and has returned to the beginning, and the first to third pointers and the carry flag. Reversal detection means for detecting reversal of the order of reading data from the ring memory; Because you configure the detection apparatus, the first
The reverse of the data reading order can be detected based on the positional relationship between the addresses where the third pointer is set and whether the carry flag is set.

According to the second aspect of the present invention, a ring memory in which a plurality of data are written sequentially from a lower address in accordance with a preset reading order, and whether the data is written to each address of the ring memory A first address specifying a temporary address at which the data is to be written to the ring memory; and a second pointer specifying a write address at which the data is to be written to the ring memory based on the data flag of the temporary address. A third pointer that specifies a read address of the ring memory, a carry flag that indicates whether the write address has reached the end and has returned to the beginning, and the first to third pointers and the carry flag. Reversal detection means for detecting reversal of the order of reading data from the ring memory A detection method of a detection device, wherein the reverse rotation detection means determines whether or not the address of the third pointer is lower than the address of the first pointer. When it is determined that the address of the third pointer is lower than the address of the first pointer, it is determined whether or not the address of the third pointer is lower than the address of the second pointer. 2 and if the second processing determines that the address of the third pointer is lower than the address of the second pointer, the carry flag returns the write address from the end to the top. A third process of determining whether or not the write address indicates that the write address has returned from the end to the top in the third process; Since the reading sequence data from the serial ring memory includes a fourth process for determining that the reverse, the same effect as the first invention.

According to the third aspect of the present invention, a ring memory in which a plurality of data are written in order from a lower address in accordance with a preset reading order, and whether the data is written to each address of the ring memory A first address specifying a temporary address at which the data is to be written to the ring memory; and a second pointer specifying a write address at which the data is to be written to the ring memory based on the data flag of the temporary address. A third pointer that specifies a read address of the ring memory, a carry flag that indicates whether the write address has reached the end and has returned to the beginning, and the first to third pointers and the carry flag. Reversal detection means for detecting reversal of the order of reading data from the ring memory A first process for determining whether or not the address of the third pointer is lower than the address of the first pointer on the recording medium on which the control program of the detecting device is recorded; If it is determined in the processing that the address of the third pointer is lower than the address of the first pointer, it is determined whether the address of the third pointer is lower than the address of the second pointer. A second process for determining, and when the address of the third pointer is determined to be lower than the address of the second pointer in the second process, the carry flag indicates that the write address is from the last to the first. A third process of determining whether or not the return to
If it is determined in the processing that the carry flag indicates that the write address has returned from the end to the beginning,
Since a control program for causing a computer to execute the fourth process of determining that the order of reading data from the ring memory is reversed is recorded, the same effects as those of the first invention are obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a main part of an overflow alarm detection device according to the present invention.

FIG. 2 is a diagram in which contention control operations are classified according to conditions;

FIG. 3 is a flowchart showing the operation of the present invention.

FIG. 4 is a configuration diagram of a recording medium and a driving device thereof.

FIG. 5 is a configuration diagram of an example of a conventional overflow alarm detection device.

FIG. 6 is a configuration diagram of an example of a mapping unit.

FIG. 7 is a configuration diagram of another example of a mapping unit.

FIG. 8 is a configuration diagram of another example of the mapping unit.

[Explanation of symbols]

 1, 55 mapping unit 2 recording medium 51 cell identification unit 52 algorithm operation unit 53 main signal memory 54 memory control unit 55 mapping unit 56 output unit 61 to 67 register 68 AND gate AND1 to 5 AND gate CMP1, comparison circuit OR1 -3 OR gate

Claims (13)

[Claims] 1. A ring memory in which a plurality of data are written in order from a lower address according to a preset reading order, a data flag indicating whether or not the data is written to each address of the ring memory, A first pointer for specifying a tentative address for writing the data to the ring memory, a second pointer for specifying a write address for writing to the ring memory based on the data flag of the tentative address, and a read address for the ring memory And a carry flag indicating whether the write address has reached the end and has returned to the beginning, and an order in which data is read from the ring memory based on the first to third pointers and the carry flag. Overflow detection means for detecting a reverse rotation of the vehicle. Place. 2. The reverse rotation detecting means, wherein the address of the third pointer is lower than the address of the first pointer, the address of the third pointer is lower than the address of the second pointer, and 2. The overflow alarm detecting device according to claim 1, wherein when the carry flag indicates that the write address has returned from the end to the start, the overflow alarm detecting device detects that the order of reading data from the ring memory is reversed. . 3. The reverse rotation detecting means, wherein the address of the third pointer is equal to or higher than the address of the first pointer, and the address of the third pointer is higher than the address of the second pointer. 2. The overflow alarm detecting device according to claim 1, wherein when the address is lower than the address of the pointer, it is detected that the order of reading data from the ring memory is reversed. 4. The reverse rotation detecting means, wherein the address of the third pointer is equal to or higher than the address of the first pointer, and the address of the third pointer is higher than the address of the second pointer. When the carry flag indicates that the write address has returned from the tail to the head, the order of reading data from the ring memory is reversed. 2. The overflow alarm detecting device according to claim 1, wherein the overflow alarm is detected. 5. The overflow alarm detecting device according to claim 1, wherein said ring memory is used for shaping burst-like data input to an ATM network at a predetermined interval. 6. A ring memory in which a plurality of data are written in order from a lower address in accordance with a preset reading order, a data flag indicating whether or not the data is written to each address of the ring memory, A first pointer for specifying a tentative address for writing the data to the ring memory, a second pointer for specifying a write address for writing to the ring memory based on the data flag of the tentative address, and a read address for the ring memory And a carry flag indicating whether the write address has reached the end and has returned to the beginning, and an order in which data is read from the ring memory based on the first to third pointers and the carry flag. And a reversal detection means for detecting reversal of the signal. The reverse rotation detecting means determines whether or not the address of the third pointer is lower than the address of the first pointer, and the address of the third pointer is determined in the first processing. When it is determined that the address of the third pointer is lower than the address of the first pointer, a second process of determining whether the address of the third pointer is lower than the address of the second pointer, If it is determined in step 2 that the address of the third pointer is lower than the address of the second pointer, the carry flag indicates whether the write address has returned from the end to the beginning. A third process for determining whether or not the carry flag indicates that the write address has returned from the end to the beginning in the third process. And a fourth process of determining that the order in which data is read out is reversed. 7. A fifth process for determining whether or not the address of the third pointer is equal to the address of the first pointer or higher than the address of the first pointer, In this fifth process, the third
When it is determined that the address of the pointer is equal to the address of the first pointer or higher than the address of the first pointer, the address of the third pointer is lower than the address of the second pointer. A sixth process of determining whether the address of the third pointer is lower than the address of the second pointer in the sixth process, and reading data from the ring memory. 7. The overflow alarm detection method according to claim 6, further comprising: a seventh process for determining that the order is reversed. 8. An eighth process for determining whether the address of the third pointer is equal to the address of the first pointer or higher than the address of the first pointer; In the eighth process, the third
If it is determined that the address of the pointer is equal to the address of the first pointer or higher than the address of the first pointer, the address of the third pointer is equal to the address of the second pointer or A ninth process for determining whether or not the address is higher than the address of the second pointer; and in this ninth process, the address of the third pointer is equal to the address of the second pointer or the address of the second pointer. If it is determined that the carry flag is higher than the carry flag, the carry flag indicates whether the write address indicates that the write address has returned from the end to the head, and in the tenth process, the carry flag is determined. Indicates that the write address has returned from the end to the beginning, the order in which data is read from the ring memory. Overflow alarm detection method according to claim 6, characterized in that it comprises but a 11th process determines to be reversed. 9. The overflow alarm detection method according to claim 6, wherein said ring memory is used for shaping burst-like data input to an ATM network at regular intervals. 10. A ring memory in which a plurality of data are sequentially written from a lower address in accordance with a preset reading order, a data flag indicating whether or not the data is written to each address of the ring memory, A first address for specifying a temporary address at which the data is written to the ring memory;
A pointer, a second pointer that specifies a write address to be written to the ring memory based on the data flag of the temporary address, a third pointer that specifies a read address of the ring memory, and the write address reaches the end. The overflow alarm detecting device further includes a carry flag indicating whether or not the head has returned to the head, and a reverse rotation detecting means for detecting a reverse of the order of reading data from the ring memory based on the first to third pointers and the carry flag. A recording medium on which a control program is recorded, wherein a first process of determining whether an address of the third pointer is lower than an address of the first pointer, and the third pointer Address is the first
When it is determined that the address of the third pointer is lower than the address of the pointer, a second process of determining whether the address of the third pointer is lower than the address of the second pointer; When it is determined that the address of the third pointer is lower than the address of the second pointer, it is determined whether the carry flag indicates that the write address has returned from the end to the beginning. And if the carry flag indicates that the write address has returned from the end to the head in the third process, the order of reading data from the ring memory is reversed. A recording medium on which a control program for causing a computer to execute a fourth process to be determined is recorded. 11. A fifth step of judging whether the address of the third pointer is equal to the address of the first pointer or higher than the address of the first pointer.
Processing, and when it is determined in the fifth processing that the address of the third pointer is equal to or higher than the address of the first pointer, the address of the third pointer is determined. A process for determining whether or not is lower than the address of the second pointer, and it is determined in the sixth process that the address of the third pointer is lower than the address of the second pointer. 11. A control program for causing a computer to execute a seventh process of judging that the order of reading data from the ring memory is reversed in the case where the data is read.
The recording medium according to the above. 12. An eighth step of judging whether the address of the third pointer is equal to the address of the first pointer or higher than the address of the first pointer.
And if the address of the third pointer is equal to or higher than the address of the first pointer in the eighth process, the address of the third pointer is determined. Ninth processing for determining whether or not is equal to the address of the second pointer or higher than the address of the second pointer;
When it is determined in the ninth processing that the address of the third pointer is equal to the address of the second pointer or is higher than the address of the second pointer,
A tenth process for determining whether the carry flag indicates that the write address has returned from the tail to the head, and in the tenth process, the carry flag indicates that the write address has returned from the tail to the head. 11. A recording medium according to claim 10, further comprising a control program for causing a computer to execute an eleventh process of determining that the order of reading data from the ring memory is reversed when it is determined that the data is read. . 13. The recording medium according to claim 10, wherein said ring memory is used for shaping burst-like data input to an ATM network at regular intervals.