JP2000100993A - High-frequency circuit board - Google Patents
High-frequency circuit boardInfo
- Publication number
- JP2000100993A JP2000100993A JP10269930A JP26993098A JP2000100993A JP 2000100993 A JP2000100993 A JP 2000100993A JP 10269930 A JP10269930 A JP 10269930A JP 26993098 A JP26993098 A JP 26993098A JP 2000100993 A JP2000100993 A JP 2000100993A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- distance
- frequency circuit
- hole
- ground electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims description 31
- 230000002542 deteriorative effect Effects 0.000 abstract 2
- 230000000452 restraining effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 238000012937 correction Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000005672 electromagnetic field Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Waveguide Connection Structure (AREA)
- Waveguides (AREA)
Abstract
Description
【０００１】[0001]
【発明の技術分野】本発明は、スルーホールを有する高
周波回路基板及び該基板を備えた半導体装置に関し、特
に、スルーホール部での伝送損失を小さくすることがで
きる高周波回路基板及び該基板を備えた半導体装置に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency circuit board having a through-hole and a semiconductor device having the same, and more particularly, to a high-frequency circuit board capable of reducing transmission loss in a through-hole and having the board. Semiconductor device.
【０００２】[0002]
【従来の技術】従来、表面に素子又は回路チップからな
るモジュールが搭載される誘電体基板にスルーホールを
設け、該モジュールが電気的に接続される基板表面の伝
送線路をスルーホールを介して基板裏面に設けた伝送線
路に電気的に接続することにより、該基板裏面を外部回
路基板上に面実装可能にしている半導体装置が提案され
ている。しかしながら、このような構成の半導体装置
は、取り扱う信号の周波数が１０ＧＨｚ程度以上になる
と、スルーホールによる透過損失が急激に大きくなるこ
とが知られている。したがって、上記した従来例の構成
は、マイクロ波帯及びミリ波帯の信号を伝送させた場合
には信号の特性劣化が著しく、これらの周波数領域の信
号処理には適していない。2. Description of the Related Art Conventionally, a through hole is provided in a dielectric substrate on which a module comprising an element or a circuit chip is mounted, and a transmission line on the surface of the substrate to which the module is electrically connected is connected to the substrate through the through hole. There has been proposed a semiconductor device in which the back surface of the substrate is electrically mountable on an external circuit board by being electrically connected to a transmission line provided on the back surface. However, it is known that, in a semiconductor device having such a configuration, when a frequency of a signal to be handled becomes about 10 GHz or more, a transmission loss due to a through hole rapidly increases. Therefore, the configuration of the above-described conventional example significantly deteriorates signal characteristics when signals in the microwave band and the millimeter wave band are transmitted, and is not suitable for signal processing in these frequency regions.
【０００３】このような問題点に鑑み、スルーホールを
用いていない高周波回路基板が既に提案されている。図
６は、このような高周波回路基板の断面を示しており、
該高周波回路基板は、多層構造等の誘電体基板１で構成
され、その内部に複数のスロット孔１１を設けたグラン
ド電極層６を設けるとともに、モジュール５が配置接続
される基板の表面にストリップ導体７を形成してグラン
ド電極層６とともにマイクロストリップ線路８を構成
し、さらに、外部回路基板上に面実装される基板裏面に
もストリップ導体９を形成してグランド電極層６ととも
にマイクロストリップ線路１０を構成し、これら２つの
マイクロストリップ線路をグランド電極層のスロット孔
１１を介して電磁結合させるよう構成されている。この
ような半導体装置によれば、スルーホールを必要としな
いため、それによる透過損失を生じることがないので、
高周波信号を比較的劣化が少ない状態で伝送することが
できる。In view of such problems, a high-frequency circuit board that does not use a through-hole has already been proposed. FIG. 6 shows a cross section of such a high-frequency circuit board,
The high-frequency circuit board is constituted by a dielectric substrate 1 having a multilayer structure or the like, in which a ground electrode layer 6 provided with a plurality of slot holes 11 is provided, and a strip conductor is provided on the surface of the board on which the module 5 is arranged and connected. 7, a microstrip line 8 is formed together with the ground electrode layer 6, and a strip conductor 9 is also formed on the back surface of the substrate, which is surface-mounted on an external circuit board, to form the microstrip line 10 together with the ground electrode layer 6. The two microstrip lines are electromagnetically coupled via a slot hole 11 in the ground electrode layer. According to such a semiconductor device, since a through hole is not required, no transmission loss is caused thereby.
High frequency signals can be transmitted with relatively little degradation.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、図６の
従来例においては、マイクロストリップ線路８、１０を
構成するために基板内部にグランド電極層６を設ける必
要があり、したがって、その製造が単一層の基板に比べ
て複雑であり高価となる。したがって、安価な単一層の
基板を用い、スルーホールによる高周波信号の特性劣化
を抑制することができる高周波回路基板の提供が待たれ
ていた。本発明は、このような従来例の課題を解決する
ためになされたものであり、その目的は、スルーホール
を有する単一層の基板を用いた高周波回路基板におい
て、高周波信号をその特性劣化を抑制して伝送できるよ
うにすることである。However, in the prior art shown in FIG. 6, it is necessary to provide the ground electrode layer 6 inside the substrate in order to form the microstrip lines 8, 10, and therefore, the manufacturing thereof is performed in a single layer. Is more complicated and more expensive than the conventional substrate. Therefore, it has been desired to provide a high-frequency circuit board that uses an inexpensive single-layer board and can suppress the deterioration of high-frequency signal characteristics due to through holes. The present invention has been made in order to solve such problems of the conventional example, and an object of the present invention is to suppress deterioration of characteristics of a high-frequency signal in a high-frequency circuit board using a single-layer board having through holes. To enable transmission.
【０００５】[0005]
【課題を解決するための手段】上記した本発明の目的を
達成するために、本発明においては、誘電体基板の表面
及び裏面にグランド付きコプレーナ線路からなる一対の
伝送線路を設け、これらの伝送線路を誘電体基板に設け
たスルーホールを介して電気的に接続した高周波回路基
板において、各伝送線路と同一平面上のグランド電極と
の間隔が、スルーホール近傍において他の部分と比べて
広く設定されていることを特徴としている。本発明にお
いては、スルーホール近傍における伝送線路とグランド
電極との間隔Ｗが、所定のコプレーナ線路の特性インピ
ーダンスを有する部分の間隔ｄ１と対比して、ｄ１<Ｗ
≦３ｄ１に設定されることが好ましい。さらに、本発明
においては、コプレーナ線路の特性インピーダンスを決
定している部分である伝送線路の側縁とグランド電極と
の間隔ｄ１、スルーホール近傍における伝送線路の側縁
とグランド電極との間隔ｄ２、スルーホール近傍におけ
る伝送線路の端縁とグランド電極との間隔ｄ３、並び
に、スルーホール近傍における伝送線路の端縁と間隔ｄ
１及びｄ２の境界との間隔ｄ４が、ｄ１<ｄ２≦２ｄ
１、２ｄ１≦ｄ３≦３ｄ１、２ｄ１≦ｄ４≦３ｄ１に設
定されることが好ましい。In order to achieve the above-mentioned object of the present invention, according to the present invention, a pair of transmission lines comprising a grounded coplanar line are provided on the front and back surfaces of a dielectric substrate. In a high-frequency circuit board where lines are electrically connected via through holes provided in a dielectric substrate, the distance between each transmission line and the ground electrode on the same plane is set wider in the vicinity of the through hole than in other parts. It is characterized by being. In the present invention, the distance W between the transmission line and the ground electrode in the vicinity of the through hole is d1 <W, as compared with the distance d1 of the portion having the characteristic impedance of the predetermined coplanar line.
It is preferable to set ≦ 3d1. Further, in the present invention, the distance d1 between the side edge of the transmission line and the ground electrode, which is the part that determines the characteristic impedance of the coplanar line, the distance d2 between the side edge of the transmission line and the ground electrode near the through hole, The distance d3 between the edge of the transmission line near the through hole and the ground electrode, and the distance d between the edge of the transmission line near the through hole and d
The distance d4 from the boundary between 1 and d2 is d1 <d2 ≦ 2d
It is preferable to set 1,2d1 ≦ d3 ≦ 3d1,2d1 ≦ d4 ≦ 3d1.
【０００６】[0006]
【発明の実施の態様】図１及び図２は、本発明の第１及
び第２の実施例の高周波回路基板を示している。図１及
び図２において、（Ａ）及び（Ｂ）は高周波回路基板の
表面図及び裏面図、（Ｃ）は該基板にモジュールＭＭＩ
Ｃを配置した状態の線Ａ−Ａ及び線Ｂ−Ｂに沿った断面
図を示している。これらの図において、１はセラミック
ス等からなる誘電体基板、２１、２２、２１'、２２'は
誘電体基板１の表裏面上に形成されたコプレーナ線路で
あり、信号の伝送線路を構成する。３０、３０'は誘電
体基板１の表裏面上に形成されたグランド電極、４１、
４２は誘電体基板１の中心線上の点にて該基板を貫通し
て設けられたスルーホールである。誘電体基板１の裏面
上の各コプレーナ線路に対向する箇所には、図１及び図
２から明らかなように、グランド電極が設けられてお
り、したがって、伝送線路を構成するコプレーナ線路２
１、２２、２１'、２２'は、グランド付きコプレーナ線
路である。1 and 2 show high-frequency circuit boards according to first and second embodiments of the present invention. 1 and 2, (A) and (B) are front and rear views of a high-frequency circuit board, and (C) is a module MMI on the board.
FIG. 3 shows a cross-sectional view along line AA and line BB in a state where C is arranged. In these figures, reference numeral 1 denotes a dielectric substrate made of ceramics or the like, and 21, 22, 21 'and 22' denote coplanar lines formed on the front and back surfaces of the dielectric substrate 1, and constitute a signal transmission line. Reference numerals 30, 30 'denote ground electrodes formed on the front and back surfaces of the dielectric substrate 1, 41,
Reference numeral 42 denotes a through hole provided at a point on the center line of the dielectric substrate 1 so as to penetrate the substrate. As is clear from FIGS. 1 and 2, a ground electrode is provided at a position on the back surface of the dielectric substrate 1 facing each coplanar line, and therefore, a coplanar line 2 constituting a transmission line is provided.
1, 22, 21 'and 22' are grounded coplanar lines.
【０００７】誘電体基板１の表裏に形成されたコプレー
ナ線路２１、２１'は、スルーホール４１を介して電気
的に接続され、同様に、コプレーナ線路２２、２２'は
スルーホール４２を介して電気的に接続されている。コ
プレーナ線路及びグランド電極からなる誘電体基板１表
面及び裏面上の電極パターンは、フォトリソグラフィ又
はスクリーン印刷等によってパターニングされ形成され
る。スルーホール４１、４２は、ＮＣパンチ等の機械加
工によって形成される。The coplanar lines 21 and 21 ′ formed on the front and back of the dielectric substrate 1 are electrically connected through through holes 41, and similarly, the coplanar lines 22 and 22 ′ are electrically connected through through holes 42. Connected. The electrode pattern on the front and back surfaces of the dielectric substrate 1 including the coplanar line and the ground electrode is patterned and formed by photolithography or screen printing. The through holes 41 and 42 are formed by machining such as an NC punch.
【０００８】図１に示した第１の実施例においては、誘
電体基板１の中心部１５がモジュールＭＭＩＣのサイズ
に打ち抜かれており、該モジュールが、図１（Ｃ）に示
すように、誘電体基板１に埋め込み状態に固定配置され
る。モジュールと誘電体基板１上のコプレーナ線路２
１、２２との電気的接続は、ワイアボンディング（ワイ
ア５１、５２）により行われる。図２に示した第２の実
施例においては、誘電体基板１の中心部を打ち抜かず
に、表面中心部に電極パターンを形成しない部分を設け
ている。該部分に対応する裏面中心部にはグランド電極
が形成されている。モジュールＭＭＩＣは、図２（Ｃ）
に示すように、誘電体基板１の表面の中心部に載置さ
れ、コプレーナ線路２１、２２と直接電気的に接続され
る。In the first embodiment shown in FIG. 1, the central portion 15 of the dielectric substrate 1 is punched to the size of a module MMIC, and as shown in FIG. It is fixedly arranged in the embedded state in the body substrate 1. Module and coplanar line 2 on dielectric substrate 1
The electrical connection with the wirings 1 and 22 is made by wire bonding (wires 51 and 52). In the second embodiment shown in FIG. 2, a portion where an electrode pattern is not formed is provided at the center of the surface without punching the center of the dielectric substrate 1. A ground electrode is formed at the center of the back surface corresponding to this portion. The module MMIC is shown in FIG.
As shown in (1), it is placed at the center of the surface of the dielectric substrate 1 and is directly electrically connected to the coplanar lines 21 and 22.
【０００９】図３（Ａ）及び（Ｂ）は、図１及び図２に
示した本発明の高周波回路基板におけるコプレーナ線路
２１、２２、２１'、２２'、グランド電極３０、３
０'、及びスルーホール４１、４２の配置関係を説明す
るための斜視図及び平面図を示している。なお、図３に
おいては、図１の線Ｃ−Ｃから左部分又は線Ｄ−Ｄから
右部分を切断して示しており、また、コプレーナ線路、
グランド電極及びスルーホールを代表的に、参照番号２
０、３０及び４０で示している。図３（Ｂ）に示すよう
に、コプレーナ線路２０は、矩形形状を有し、その一端
部にスルーホール４０が形成され、そして適宜の間隔
（ｄ１、ｄ２、ｄ３）を介してグランド電極３０に囲繞
されている。コプレーナ線路２０及びグランド電極３０
からなる電極パターンは、スルーホール４０及びコプレ
ーナ線路２０の中心を通る線Ｅ−Ｅに対して線対称に形
成されている。図３には示されていないが、誘電体基板
１の裏面にも、スルーホール４０に対して点対称の関係
にコプレーナ線路及びグランド電極が形成されている。FIGS. 3A and 3B show the coplanar lines 21, 22, 21 ', 22' and the ground electrodes 30, 3 in the high-frequency circuit board of the present invention shown in FIGS.
FIG. 2 shows a perspective view and a plan view for explaining the arrangement relationship between 0 ′ and the through holes 41 and. In FIG. 3, a left portion from line CC or a right portion from line DD in FIG. 1 is cut and shown.
Reference number 2 typically represents a ground electrode and a through hole.
0, 30 and 40 are shown. As shown in FIG. 3B, the coplanar line 20 has a rectangular shape, a through hole 40 is formed at one end thereof, and the coplanar line 20 is connected to the ground electrode 30 via an appropriate interval (d1, d2, d3). It is surrounded. Coplanar line 20 and ground electrode 30
Is formed symmetrically with respect to a line EE passing through the through hole 40 and the center of the coplanar line 20. Although not shown in FIG. 3, a coplanar line and a ground electrode are also formed on the back surface of the dielectric substrate 1 in a point-symmetric relationship with respect to the through hole 40.
【００１０】スルーホール４０から離れているコプレー
ナ線路２０の両側縁とグランド電極３０との間の間隔ｄ
１は、伝送線路の所定の特性インピーダンスを有する部
分であり、該特性インピーダンスが５０Ωとなるように
設定されている。また、スルーホール４０近傍のコプレ
ーナ線路２０の側縁とグランド電極３０との間の間隔ｄ
２、及びスルーホール４０近傍のコプレーナ線路２０の
端縁とグランド電極３０との間隔ｄ３は、所望の通過帯
域で減衰量が最小となるように、電磁界シミュレーショ
ンによって決定される。なお、間隔ｄ４は、コプレーナ
線路２０のスルーホール側の端縁と間隔ｄ１及びｄ２の
境界との距離である。The distance d between the side edges of the coplanar line 20 away from the through hole 40 and the ground electrode 30
Reference numeral 1 denotes a portion of the transmission line having a predetermined characteristic impedance, which is set so that the characteristic impedance becomes 50Ω. Also, a distance d between the side edge of the coplanar line 20 near the through hole 40 and the ground electrode 30.
2, and the distance d3 between the edge of the coplanar line 20 near the through hole 40 and the ground electrode 30 are determined by electromagnetic field simulation such that the attenuation is minimized in a desired pass band. The interval d4 is the distance between the edge of the coplanar line 20 on the through hole side and the boundary between the intervals d1 and d2.
【００１１】電磁界シミュレーション及び種々の実機テ
ストの結果、間隔ｄ１〜ｄ３が、 ｄ１<ｄ２≦３ｄ１ ｄ１<ｄ３≦３ｄ１ を満足している場合に、伝送特性の向上が認められた。
なお、ｄ２及びｄ３をまとめてＷで表すと、上記不等式
は ｄ１<Ｗ≦３ｄ１ で表される。さらにまた、間隔ｄ１〜ｄ４が、 ｄ１<ｄ２≦２ｄ１ ２ｄ１≦ｄ３≦３ｄ１ ２ｄ１≦ｄ４≦３ｄ１ を満足するように設定した場合に、伝送特性の劣化がよ
り低減されるという結果が得られた。As a result of electromagnetic field simulations and various actual machine tests, when the distances d1 to d3 satisfy d1 <d2 ≦ 3d1 d1 <d3 ≦ 3d1, improvement in transmission characteristics was observed.
When d2 and d3 are collectively represented by W, the above inequality is represented by d1 <W ≦ 3d1. Furthermore, when the intervals d1 to d4 are set so as to satisfy d1 <d2 ≦ 2d1 2d1 ≦ d3 ≦ 3d1 2d1 ≦ d4 ≦ 3d1, the result that the deterioration of the transmission characteristics is further reduced is obtained.
【００１２】図４の（Ａ）及び（Ｂ）は、実機テストに
より本発明及び従来例の入出力間の伝送特性をネットワ
ークアナライザで測定した結果を対比して示したグラフ
である。従来例においては（グラフＢ）、誘電体基板１
の材料として、誘電率７．５のセラミックスを用い、図
５に示すように、信号ラインとグランド電極との距離を
一定の値ａに設定した回路基板を用いた。本発明の実験
例においては（グラフＡ）、誘電体基板１の材料とし
て、従来例の場合と同様に誘電率７．５のセラミックス
を用い、図３に示した構造を用いた。また、図３（Ｂ）
に示したそれぞれの間隔ｄ１〜ｄ４は、 ｄ１＝ａ ｄ２＝１．５ａ ｄ３＝ｄ４＝２．５ａ に設定した。図４から明らかなように、本発明の高周波
回路基板によれば、５５〜８０ＧＨｚの範囲で−０．５
ｄＢ以上の伝送特性が得られており、これに対して、従
来例においては、この周波数範囲で−１．０ｄＢ程度で
ある。したがって、本発明によれば、従来例に比べて減
衰量が１／２に低減されていることが分かる。FIGS. 4 (A) and 4 (B) are graphs showing comparisons between the transmission characteristics between the input and output of the present invention and the conventional example measured by a network analyzer by actual machine tests. In the conventional example (graph B), the dielectric substrate 1
As a material of the above, a ceramic substrate having a dielectric constant of 7.5 was used, and a circuit board in which the distance between the signal line and the ground electrode was set to a constant value a as shown in FIG. In the experimental example of the present invention (Graph A), as the material of the dielectric substrate 1, a ceramic having a dielectric constant of 7.5 was used as in the conventional example, and the structure shown in FIG. 3 was used. FIG. 3 (B)
Are set as d1 = ad2 = 1.5a d3 = d4 = 2.5a. As is clear from FIG. 4, according to the high-frequency circuit board of the present invention, -0.5 in the range of 55 to 80 GHz.
A transmission characteristic of more than dB is obtained, whereas in the conventional example, it is about -1.0 dB in this frequency range. Therefore, according to the present invention, it can be seen that the amount of attenuation is reduced to half compared with the conventional example.
【００１３】以上説明したように、本発明の高周波回路
基板によれば、信号ラインとグランド電極との間隔をス
ルーホール近傍において広くしているので、インピーダ
ンスマッチングを行うことができる。したがって、マイ
クロ波帯及びミリ波帯の信号がスルーホールを介して伝
達されることによる伝送特性の劣化を低減することがで
きる。As described above, according to the high-frequency circuit board of the present invention, the distance between the signal line and the ground electrode is increased near the through hole, so that impedance matching can be performed. Therefore, it is possible to reduce deterioration of transmission characteristics due to transmission of signals in the microwave band and the millimeter wave band through the through holes.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の高周波回路基板の第１の実施例を示す
表面図、裏面図及び断面図である。FIG. 1 is a front view, a rear view, and a cross-sectional view showing a first embodiment of a high-frequency circuit board according to the present invention.
【図２】本発明の高周波回路基板の第２の実施例を示す
表面図、裏面図、及び断面図である。FIG. 2 is a front view, a back view, and a cross-sectional view showing a high-frequency circuit board according to a second embodiment of the present invention.
【図３】本発明の高周波回路基板の信号ラインとグラン
ド電極との関係を説明するための説明図である。FIG. 3 is an explanatory diagram for explaining a relationship between a signal line and a ground electrode of the high-frequency circuit board according to the present invention.
【図４】本発明及び従来例の伝送特性を実験的に測定し
た結果を示すグラフである。FIG. 4 is a graph showing experimentally measured transmission characteristics of the present invention and a conventional example.
【図５】図４に結果を示した実験に用いた従来例の回路
基板を示す斜視図である。5 is a perspective view showing a conventional circuit board used in the experiment whose results are shown in FIG.
【図６】スルーホールを用いていない従来例の高周波回
路基板を示す断面図である。FIG. 6 is a cross-sectional view showing a conventional high-frequency circuit board that does not use a through hole.
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成１０年１１月１１日（１９９８．１１．
１１）[Submission date] November 11, 1998 (1998.11.
11)
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】０００５[Correction target item name] 0005
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【０００５】[0005]
【課題を解決するための手段】上記した本発明の目的を
達成するために、本発明においては、誘電体基板の表面
及び裏面にグランド付きコプレーナ線路からなる一対の
伝送線路を設け、これらの伝送線路を誘電体基板に設け
たスルーホールを介して電気的に接続した高周波回路基
板において、各伝送線路と同一平面上のグランド電極と
の間隔が、スルーホール近傍において他の部分と比べて
広く設定されていることを特徴としている。本発明にお
いては、スルーホール近傍における伝送線路とグランド
電極との間隔Ｗが、所定のコプレーナ線路の所定の特性
インピーダンスを有する部分の間隔ｄ１と対比して、ｄ
１＜Ｗ≦３ｄ１に設定されることが好ましい。さらに、
本発明においては、コプレーナ線路の所定の特性インピ
ーダンスを有する部分である伝送線路の側縁とグランド
電極との間隔ｄ１、スルーホール近傍における伝送線路
の側縁とグランド電極との間隔ｄ２、スルーホール近傍
における伝送線路の端縁とグランド電極との間隔ｄ３、
並びに、スルーホール近傍における伝送線路の端縁と間
隔ｄ１及びｄ２の境界との間隔ｄ４が、ｄ１＜ｄ２≦２
ｄ１、２ｄ１≦ｄ３≦３ｄ１、２ｄ１≦ｄ４≦３ｄ１に
設定されることが好ましい。In order to achieve the above-mentioned object of the present invention, according to the present invention, a pair of transmission lines comprising a grounded coplanar line are provided on the front and back surfaces of a dielectric substrate. In a high-frequency circuit board where lines are electrically connected via through holes provided in a dielectric substrate, the distance between each transmission line and the ground electrode on the same plane is set wider in the vicinity of the through hole than in other parts. It is characterized by being. In the present invention, the distance W between the transmission line and the ground electrode in the vicinity of the through hole is smaller than the distance d1 of a portion of the predetermined coplanar line having the predetermined characteristic impedance by d.
It is preferable to set 1 <W ≦ 3d1. further,
In the present invention, the distance d1 between the side edge of the transmission line and the ground electrode, which is a portion having a predetermined characteristic impedance of the coplanar line, the distance d2 between the side edge of the transmission line and the ground electrode near the through hole, the vicinity of the through hole The distance d3 between the edge of the transmission line and the ground electrode at
The distance d4 between the edge of the transmission line near the through hole and the boundary between the distances d1 and d2 is d1 <d2 ≦ 2.
It is preferable that d1, 2d1 ≦ d3 ≦ 3d1, 2d1 ≦ d4 ≦ 3d1 be set.
Claims (3)
きコプレーナ線路からなる一対の伝送線路を設け、これ
らの伝送線路を誘電体基板に設けたスルーホールを介し
て電気的に接続した高周波回路基板において、 各伝送線路と同一平面上のグランド電極との間隔が、ス
ルーホール近傍において他の部分と比べて広く設定され
ていることを特徴とする高周波回路基板。1. A high-frequency circuit board comprising: a pair of transmission lines comprising a grounded coplanar line provided on a front surface and a rear surface of a dielectric substrate, and these transmission lines are electrically connected through through holes provided in the dielectric substrate. 2. The high-frequency circuit board according to claim 1, wherein a distance between each transmission line and a ground electrode on the same plane is set wider in the vicinity of the through hole than in other portions.
て、スルーホール近傍における伝送線路とグランド電極
との間隔Ｗが、コプレーナ線路の所定の特性インピーダ
ンスを有する部分の間隔ｄ１と対比して、 ｄ１<Ｗ≦３ｄ１ に設定されていることを特徴とする高周波回路基板。2. The high-frequency circuit board according to claim 1, wherein the distance W between the transmission line and the ground electrode in the vicinity of the through hole is d1 <in comparison with the distance d1 of a portion of the coplanar line having a predetermined characteristic impedance. A high-frequency circuit board, wherein W ≦ 3d1 is set.
て、コプレーナ線路の所定の特性インピーダンスを有す
る部分である伝送線路の側縁とグランド電極との間隔ｄ
１、スルーホール近傍における伝送線路の側縁とグラン
ド電極との間隔ｄ２、スルーホール近傍における伝送線
路の端縁とグランド電極との間隔ｄ３、並びに、スルー
ホール近傍における伝送線路の端縁と間隔ｄ１及びｄ２
の境界との間隔ｄ４が、 ｄ１<ｄ２≦２ｄ１ ２ｄ１≦ｄ３≦３ｄ１ ２ｄ１≦ｄ４≦３ｄ１ に設定されていることを特徴とする高周波回路基板。3. The high-frequency circuit board according to claim 1, wherein a distance d between a side edge of the transmission line, which is a portion of the coplanar line having a predetermined characteristic impedance, and the ground electrode.
1. The distance d2 between the side edge of the transmission line and the ground electrode near the through-hole, the distance d3 between the edge of the transmission line and the ground electrode near the through-hole, and the distance d1 between the edge of the transmission line near the through-hole. And d2
A high-frequency circuit board characterized in that a distance d4 from the boundary is set as d1 <d2 ≦ 2d1 2d1 ≦ d3 ≦ 3d1 2d1 ≦ d4 ≦ 3d1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10269930A JP3008939B1 (en) | 1998-09-24 | 1998-09-24 | High frequency circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10269930A JP3008939B1 (en) | 1998-09-24 | 1998-09-24 | High frequency circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP3008939B1 JP3008939B1 (en) | 2000-02-14 |
| JP2000100993A true JP2000100993A (en) | 2000-04-07 |
Family
ID=17479187
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10269930A Expired - Lifetime JP3008939B1 (en) | 1998-09-24 | 1998-09-24 | High frequency circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3008939B1 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6726488B2 (en) | 2001-10-24 | 2004-04-27 | Kyocera Corporation | High-frequency wiring board |
| US6873230B2 (en) | 2002-07-25 | 2005-03-29 | Kyocera Corporation | High-frequency wiring board |
| JP2008294316A (en) * | 2007-05-28 | 2008-12-04 | Kyocera Corp | Electronic device |
| WO2009054201A1 (en) * | 2007-10-25 | 2009-04-30 | Nec Corporation | High frequency substrate and high frequency module using the same |
| JP2011096954A (en) * | 2009-10-30 | 2011-05-12 | Kyocer Slc Technologies Corp | Wiring board |
| JP2014170884A (en) * | 2013-03-05 | 2014-09-18 | Nippon Telegr & Teleph Corp <Ntt> | Multilayer wiring board |
| WO2019207828A1 (en) * | 2018-04-25 | 2019-10-31 | 株式会社村田製作所 | Millimeter-wave module |
-
1998
- 1998-09-24 JP JP10269930A patent/JP3008939B1/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6726488B2 (en) | 2001-10-24 | 2004-04-27 | Kyocera Corporation | High-frequency wiring board |
| US6873230B2 (en) | 2002-07-25 | 2005-03-29 | Kyocera Corporation | High-frequency wiring board |
| JP2008294316A (en) * | 2007-05-28 | 2008-12-04 | Kyocera Corp | Electronic device |
| WO2009054201A1 (en) * | 2007-10-25 | 2009-04-30 | Nec Corporation | High frequency substrate and high frequency module using the same |
| JP5397225B2 (en) * | 2007-10-25 | 2014-01-22 | 日本電気株式会社 | High-frequency substrate and high-frequency module using the same |
| JP2011096954A (en) * | 2009-10-30 | 2011-05-12 | Kyocer Slc Technologies Corp | Wiring board |
| JP2014170884A (en) * | 2013-03-05 | 2014-09-18 | Nippon Telegr & Teleph Corp <Ntt> | Multilayer wiring board |
| WO2019207828A1 (en) * | 2018-04-25 | 2019-10-31 | 株式会社村田製作所 | Millimeter-wave module |
| JPWO2019207828A1 (en) * | 2018-04-25 | 2021-01-14 | 株式会社村田製作所 | Millimeter wave module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3008939B1 (en) | 2000-02-14 |
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