JP2000091749A - Multilayer wiring board and its manufacturing method - Google Patents

Multilayer wiring board and its manufacturing method

Info

Publication number
JP2000091749A
JP2000091749A JP26256298A JP26256298A JP2000091749A JP 2000091749 A JP2000091749 A JP 2000091749A JP 26256298 A JP26256298 A JP 26256298A JP 26256298 A JP26256298 A JP 26256298A JP 2000091749 A JP2000091749 A JP 2000091749A
Authority
JP
Japan
Prior art keywords
wiring board
layer
circuit conductor
hole
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26256298A
Other languages
Japanese (ja)
Inventor
Kenshirou Fukusato
健志郎 福里
Satoshi Isoda
聡 磯田
Yasuhiro Iwasaki
康弘 岩崎
Takashi Aoki
貴志 青木
Masayuki Kodaira
正幸 小平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi AIC Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi AIC Inc filed Critical Hitachi AIC Inc
Priority to JP26256298A priority Critical patent/JP2000091749A/en
Publication of JP2000091749A publication Critical patent/JP2000091749A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent interlaminar blistering halfway through travel to the substrate surface-layer part and wiring board surface-layer part of a multilayer wiring board by providing a non-through hole for discharging gases being accumulated inside the wiring board toward the outside of the wiring board. SOLUTION: A glass epoxy copper-clad laminate with a catalyst is used for a glass epoxy copper-clad laminate 1 and an inner-layer circuit conductor 2 where an empty hole 9 is provided at a circuit conductor part at a part with a large inner-layer conductor area. Then, an insulation layer 3 is formed at the inner-layer circuit conductor 2. After that, a dot-shaped empty hole part for laser punching being provided at the circuit conductor part in a part with a large inner-layer conductor area and a part with a large inner-layer conductor area is punched by a laser to form a non-through hole 7 reaching the inner-layer circuit conductor 2 or feeding through the inner-layer circuit conductor 2 with the carbon dioxide gas laser. In this case, the outer-layer surface end face of the non-through hole 7 needs not always be in contact with the outer-layer circuit conductor 5.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、多層配線板および
その製造方法に関する。
The present invention relates to a multilayer wiring board and a method for manufacturing the same.

【0002】[0002]

【従来の技術】多層配線板においては、配線板の内部に
蓄積されるガス,水蒸気などはレジストインクの硬化処
理や半田付,リフロー半田などの配線板の加熱処理をす
ることにより多層配線板の配線板表層部へと移動し、回
路導体のない箇所から配線板の外部へ放出される。特
に、内層回路導体や外層回路導体の導体面積が大きな箇
所があり、かつ絶縁層を介して上下に重なっていると、
その内部に蓄積されているガス,水蒸気などは放出口が
ないため、配線板の内部である、主に内層回路導体と絶
縁層の界面で膨張し層間ふくれを生ずる。
2. Description of the Related Art In a multilayer wiring board, gas, water vapor, and the like accumulated in the wiring board are cured by resist ink curing or by heating the wiring board such as soldering and reflow soldering. It moves to the surface layer of the wiring board, and is discharged to the outside of the wiring board from a portion having no circuit conductor. In particular, if there is a place where the conductor area of the inner layer circuit conductor and the outer layer circuit conductor is large, and they overlap vertically via the insulating layer,
The gas, water vapor, and the like accumulated in the inside of the wiring board have no discharge port, and therefore expand at the interface between the inner layer circuit conductor and the insulating layer, which is inside the wiring board, and cause interlayer swelling.

【0003】従来では、前記のように多層配線板の加熱
処理工程で発生するガス抜きは、内層回路導体および外
層回路導体の導体面積の大きい箇所の回路導体部に直径
0.5〜2.0mmのドット状の空穴を設けて非導体部と
して、この空穴からガス抜きを行っている。
Conventionally, as described above, the gas generated in the heat treatment step of the multilayer wiring board is formed by removing a 0.5 to 2.0 mm diameter in the circuit conductor portion where the conductor area of the inner layer circuit conductor and the outer layer circuit conductor is large. The gas is vented from this hole as a non-conductive portion by providing a dot-shaped hole.

【0004】[0004]

【発明が解決しようとする課題】多層配線板の配線内部
に蓄積されるガス,水蒸気などは、加熱処理することに
より基材表層部および配線板表層部へと移動するが、金
属導体面積の大きい箇所に設けた空穴となっている非導
体部だけでは、ガス,水蒸気などは完全に配線板外部へ
放出することができず、多層配線板の基材表層部および
配線板表層部への移動途中で層間ふくれを起すことがあ
る。
The gas, water vapor and the like accumulated inside the wiring of the multilayer wiring board move to the surface layer of the base material and the surface layer of the wiring board by heat treatment, but the metal conductor area is large. Gas and water vapor cannot be completely discharged to the outside of the wiring board only by the non-conductor part which is a hole provided in the place, and the multi-layer wiring board moves to the surface layer of the base material and the wiring board. Interlayer blisters may occur on the way.

【0005】[0005]

【課題を解決するための手段】本発明では、上記の課題
を解決するため、つまり多層配線板の配線内部に蓄積さ
れているガス類を配線板の外部へ放出し、層間のふくれ
を防止するため、内層回路導体や外層回路導体の導体面
積が大きい箇所の回路導体部に、多層配線板の外部から
内層回路導体へ達するような、または内層回路導体を貫
通するような、すなわち配線板内部に蓄積されているガ
ス類を配線板外部へ放出するための非貫通穴を設けるも
のである。上記の非貫通穴は、穴壁面に無電解めっきや
電気めっきなどで金属導体を形成せず、穴壁面の基材や
絶縁層が露呈している非貫通穴とする。
In the present invention, in order to solve the above-mentioned problem, that is, gas accumulated in the wiring of the multilayer wiring board is discharged to the outside of the wiring board to prevent blister between layers. Therefore, in the circuit conductor portion where the conductor area of the inner layer circuit conductor or the outer layer circuit conductor is large, the inner layer circuit conductor may reach from the outside of the multilayer wiring board or penetrate the inner layer circuit conductor, that is, inside the wiring board. A non-through hole for discharging the stored gases to the outside of the wiring board is provided. The above-mentioned non-penetrating hole is a non-penetrating hole in which a metal conductor is not formed on the hole wall surface by electroless plating, electroplating or the like, and the base material and the insulating layer on the hole wall surface are exposed.

【0006】本発明の多層配線板の外部から内層回路導
体へ達するような非貫通穴、あるいは内層回路導体を貫
通する非貫通穴は、配線板内部に蓄積されているガスを
配線板表層部へ徐々に移動することなく、従来のドット
状の空穴と同じ径であっても穴表面積が大きく、配線板
の内部の内層回路導体へ達し、または貫通しているため
容易にガス抜きができる。内層回路導体または外層回路
導体の面積が大きい箇所の回路導体部に、非貫通穴の壁
面にある基材や絶縁層が露呈している非貫通穴を設ける
ことを特徴とする多層配線板である。
A non-through hole extending from the outside of the multilayer wiring board to the inner layer circuit conductor or a non-through hole penetrating the inner layer circuit conductor transfers gas accumulated inside the wiring board to the surface layer of the wiring board. Even if the hole has the same diameter as the conventional dot-shaped hole, the hole surface area is large without moving gradually, and the gas reaches or penetrates the inner layer circuit conductor inside the wiring board, so that gas can be easily vented. A multilayer wiring board characterized in that a non-through hole in which a base material or an insulating layer is exposed on a wall surface of a non-through hole is provided in a circuit conductor portion where an area of an inner layer circuit conductor or an outer layer circuit conductor is large. .

【0007】多層配線板の製造方法において、内層回路
導体を形成する工程と、内層回路導体上に絶縁層,接着
剤層を形成する工程と、接着剤層の上に外層回路導体を
形成する工程と、電気的な導通を目的としない配線板内
部に蓄積されているガス類を配線板外部へ放出するため
の穴壁面の基材や絶縁層が露呈している非貫通穴を形成
する工程とを、有することを特徴とする多層配線板の製
造方法である。
In a method for manufacturing a multilayer wiring board, a step of forming an inner layer circuit conductor, a step of forming an insulating layer and an adhesive layer on the inner layer circuit conductor, and a step of forming an outer layer circuit conductor on the adhesive layer And forming a non-through hole exposing a base material and an insulating layer on a hole wall surface for discharging gas accumulated inside the wiring board not intended for electrical conduction to the outside of the wiring board. And a method for manufacturing a multilayer wiring board.

【0008】[0008]

【発明の実施の形態】本発明の実施の形態について、多
層配線板の層間ふくれ発生の比較実験のため、図4に比
較例2として4層配線板で層間ふくれが最も発生しやす
い構造の4層配線板の断面図、図3に比較例1として4
層配線板で従来の技術によるドット状の空穴を設けた状
態の4層配線板の断面図、図1に本発明による4層配線
板で、配線板内部に蓄積されているガス類を配線板外部
へ放出するための非貫通穴を設けた工程断面図、図2に
は本発明による6層配線板の断面図を示してある。
FIG. 4 shows a comparative example 2 of a four-layered wiring board having a structure in which interlayer blistering is most likely to occur in a four-layer wiring board for a comparative experiment on the occurrence of interlayer blistering in a multilayer wiring board. FIG. 3 is a cross-sectional view of the layer wiring board, and FIG.
FIG. 1 is a cross-sectional view of a four-layer wiring board in which dot-shaped holes according to the prior art are provided in a four-layer wiring board. FIG. FIG. 2 is a cross-sectional view showing a process in which a non-through hole is provided for discharge to the outside of the board. FIG. 2 is a cross-sectional view of a six-layer wiring board according to the present invention.

【0009】まず、図4に基づいて説明する。ガラス・
エポキシ銅張り積層板1の両面が全面銅箔となっている
内層回路導体2と、絶縁層3と、外層回路導体5も全面
銅箔となっている状態の4層配線板が比較例2の多層配
線板である。
First, a description will be given with reference to FIG. Glass /
The four-layer wiring board in which the inner layer circuit conductor 2, the insulating layer 3, and the outer layer circuit conductor 5 in which both surfaces of the epoxy copper-clad laminate 1 are all copper foil, and the entire outer layer circuit conductor 5 is also copper foil is Comparative Example 2. It is a multilayer wiring board.

【0010】次に、比較例1として図3に示すように、
従来の技術による導体面積の大きい箇所の内層回路導体
2と、外層回路導体5に直径1.0mmのドット状の空穴
9を設けて非導体部とする4層配線板を作製したもので
ある。
Next, as a comparative example 1, as shown in FIG.
According to the prior art, a four-layer wiring board is prepared in which a dot-shaped hole 9 having a diameter of 1.0 mm is provided in the inner layer circuit conductor 2 having a large conductor area and a dot-shaped hole 9 having a diameter of 1.0 mm in the outer layer circuit conductor 5. .

【0011】本発明による4層配線板について、図1に
基づいて説明する。図1(a)に示すように、ガラス・
エポキシ銅張り積層板1として、触媒入りガラス・エポ
キシ銅張り積層板(日立化成工業株式会社の商品名:M
CL−E168)を使用し、図1(b)に示すような内
層導体面積の大きい箇所の回路導体部に直径1.0mmの
ドット状の空穴9を設けた内層回路導体2をエッチング
法で形成する。
A four-layer wiring board according to the present invention will be described with reference to FIG. As shown in FIG.
As the epoxy copper-clad laminate 1, a glass-epoxy copper-clad laminate containing a catalyst (trade name of Hitachi Chemical Co., Ltd .: M
Using CL-E168), the inner layer circuit conductor 2 having a dot-shaped hole 9 having a diameter of 1.0 mm in the circuit conductor portion having a large inner layer conductor area as shown in FIG. Form.

【0012】次に、図1(c)に示すように、内層回路
導体2の酸化還元処理、プライマー処理をしてからスク
リーン印刷やカーテンコーター,浸漬法などで厚さ約5
0μmの絶縁層3を形成する。今回は、日立化成ポリマ
ー株式会社の商品名:HR−3の絶縁インクをスクリー
ン印刷法で塗布・乾燥した後、エポキシ樹脂系の接着剤
層4を日立化成ポリマー株式会社の商品名:HA−21
FCで形成してから接着剤層4の上に、めっきレジスト
用ドライフィルム(日立化成工業株式会社の商品名:S
R−3000)をラミネートし、写真法でめっきレジス
トを形成してから、無電解銅めっきを行ってレーザー穿
孔用のドット状の空穴9部を有し、かつ所定の外層回路
導体5を形成する。
Next, as shown in FIG. 1 (c), the inner layer circuit conductor 2 is subjected to an oxidation-reduction treatment and a primer treatment, and then is screen-printed, curtain-coated, dipped or the like to a thickness of about 5 mm.
An insulating layer 3 of 0 μm is formed. This time, after applying and drying an insulating ink of HR-3, a trade name of Hitachi Chemical Polymer Co., Ltd. by a screen printing method, applying an epoxy resin-based adhesive layer 4 to a trade name of HA-21, a trade name of Hitachi Chemical Polymer Co., Ltd.
After being formed by FC, a dry film for plating resist (trade name of Hitachi Chemical Co., Ltd .: S
R-3000), a plating resist is formed by a photographic method, and then electroless copper plating is performed to form a predetermined outer layer circuit conductor 5 having 9 dot-shaped holes for laser drilling. I do.

【0013】その次に、図1(d)に示すように、外層
導体面積の大きい箇所や内層導体面積の大きい箇所の回
路導体部に設けられたレーザー穿孔用のドット状の空穴
部を炭酸ガスレーザー(住友重機械工業株式会社の商品
名:LAVIA−600)で内層回路導体2へ達するよ
うなまたは内層回路導体2を貫通するような非貫通穴7
をレーザーで穿孔する。なお、配線板内部のガス抜きを
するための非貫通穴7は多層配線板10の外部へ効率よ
くガス,水蒸気などを放出させるため非貫通穴7の壁面
には金属めっきなどで金属導体を形成しない方がよい。
さらに、本発明の非貫通穴7の先端部は必ずしも内層回
路導体2止まりでなく絶縁層3のほぼ中間部やガラス・
エポキシ銅張り積層板1の基材部のほぼ中間部であるよ
うな基材や絶縁層止まりの非貫通穴7Aであってもよ
い。
Next, as shown in FIG. 1 (d), a dot-shaped hole for laser drilling provided in a circuit conductor at a location where the outer conductor area is large or a location where the inner conductor area is large is carbonated. A non-through hole 7 that reaches or penetrates the inner layer circuit conductor 2 with a gas laser (trade name: LAVIA-600 of Sumitomo Heavy Industries, Ltd.)
Is perforated with a laser. The non-through hole 7 for venting gas inside the wiring board is formed with a metal conductor by metal plating or the like on the wall surface of the non-through hole 7 in order to efficiently release gas, water vapor, etc. to the outside of the multilayer wiring board 10. Better not.
Further, the tip of the non-through hole 7 according to the present invention is not necessarily at the end of the inner layer circuit conductor 2 but at the substantially middle portion of the insulating layer 3 or the glass or the like.
The base material may be a substantially intermediate portion of the base material portion of the epoxy copper-clad laminate 1 or a non-through hole 7 </ b> A that stops at the insulating layer.

【0014】本発明の多層配線板10は内層回路導体2
はサブトラクティブ工法で、外層回路導体5はビルドア
ップ工法,アディティブ工法によってパターン形成し、
外層回路導体5を形成後に炭酸ガスレーザーによって穴
の壁面に金属導体のない非貫通の非貫通穴7を形成する
ことを特徴とする多層配線板10の製造方法である。ま
た、前記の非貫通穴7の外層表面端面は必ずしも外層回
路導体5と接している必要はない。内層回路導体2の導
体面積が大きい箇所があり、外層回路導体5に導体面積
が大きい箇所がない場合のガス抜きを行う際は前記のよ
うな非貫通穴7の外層表面端面が外層回路導体5と接し
ない設定をすることが良好である。図1(h)は、上記
多層配線板10の上面を平面図で示したものであり、非
貫通穴7の外周に接して外層回路導体5があるものと、
外層回路導体5に接していない非貫通穴7が存在してい
る。
The multilayer wiring board 10 according to the present invention comprises an inner circuit conductor 2
Is a subtractive method, and the outer layer circuit conductors 5 are patterned by a build-up method and an additive method.
A method for manufacturing a multilayer wiring board 10, characterized in that a non-penetrating non-penetrating hole 7 having no metal conductor is formed on the wall surface of a hole by a carbon dioxide gas laser after forming an outer layer circuit conductor 5. Further, the outer layer surface end face of the non-through hole 7 does not necessarily need to be in contact with the outer layer circuit conductor 5. When degassing is performed when there is a portion where the conductor area of the inner layer circuit conductor 2 is large and there is no portion where the conductor area is large in the outer layer circuit conductor 5, the end surface of the outer layer surface of the non-through hole 7 is connected to the outer layer circuit conductor 5. It is good to make settings that do not touch the FIG. 1H is a plan view showing the upper surface of the multilayer wiring board 10, in which the outer circuit conductor 5 is in contact with the outer periphery of the non-through hole 7.
There is a non-through hole 7 not in contact with the outer layer circuit conductor 5.

【0015】図2に基づいて、本発明による6層配線板
について説明する。ガラス・エポキシ銅張り積層板1の
両面に第1の内層回路導体2aを所定のパターン形状に
エッチング法で形成してから、前記の上面に絶縁層3と
接着剤層4を形成する。次に、第1の無電解銅めっきを
行って所定の第2の内層回路導体2bをアディティブ法
で形成する。前記の第2の内層回路導体2bの上面に絶
縁層3と接着剤層4を形成する。その次に、第2の無電
解銅めっきを行って所定の外層回路導体5をアディティ
ブ工法で形成するものである。前記、外層回路導体5を
形成後に炭酸ガスレーザーによって電気的な導通に使用
しない、つまり配線板内部のガス,水蒸気などを抜くた
めの非貫通穴7を形成した多層配線板10である。
A six-layer wiring board according to the present invention will be described with reference to FIG. First inner layer circuit conductors 2a are formed on both surfaces of the glass / epoxy copper clad laminate 1 in a predetermined pattern by etching, and then the insulating layer 3 and the adhesive layer 4 are formed on the upper surface. Next, first predetermined electroless copper plating is performed to form a predetermined second inner layer circuit conductor 2b by an additive method. An insulating layer 3 and an adhesive layer 4 are formed on the upper surface of the second inner layer circuit conductor 2b. Next, a second outer electroless copper plating is performed to form a predetermined outer layer circuit conductor 5 by an additive method. The multilayer wiring board 10 is not used for electrical conduction by a carbon dioxide gas laser after the outer circuit conductor 5 is formed, that is, the multilayer wiring board 10 in which a non-through hole 7 for removing gas, water vapor and the like inside the wiring board is formed.

【0016】上述した内容により作製した比較例1(図
3)の従来技術による4層配線板,比較例2(図4)の
層間ふくれが最も発生しやすい4層配線板、本発明によ
る配線板内部のガス抜き用の非貫通穴を有する4層配線
板(図1)の3種類で配線板内部のガス放出性を評価し
た結果を表1に示す。(評価方法)それぞれの多層配線
板を25mm×25mm角の試験片とし、260℃の半田糟
に5分間フロートする。n=各50。
The four-layer wiring board according to the prior art of Comparative Example 1 (FIG. 3) manufactured according to the above-described contents, the four-layer wiring board in which interlayer blistering is most likely to occur in Comparative Example 2 (FIG. 4), and the wiring board according to the present invention. Table 1 shows the results of evaluating the gas release properties inside the wiring board for three types of four-layer wiring boards (FIG. 1) having a non-through hole for venting gas inside. (Evaluation method) Each multilayer wiring board is made into a 25 mm x 25 mm square test piece and floated in a 260 ° C solder bath for 5 minutes. n = 50 each.

【表1】 [Table 1]

【0017】[0017]

【発明の効果】前記の多層配線板の配線板内部のガス放
出性比較から明らかなように、本発明の配線板内部のガ
ス抜き用の非貫通穴は、従来の導体面積が大きい箇所の
回路導体部にドット状の空穴を設ける多層配線板より大
幅にガス抜き効率が優れているものである。従って、高
温の加熱処理が行われる多層配線板でも高い品質信頼性
を確保することができる。
As is clear from the comparison of the gas release properties inside the wiring board of the multilayer wiring board, the non-through hole for gas release inside the wiring board of the present invention is the same as the conventional circuit having a large conductor area. The gas venting efficiency is much better than that of a multilayer wiring board in which dot-shaped holes are provided in a conductor portion. Therefore, high quality reliability can be ensured even for a multilayer wiring board subjected to a high-temperature heat treatment.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による多層配線板の工程断面図と平面
図。
FIG. 1 is a process sectional view and a plan view of a multilayer wiring board according to the present invention.

【図2】本発明による6層配線板の断面図。FIG. 2 is a sectional view of a six-layer wiring board according to the present invention.

【図3】従来の技術による4層配線板の断面図。FIG. 3 is a cross-sectional view of a conventional four-layer wiring board.

【図4】層間ふくれが発生しやすい4層配線板の断面
図。
FIG. 4 is a cross-sectional view of a four-layer wiring board in which interlayer swelling is likely to occur.

【符号の説明】 1…ガラス・エポキシ銅張り積層板 2…内層回路導体
3…絶縁層 4…接着剤層 5…外層回路導体 7…非貫通穴 9…空
穴 10…多層配線板。 整理番号 P2470
[Explanation of Signs] 1: Glass-epoxy copper-clad laminate 2: Inner layer circuit conductor
DESCRIPTION OF SYMBOLS 3 ... Insulating layer 4 ... Adhesive layer 5 ... Outer layer circuit conductor 7 ... Non-through hole 9 ... Empty hole 10 ... Multilayer wiring board. Reference number P2470

───────────────────────────────────────────────────── フロントページの続き (72)発明者 青木 貴志 栃木県芳賀郡二宮町大字久下田1065番地 日立エーアイシー株式会社内 (72)発明者 小平 正幸 栃木県芳賀郡二宮町大字久下田1065番地 日立エーアイシー株式会社内 Fターム(参考) 5E338 AA03 BB19 BB28 EE31 5E346 AA43 CC32 CC41 DD23 DD33 DD45 GG15  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takashi Aoki 1065 Kushita, Ninomiya-cho, Haga-gun, Tochigi Prefecture Inside Hitachi AIC Co., Ltd. F term in reference (reference) 5E338 AA03 BB19 BB28 EE31 5E346 AA43 CC32 CC41 DD23 DD33 DD45 GG15

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 多層配線板において、配線板内部に蓄積
されているガス類を、配線板外部へ放出するための非貫
通穴を有することを特徴とする多層配線板。
1. A multilayer wiring board having a non-through hole for discharging gases accumulated inside the wiring board to the outside of the wiring board.
【請求項2】 前記請求項1において、配線板の回路導
体の面積が大きい箇所に、穴壁面の基材や絶縁層が露呈
している非貫通穴を有することを特徴とする多層配線
板。
2. The multilayer wiring board according to claim 1, wherein a non-through hole in which a base material or an insulating layer of a hole wall surface is exposed is provided in a portion of the wiring board where a circuit conductor has a large area.
【請求項3】 多層配線板の製造方法において、内層回
路導体を形成する工程と、内層回路導体上に絶縁層,接
着剤層を形成する工程と、接着剤層の上に外層回路導体
を形成する工程と、配線板内部に蓄積されているガス類
を配線板外部へ放出するための非貫通穴を形成する工程
とを、有することを特徴とする多層配線板の製造方法。
3. A method for manufacturing a multilayer wiring board, comprising: forming an inner circuit conductor; forming an insulating layer and an adhesive layer on the inner circuit conductor; and forming an outer circuit conductor on the adhesive layer. And a step of forming a non-through hole for discharging gas accumulated inside the wiring board to the outside of the wiring board.
JP26256298A 1998-09-17 1998-09-17 Multilayer wiring board and its manufacturing method Pending JP2000091749A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26256298A JP2000091749A (en) 1998-09-17 1998-09-17 Multilayer wiring board and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26256298A JP2000091749A (en) 1998-09-17 1998-09-17 Multilayer wiring board and its manufacturing method

Publications (1)

Publication Number Publication Date
JP2000091749A true JP2000091749A (en) 2000-03-31

Family

ID=17377538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26256298A Pending JP2000091749A (en) 1998-09-17 1998-09-17 Multilayer wiring board and its manufacturing method

Country Status (1)

Country Link
JP (1) JP2000091749A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002237547A (en) * 2001-02-09 2002-08-23 Hitachi Chem Co Ltd Substrate for semiconductor package and manufacturing method, and semiconductor package and manufacturing method
JP2011108901A (en) * 2009-11-19 2011-06-02 Murata Mfg Co Ltd Resin substrate with built-in electronic component and electronic circuit module
JP2014078766A (en) * 2014-02-05 2014-05-01 Toyota Industries Corp Circuit board and manufacturing method therefor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002237547A (en) * 2001-02-09 2002-08-23 Hitachi Chem Co Ltd Substrate for semiconductor package and manufacturing method, and semiconductor package and manufacturing method
JP4696368B2 (en) * 2001-02-09 2011-06-08 日立化成工業株式会社 Semiconductor package substrate and manufacturing method thereof, and semiconductor package and manufacturing method thereof
JP2011108901A (en) * 2009-11-19 2011-06-02 Murata Mfg Co Ltd Resin substrate with built-in electronic component and electronic circuit module
JP2014078766A (en) * 2014-02-05 2014-05-01 Toyota Industries Corp Circuit board and manufacturing method therefor

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