JP2000091269A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of voids in an aperture, obtaining excellent adherence of a metal film and a barrier metal film, and increasing controllability of the growth time of the metal film, by growing the metal film in the aperture by a vapor growth method after nucleuses of metal are grown in the bottom of the aperture and on insulating films by light irradiation. SOLUTION: Metal nucleuses 22 are grown in the bottom part of an aperture and on insulating films 17, 18 in an atmosphere of metal seed source gas. After that, a metal film 23 is grown in the aperture by a vapor growth method. In the case that the diameter of the aperture is small and the depth of the bottom part is deep, the growth speed of the metal film 23 in the bottom part of the aperture in which the metal nucleuses 22 exist becomes high, the metal film 23 becomes thick, and the aspect ratio becomes small, so that voids are not generated in the metal film 23 in the aperture. Adherence of the metal film 23 and a barrier metal film under the metal film 23 is improved by the metal nucleuses 22. On account of existance of the metal nucleuses 22, growth of the metal film 23 becomes easy, and the metal film growth time can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device including a step of forming a conductive film such as copper used as a material of a wiring or a via by a vapor deposition method. It relates to a manufacturing method.

[0002]

2. Description of the Related Art With the increase in the degree of integration of semiconductor devices and the reduction in chip size, finer wiring and multilayer wiring are being accelerated. In an element having such a multilayer wiring, the resistance of the wiring and the capacitance between the wirings are dominant factors of the device signal delay. The signal delay of the device is proportional to the product, sum, or the like of the wiring resistance and the capacitance between wirings, and it is important to reduce the wiring resistance and the capacitance between wirings in order to improve the wiring delay.

Therefore, in order to reduce the wiring capacity and the electrical resistance, low-resistance copper wiring and the like are being used in addition to aluminum wiring. In the multilayer wiring forming technology, it is considered that the damascene process is frequently used in the future because it is difficult to pattern copper by dry etching. The damascene process includes a step of embedding a conductive material in a wiring groove or a via hole formed in an insulating film and then removing the conductive material formed on the insulating film by polishing. For example, as a method for forming copper, which is a conductive material, conventionally, a sputtering method and an electrolytic plating method have been mainly used, but recently, a vapor phase growth method using a copper compound gas has been developed.

When a via is formed by a vapor growth method, for example, a process shown in FIG. 1 is performed. First, as shown in FIG. 1A, a first wiring 4 is buried in a second insulating film 3 formed on a semiconductor substrate 1 with a first insulating film 2 interposed therebetween. After forming the third insulating film 5 on the second insulating film 3 and the first wiring 4, a via hole 5a is formed in the third insulating film 5 by a photolithography method. Next, as shown in FIG. 1 (b), a barrier metal film 6 is formed along the upper surface of the third insulating film 5 and the inner surface of the via hole 5a. By growing the copper 7, the copper 7 is embedded in the via hole 5a. Thereafter, as shown in FIG. 1C, the copper 7 and the barrier metal film 6 on the third insulating film 5 are removed by polishing, and the copper 7 remaining in the via hole 5a is removed.
Are used as vias 8.

[0005]

However, in the future, when the diameter of the via hole 5a is reduced to, for example, 0.25 μm and the aspect ratio is increased to, for example, 6 or more, the copper 7 grows on the barrier metal film 6 as it is. This alone does not ensure sufficient via reliability. That is, at the bottom of the via hole 5a having a large aspect ratio, since the growth rate of the copper 7 by CVD is low, the void 9 is generated in the copper 7 embedded in the via hole 5a as shown in FIG. As a result, there is a possibility that the resistance of the via 8 becomes large or a contact failure occurs.

Further, the adhesion between the barrier metal 6 and the copper 7 is reduced, and the copper film is easily peeled off in the process. Moreover, according to the prior art, as shown in FIG.
The time t ₀ from the supply of the reaction gas used for the growth into the via hole 5a to the start of the growth, that is, the incubation time t ₀ , makes it difficult to control the copper growth process, and furthermore, the incubation time Is poor in reproducibility because it depends on the surface state of the barrier metal film 6.

SUMMARY OF THE INVENTION It is an object of the present invention to prevent the occurrence of voids in a conductive film in a hole or a groove, improve the adhesion between the conductive film and the barrier metal film, and easily control the conductive film growth time. It is an object of the present invention to provide a method of manufacturing a semiconductor device having a conductive film burying step that can be performed.

[0008]

Means for Solving the Problems The above-mentioned problems are described with reference to FIGS.
As illustrated in FIG. 6, a step of forming insulating films 17 and 18 on the conductive layer 15 or the semiconductor layer, and an opening 19 exposing the conductive layer 15 or the semiconductor layer at the bottom is formed by the insulating films 17 and 18. And exposing the insulating films 17 and 18 including the bottom of the opening 19 to an atmosphere of a source gas of a metal species, and forming the bottom of the opening 19 and the insulating film 1.
By irradiating light toward the tops 7 and 18, metal nuclei 22 are formed on the bottoms of the openings 19 and the insulating films 17 and 18.
(20a) and a step of growing a metal film 23 made of the same element as the metal nucleus 22 (20a) in the opening 19 by a vapor phase growth method. The problem is solved by a method of manufacturing a semiconductor device.

In the method of manufacturing a semiconductor device described above,
Before forming the core 22, a barrier metal film 20 is formed on the inner surface of the opening 19.
In the above-described method for manufacturing a semiconductor device, the metal film 2
No. 3 is characterized by being formed using the metal seed source gas. In the method of manufacturing a semiconductor device described above, when irradiating the light, the insulating film is heated to a predetermined temperature, and the temperature and the total energy of the light are equal to the activation energy of the metal species source gas. It is characterized by.

In the above-described method for manufacturing a semiconductor device,
The light irradiation time is selected from the range of 1 bsec to 10 sec. In the above-described method for manufacturing a semiconductor device, the light is a single frequency or several kinds of frequencies aligned in a traveling direction, and is perpendicular to a surface of the semiconductor substrate 11.

In the above-described method for manufacturing a semiconductor device,
The nucleus 22 is a film having 1 to 10 atomic layers or a film formed in an island shape. In the method of manufacturing a semiconductor device described above, the growth of the nucleus 22 is continuously formed after the inside of the opening 19 is cleaned using a gas. In this case, the cleaning using the gas is performed by cleaning the inside of the opening with Hfac (C
u) by exposing to + TMVS at room temperature, or by exposing the inside of the opening to a high-density plasma of hydrogen while applying a bias electrode to the semiconductor substrate, or exposing the inside of the opening to a hydrogen downflow plasma. It may be performed.

In the above-described method of manufacturing a semiconductor device,
The insulating films 17 and 18 are formed of a low dielectric constant material having a dielectric constant of 1.1 to 3.5, or a dielectric constant of 8 to 600.
Characterized by being formed of a high dielectric constant material. In the method of manufacturing a semiconductor device described above, the metal constituting the core 2 is copper, titanium nitride, tungsten nitride,
It is characterized by being composed of any of tantalum nitride, aluminum, molybdenum, and molybdenum nitride.

In the method of manufacturing a semiconductor device described above,
The metal film grown in the opening is any one of copper, copper alloy, titanium nitride, tungsten nitride, tantalum nitride, aluminum, molybdenum, molybdenum nitride, tantalum, germanium, germanium nitride, ruthenium, and ruthenium nitride It is characterized by. It should be noted that the above-described figure numbers and reference numerals are cited for facilitating the understanding of the present invention, and the present invention is not limited thereto.

Next, the operation of the present invention will be described. According to the present invention, while exposing the opening formed in the insulating film to the atmosphere of the metal source gas while irradiating light toward the bottom of the opening and the insulating film, the bottom of the opening and the insulating film Then, a metal nucleus is generated on the substrate, and thereafter, a metal film is grown in the opening by a vapor phase growth method. Also,
When the growth of metal nuclei is insufficient by light alone, the inside of the opening is heated so that the heating temperature and the total energy of the light are equal to the activation energy of the metal species source gas at the bottom of the opening.

Therefore, even when the diameter of the opening is small and the bottom is deep, the growth rate of the metal film at the bottom of the opening where the metal nuclei are present becomes higher than in the past, and the growth of the metal film becomes the maximum. Inside, the metal film at the bottom of the opening becomes thicker and the substantial aspect ratio of the opening gradually decreases, so that voids are not generated in the metal film in the opening. In addition, the adhesion between the metal film and the film below the metal film is improved by the metal nuclei formed on the bottom of the opening and the insulating film.

Further, the presence of the metal nuclei facilitates the growth of the metal film, thereby shortening the incubation time, thereby improving the reproducibility of the growth process of the metal film. Before embedding a metal in the opening, a barrier metal may be formed on the inner surface of the opening and on the insulating film. In this case, the barrier metal on the bottom of the opening and the barrier metal on the insulating film may be formed. A metal nucleus grows on the metal.

When a barrier metal is grown by metalorganic vapor phase epitaxy, organic contaminants may adhere to the surface or irregularities may occur on the surface. By supplying the metal species source gas into the opening at a temperature low enough to prevent growth, contaminants on the barrier metal can be reduced and the surface flatness of the barrier metal can be improved.

The source gas of the metal seed used for growing the metal nucleus can be used as it is for growing the metal film. Therefore, the growth of the metal film from the growth of the metal nucleus can be performed in the same place. The workability is not greatly reduced.

[0019]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention. (First Embodiment) FIGS. 3 to 7 are cross-sectional views showing formation of vias by a damascene method according to an embodiment of the present invention.

[0020] First, as shown in FIG. 3 (a), after forming the first insulating film 12 and the second insulating film 13 made of SiO ₂ made of SiO ₂ on the silicon substrate 11, a second insulating Membrane 13
Then, a contact hole 13a is formed, and a first barrier metal film 14 is formed on the inner surface of the contact hole 13a. Further, the first wiring is formed by burying the copper film 15 in the contact hole 13a. The second insulating film 1
3 and the first barrier metal film 14 and the copper film 1
5 are each removed by polishing.

Subsequently, a third insulating film 17 made of SiOF and a fourth insulating film 18 made of an organic material having a low dielectric constant are formed on the second insulating film 13 and the first wiring, respectively, at 500 nm and 800 nm.
It is formed in order of nm thickness. The low dielectric constant organic material preferably has a dielectric constant in the range of 1.1 to 3.5, for example, parylene (polytetrafluoro-p-xylylene).
s) and α-CF (amorphous carbon fluoride).

Next, a resist 1 is formed on the fourth insulating film 18.
0 is applied, exposed and developed to form a window 10a having a diameter of about 0.25 μm above a part of the first wiring 15. Subsequently, as shown in FIG. 3B, using the resist 10 as a mask, the third insulating film 17 and the fourth insulating film 1 are used.
8 is etched to form a via hole 19 having an aspect ratio of 6 or more.

After the resist 10 is removed, as shown in FIG. 4A, a second barrier metal film 20 is formed on the inner surface of the via hole 19 and the fourth insulating film 1 by PVD or CVD.
8 is formed along the upper surface. Second barrier metal film 20
May be tantalum nitride, tungsten nitride (WN) or titanium nitride (TiN) formed by CVD or PVD.
Is used.

The contaminant organic product 21 adheres to the surface of the second barrier metal film 20 and has irregularities on the surface thereof, and these contaminate the copper film to be formed next. May cause a decrease. Therefore, in order to remove such organic products 21 and further reduce unevenness, the second barrier metal film 20 is set at a temperature of 25 ° C. or more and 90 ° C. or less, and as shown in FIG. Then, the surface of the second barrier metal film 20 is exposed to a copper growth gas, for example, an organic gas composed of HfacCu + TMVS (trimethylvinysilane) obtained by vaporizing Cupra Select (trade name, manufactured by Shoe Macker). As a result, as shown in FIG. 5A, the surface of the second barrier metal film 20 is cleaned and further flattened.

The process of exposing the second barrier metal film 20 to a copper growth gas is performed with the silicon substrate 11 placed in a vapor growth chamber (not shown). Then, after purging the gas for copper growth from the vapor phase growth chamber, the inside of the chamber for vapor phase growth is decompressed, and the silicon substrate 11 is further heated to a temperature of 25 ° C. to 90 ° C., as shown in FIG. As shown in the figure, a copper growth liquid composed of HfacCu + TMVS is vaporized again at a flow rate of 0.6 ml / min, and then introduced into a vapor growth chamber (not shown).

With the gas flowing constantly into the chamber for vapor phase growth, as shown in FIG.
Coherent light, for example, a KrF laser having a wavelength of 248 nm is irradiated toward the bottom of the via hole 19 and the upper surface of the fourth insulating film 18 for about 10 nsec (nanosecond). The light irradiation direction is substantially perpendicular to the substrate surface. Since the activation energy of the disproportionation reaction of the copper growth gas is about 0.68 eV, the reaction does not proceed only by heating the substrate at 25 ° C. to 90 ° C., and the light having a wavelength of 248 nm alone. The reaction does not progress. Then, the reaction selectively proceeds only in a region where both energy by heating and energy by light are present.

However, if the sum of the temperature of the substrate placed in the vapor phase growth chamber and the energy of light irradiation is equal to the activation energy of the disproportionation reaction, the via hole 19 is positively activated.
There is no need to heat the inside. Such a reaction mainly proceeds in the region of the surface of the second barrier metal film 20 at the bottom of the via hole 19 to be irradiated with light and the region above the fourth insulating film 18 to be irradiated with light, In those regions, nuclei 22 are selectively generated, and the amount of the nucleation can be controlled by the irradiation time of light, and in order for the nuclei 22 to have an optimal size, the irradiation time is from 1 picosecond to 1 ps. Preferably it is in the range of 10 seconds.

The concept of the nucleus 22 is a concept including one formed as a 1 to 10 atomic layer or an island-like film. The reaction equation for the above-described nucleus growth of copper is expressed as follows.

[0029]

Embedded image

Next, after the light irradiation is stopped, copper is grown on the second barrier metal film 20 by the CVD method as shown in FIG. The growth rate of copper is higher in the region at the bottom of the via hole 10 where the nucleus 22 exists and in the region above the fourth insulating film 18, while the growth speed of copper is lower on the inner peripheral surface of the via hole 10. Accordingly, during the copper growth process, the copper film 23 grows as shown by the broken line in FIG.
Of the via hole 1 is substantially reduced.
No void is generated in the copper film 23 formed in the area 0.

The growth condition of the copper film 23 is as follows.
The temperature was set to 85 ° C., the pressure of the growth atmosphere was set to 50 mTorr, and a gas obtained by vaporizing the above-mentioned Cubra Select as the copper growth gas was used. In addition, the vaporization temperature of the product name Cubra Select is 60 ° C or higher, and it decomposes at 160 ° C or higher,
Copper is formed. As described above, the processing from the surface cleaning of the second barrier metal film 20 to the growth of the copper film 23 is preferably performed in the same place (in-situ).

Next, as shown in FIG. 7, a fourth insulating film 1 is formed.
Copper film 23 and second barrier metal film 20 existing on
Is removed by a chemical mechanical polishing (CMP) method. Then, the copper film 23 remaining in the via hole 19 is used as a via. In addition, as shown in FIG.
When a nucleus 20a made of a material constituting the barrier metal film 20 is grown in a region at the bottom of the via hole 19 before the second barrier metal film 20 is grown inside the via hole 19,
The growth of the barrier metal film 20 at the bottom of the substrate becomes easy.

The copper film 23 may be grown by electrolytic plating. Even in this case, the growth of the copper film 23 is facilitated by the presence of the nucleus 22. (Second Embodiment) In the first embodiment described above,
Although the step of forming a via has been described, in the present embodiment, a method of simultaneously forming a wiring and a via by a dual damascene method will be described with reference to FIGS. 8 and 9, the same reference numerals as those in FIG. 3 indicate the same elements.

First, steps required until a state as shown in FIG. A first insulating film 12 and a second insulating film 13 are sequentially formed on a silicon substrate 11, and a first wiring 15 is embedded in the second insulating film 13.
In this state, on the second insulating film 13 and the first wiring 15,
A third insulating film 30 made of an organic material, a fourth insulating film 31 made of SiO ₂ , a fifth insulating film 32 made of an organic material,
After sequentially forming a sixth insulating film 33 made of SiO ₂ by CVD, these insulating films 30 to 33 are patterned by a photolithography method, and the first insulating film 33 reaching the first wiring 15 from the sixth insulating film 33 is formed. And a wiring groove 36 is formed in the sixth insulating film 33 and the fifth insulating film 32, and a second via hole 35 is formed immediately below the wiring groove 36.

In this state, the inner surface of the first via hole 34, the inner surface of the second via hole 35, the inner surface of the wiring groove 36, and the sixth insulating film 33 are formed in the same manner as in the first embodiment. A second barrier metal film 37 is formed along the upper surface of the substrate. The material forming the second barrier metal is made of tantalum or tantalum nitride, as in the first embodiment.

Next, as shown in FIG. 8B, a source gas for forming copper is supplied to the first and second via holes 34 and 35 and the wiring groove while heating the silicon substrate 11 at 25 ° C. or more. 36. In this state, as shown in FIG. 8B, when a KrF laser is irradiated on the second barrier metal film 37 in a direction perpendicular to the substrate, a nucleus 38 made of copper causes the first and second via holes 34 to be formed. , 35 and on the second barrier metal film 37 in the region above the sixth insulating film 33.

Subsequently, as shown in FIG. 9A, a copper film 39 is formed on the second barrier metal film 37 by a CVD method using a source gas for copper growth. This copper film 39
The growth rate is high in the region with many nuclei 38, while the growth speed is low in the region where there are few nuclei 38. Therefore, as shown by the dashed line in FIG. 9A, in the copper growth process, the second region is formed in the bottom region of the first and second via holes 34 and 35 and in the region above the sixth insulating film 33. Is grown thick on the surface of the barrier metal film 37, the aspect ratio of the first and second via holes 34 and 35 is substantially reduced, and the copper film 39 is formed between the first and second via holes 34 and 35 and It becomes easy to embed in the groove 36.

The portion of the copper film 39 thus grown on the sixth insulating film 33 is removed by a chemical mechanical polishing method, and the copper film 39 remaining in the first via hole 34 is used as a via 41. The copper film 39 remaining in the second via hole 35 is used as a second via 42, and the copper film 39 remaining in the wiring groove 36 is used as a second wiring 40. (Other Embodiments) As a source gas for forming the nuclei 22 and 38 and the copper films 23 and 39 described in the first and second embodiments, for example, Cu (HF
_{A) + H 2, CpCuCp (} C 2 H 5) 3 + H 2, Cu (FOD) 2 + H 2 or Cu (DP
M) ₂ + H ₂ , one of which may be used in place of the copper growth gas described above.

The conductive material used as vias and wirings is not particularly limited to copper, but may be titanium nitride (TiN), tungsten nitride (WN), tantalum nitride (TaN), aluminum (Al), molybdenum (Mo). ) And molybdenum nitride (MoN). In this case, as a source gas for growing titanium nitride, a mixed gas of TiCl ₄ and NH ₃ , TD
MAT (Ti (N (CH ₃ ) ₂ ) ₄ ), C ₅ H ₅ Ti (N ₃ ) ₂ and the like. These gases are also used for growing a nucleus made of TiN, and the nucleus grows by irradiating light while heating the substrate.

Further, as a source gas for growing tungsten nitride, a mixed gas of WF ₆ and H _2, WF ₆ and H ₂ and Si
There is a mixed gas of H _4. These gases are also used when growing nuclei made of WN, and grow the nuclei by irradiating light while heating the substrate. TaCl ₅ and SiH ₂ Cl ₂ as source gases for growing tantalum nitride
A mixed gas of H _2, a mixed gas of TaCl ₅ and SiH ₄ and H _2, TaCl ₅
That there is a mixed gas of SiH ₄ and H ₂ and HCl and Ar. These gases are also used when growing nuclei made of TaN, and the nuclei are grown by irradiating the second barrier metal film 20 with light while heating the substrate.

As a source gas for growing aluminum, a mixed gas of DMAH (AlH (CH ₃ ) ₂ ) and H ₂ , AlNH
₃ (CH ₃ ) ₃ , Al ₂ (CH ₃ ) ₆ , Al (C ₄ H ₉ ) ₃ , and a mixed gas of AlCl ₃ and H ₂ . These gases are also used for growing nuclei made of Al, and the nuclei are grown by irradiating the second barrier metal film 20 with light while heating the substrate.

As a source gas for growing molybdenum, there are a mixed gas of MoF ₆ and H _2, a mixed gas of Mo (CO) ₆ , a mixed gas of MoCl ₅ and H ₂ , and the like. These gases are also used for growing nuclei made of Mo, and the nuclei are grown by irradiating the second barrier metal film 20 with light while heating the substrate. As a source gas for growing the molybdenum nitride, a mixed gas of MoF ₆ and dimethylhydrazine and H _2, Mo
There is a mixed gas of (Co) ₆ , MoCl ₅ and H ₂ . These gases are also used for growing a growth nucleus made of MoN, and the nucleus grows by irradiating the second barrier metal film 20 with light while heating the substrate.

The above-mentioned TiN, WN, TaN, Al, Mo or MoN
May be used to clean the surface of the second barrier metal film 20. In this case, the source gas is used for cleaning the surface of the second barrier metal film 20. After that, a nucleus is grown on the surface of the second barrier metal film 20 using the same source gas, and further, on the bottom region of the contact hole 19 and on the fourth insulating film 18 using the same source gas. A conductive film having a high growth rate is formed on the second barrier metal film 20 existing in the region.

The surface cleaning may be performed by exposing the second barrier metal film 20 to a hydrogen high-density plasma while applying a bias to the substrate, without using the source gas. This may be performed by exposing the second barrier metal film 20 to hydrogen downflow plasma. In order to select the source gas and grow the nuclei, the activation energy of the source gas is investigated in advance, and the wavelength of the irradiation light and the energy of the substrate temperature are adjusted to be equal to the activation energy. It is necessary not to give activation energy.

It is to be noted that the irradiation light has a uniform traveling direction, and it is preferable to irradiate a single beam perpendicularly to the substrate surface with several types of light whose number or wavelength can be specified. As a material of a conductive film to be a via or a wiring, in addition to the above-mentioned copper, tantalum, germanium, germanium nitride, ruthenium, ruthenium nitride, copper alloy (eg, CuSz, CuCr)
And so on.

In the above embodiment, the case where vias and wirings are formed has been described. However, for example, when a capacitor is formed in a trench, a storage electrode is formed in an opening of an insulating film. After a dielectric film is formed thereon, a source gas is supplied to the dielectric film while heating the dielectric film to irradiate the surface with light, whereby a growth nucleus is formed at the bottom of the opening. The light irradiation direction is a direction perpendicular to the substrate surface. Thereafter, when a counter electrode is formed on the dielectric film in the opening, the growth rate of the counter electrode at the bottom of the opening is high, so that the counter electrode is formed without generating voids in the opening. Its dielectric film, for example, dielectric constant of the dielectric material of 8-600, for example, _{Ta x O y, PZT, BST} , is formed from a strontium bismuth tantalate or the like.

Further, in the above-described embodiment, the copper film is buried in the via hole. However, a contact hole is formed in an insulating film covering a semiconductor substrate (silicon substrate, GaAs substrate, InP substrate, etc.), and the contact hole is formed therein. The same can be applied to the case where a copper film is embedded in the substrate. Further, the above-described nucleus growth and subsequent metal film growth can be performed not only when the openings in the semiconductor device are filled, but also when the openings in the insulating film in a printed circuit board, a liquid crystal display, a plasma display, an MCM (multi chip module), or the like are filled with metal. Applicable.

[0048]

As described above, according to the present invention, while the opening formed in the insulating film is exposed to the atmosphere of the source gas of the metal species, the inside of the opening is set to a predetermined temperature, and the bottom of the opening is formed. By irradiating light on the insulating film, a metal nucleus is generated on the bottom of the opening and on the insulating film, and thereafter, the metal film is grown in the opening by a vapor phase growth method. , Even if the aperture has a large aspect ratio,
Since the growth rate of the metal film at the bottom of the opening where the nucleus exists is higher than before, during the growth of the metal film, the metal film at the bottom of the opening becomes thicker and the substantial aspect ratio of the opening Can be gradually reduced, so that generation of voids in the metal film in the opening can be prevented.

Further, the adhesion between the metal film and the film under the metal film can be improved by the nucleus formed on the bottom of the opening and the insulating film, and the process integration of the semiconductor manufacturing apparatus can be easily performed. Further, the presence of the nucleus facilitates the growth of the metal film, shortens the incubation time, and thereby improves the reproducibility of the growth process of the metal film.

Before forming a metal film in the opening, a barrier metal may be formed on the inner surface of the opening and on the insulating film.
In this case, nuclei are grown on the barrier metal existing on the bottom of the opening and on the barrier metal existing on the insulating film. When the barrier metal is grown by the vapor phase growth method, organic contaminants may adhere to the surface or irregularities may occur on the surface. By supplying in the opening in the state, contaminants on the barrier metal can be reduced,
The flatness of the surface of the barrier metal can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a conventional via forming process.

FIG. 2A is a cross-sectional view showing a state in which a void is generated in a via formed by a conventional method, and FIG. 2B is a conductive film when a conductive film is embedded in a via hole by a conventional method. FIG. 4 is a diagram showing a relationship between a growth start time of a semiconductor device and the thickness of a conductive film.

FIGS. 3A and 3B are cross-sectional views (part 1) illustrating a via forming method according to the first embodiment of the present invention.

FIGS. 4A and 4B are cross-sectional views (part 2) illustrating a via forming method according to the first embodiment of the present invention.

FIGS. 5A and 5B are cross-sectional views (part 3) illustrating a via forming method according to the first embodiment of the present invention.

FIGS. 6A and 6B are cross-sectional views (part 4) illustrating a via forming method according to the first embodiment of the present invention.

FIG. 7 is a sectional view (part 5) illustrating the method for forming a via according to the first embodiment of the present invention.

FIGS. 8A and 8B are cross-sectional views (part 1) illustrating a via forming method according to a second embodiment of the present invention.

FIGS. 9A and 9B are cross-sectional views illustrating a via forming method according to a second embodiment of the present invention (part 2).

[Explanation of symbols]

10 resist, 11 silicon substrate, 12, 13, 1
7, 18 ... insulating film, 14 ... first barrier metal film, 15
... copper film (first wiring), 19 ... via hole, 20 ... second barrier metal film, 21 ... organic product, 22 ... nucleus, 23
... copper film, 24 ... via, 30, 31, 32, 33 ... insulating film, 34, 35 ... via hole, 36 ... wiring groove, 37 ...
Second barrier metal film, 38: core, 39: copper film, 40:
Second wiring, 41, 42... Vias.

Continued on the front page F term (reference) 4M104 AA01 BB30 BB32 BB33 CC01 DD22 DD43 EE15 EE18 FF18 FF22 HH09 HH13 HH14 5F033 AA02 AA09 AA29 AA64 BA01 BA11 BA12 BA17 BA25 DA04 DA15 DA23 EA23 EA29

Claims (12)

[Claims] A step of forming an insulating film on the conductive layer or the semiconductor layer; a step of forming an opening in the insulating film at the bottom to expose the conductive layer or the semiconductor layer; Irradiating light toward the bottom of the opening and the insulating film while exposing the insulating film to an atmosphere of a metal species source gas, thereby forming a metal nucleus on the bottom of the opening and the insulating film. A method for manufacturing a semiconductor device, comprising: a step of forming; and a step of growing a metal film made of the same element as the metal nucleus in the opening by a vapor phase growth method. 2. The method according to claim 1, wherein a barrier metal film is formed on an inner surface of the opening before forming the nucleus. 3. The method according to claim 1, wherein the metal film is formed using the metal species source gas. 4. When irradiating the light, the insulating film is heated to a predetermined temperature, and the temperature and the total energy of the light are equal to the activation energy of the metal species source gas. A method for manufacturing a semiconductor device according to claim 1. 5. The method according to claim 1, wherein the light irradiation time is selected from a range of 1 bsec to 10 seconds. 6. The semiconductor device according to claim 1, wherein the light has a single frequency or several kinds of frequencies aligned in a traveling direction and is perpendicular to a surface of the semiconductor substrate. Production method. 7. The method according to claim 1, wherein the nucleus is a film having 1 to 10 atomic layers or a film formed in an island shape. 8. The method of manufacturing a semiconductor device according to claim 1, wherein the growth of the nucleus is continuously formed after cleaning the inside of the opening with a gas. 9. The cleaning using the gas may include exposing the inside of the opening to Hfac (Cu) + TMVS at room temperature, or applying a bias electrode to the semiconductor substrate to apply a high-density plasma of hydrogen to the opening of the opening. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the method is performed by exposing the inside of the opening or exposing the inside of the opening to hydrogen downflow plasma. 10. The insulating film has a dielectric constant of 1.1 to 3.5.
Formed of a low dielectric constant material having a dielectric constant of 8 to 6
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed of a high dielectric constant material. 11. The semiconductor according to claim 1, wherein said metal constituting said nucleus is made of any one of copper, titanium nitride, tungsten nitride, tantalum nitride, aluminum, molybdenum, and molybdenum nitride. Device manufacturing method. 12. The metal film grown in the opening,
2. The semiconductor device according to claim 1, wherein the semiconductor device is any one of copper, copper alloy, titanium nitride, tungsten nitride, tantalum nitride, aluminum, molybdenum, molybdenum nitride, tantalum, germanium, germanium nitride, ruthenium, and ruthenium nitride. Production method.