JP2000083214A - Image processor and image processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain re-recording by inserting a restart marker into compressed image data into which any restart marker is not inserted without deteriorating the picture quality by reading recorded image coded data, inserting and adding a synchronizing signal to inversely coded data, reversibly encoding the data again, and recording the data as image coded data. SOLUTION: A control circuit 38 instructs the writing and reading of a memory 13, and also transmits the instruction of an operational timing to a restart marker inserting circuit 39. The circuit 39 outputs a restart marker as a synchronizing signal to a Huffman encode circuit 26 based on the instruction. At the time of setting the insertion of the restart marker, the circuit 26 operates Huffman encoding by properly inserting the restart marker transmitted from the circuit 39 into the data of conversion factors for each frequency component from the memory 33, and transmits the obtained compressed coded data to a recording circuit 27. The data are recorded and set through an interface 28 in a recording medium 29.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image processing apparatus and method for compressing, recording, and reproducing digital pixel data.

[0002]

2. Description of the Related Art JPEG (Joint Photographi), which is a standard for a compression method of a still image, is generally used.
In c coding Experts Group), the original image data is divided into blocks of a predetermined size,
An orthogonal transform (DCT (Discrete Cosine Tran) is performed on the image data divided into each block.
sform: discrete cosine transform), quantizes transform coefficients for each frequency component, and specifies image-encoded data obtained by losslessly encoding (Huffman decoding) the quantized data as compressed data. By performing the reverse operation processing, a still image can be reproduced.

In JPEG, a restart marker is defined as an optional function as a synchronization signal for synchronizing compressed data, and can be inserted into compressed data as a code at the time of data compression. By inserting the restart marker into the compressed data, it is possible to achieve effects such as stopping the propagation of an error and enabling random access to each area in the compressed data.

However, since the restart marker is an optional function as described above, it is not always added to the compressed data. FIG. 3 shows a processing circuit for inserting a restart marker again into compressed data to which no restart marker has been added. As shown in the figure, the compressed coded data CD recorded on a recording medium or the like is returned to the original coded data by the Huffman decoder 11 after being read, and then dequantized by the dequantization circuit 12. Be transformed into By canceling the orthogonal transform of the inversely quantized data by the inverse DCT circuit 13, a reproduced image P of the original pixel array can be obtained.

[0005] The reproduced image P thus obtained is again orthogonally transformed for each block by the DCT circuit 14 to remove high frequency components, quantized by the quantization circuit 15 and then coded by the Huffman encoder 16. By inserting a restart marker at the time of encoding by the Huffman encoder 16, encoded data CD 'with a restart marker added can be obtained again, and this is recorded on a recording medium or the like again.

[0006]

As shown in FIG. 3, when performing an insertion setting process on compressed data in which a restart marker has not been inserted, the compressed data is temporarily expanded to obtain a reproduced image P. In the process of compressing the reproduced image P again, a restart marker is inserted.

However, the inverse DCT circuit 13 at the time of expansion is
The processing in the DCT circuit 14 and the quantization circuit 15 at the time of recompression is an irreversible processing, and both of them cause an operation error. Therefore, there has been a problem that the image quality is sequentially deteriorated in these processing steps.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to degrade the image quality of compressed image data in which a restart marker as a synchronization signal is not inserted. It is an object of the present invention to provide an image processing apparatus and method capable of inserting the restart marker and causing re-recording.

[0009]

According to the first aspect of the present invention,
At the time of recording, the image data is divided into blocks of a predetermined size, orthogonal transformation is performed on the image data divided into each block, transform coefficients for each frequency component are quantized, and the quantized data is reversibly encoded. Recorded as coded data, at the time of reproduction, read the recorded image coded data and perform reverse coding, perform inverse quantization on frequency components, perform inverse orthogonal transform on the inversely quantized data, In an image processing method for reproducing image data for each block, recorded image encoded data is read out and inversely encoded, a synchronization signal is inserted and added to the inversely encoded data, and lossless encoding is performed again to encode the image encoded data. And a synchronizing signal adding step of recording as

According to this method, the restart marker is inserted and re-recorded without performing irreversible data processing on the compressed image data in which the restart marker as the synchronization signal is not inserted. Therefore, the image quality of the image data does not deteriorate.

According to a second aspect of the present invention, in the first aspect of the present invention, the synchronizing signal adding step inserts and adds a synchronizing signal to the data at every fixed unit.

According to this method, in addition to the operation of the first aspect of the present invention, a restart marker as a synchronization signal is inserted and added for each fixed unit of data. Disturbance in synchronization of image data due to propagation can be reliably suppressed in a minimum range.

According to a third aspect of the present invention, at the time of recording, image data is divided into blocks of a predetermined size, orthogonal transformation is performed on each of the divided image data, and transform coefficients for each frequency component are quantized. The quantized data is recorded as losslessly encoded image encoded data, and at the time of reproduction, the recorded image encoded data is read out and inversely encoded, and the frequency component is inversely quantized. Image processing device that performs inverse orthogonal transformation on the decoded data and reproduces the image data for each block, reads out the encoded image encoded data, inversely encodes the data, and inserts and adds a synchronization signal to the inversely encoded data. And a synchronizing signal adding means for performing reversible encoding and recording as image encoded data again.

With such a configuration, the restart marker is inserted and re-recorded without performing irreversible data processing on the compressed image data in which the restart marker as the synchronization signal is not inserted. Therefore, the image quality of the image data does not deteriorate.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an image processing apparatus for recording and reproducing still image data based on JPEG will be described below with reference to the drawings. "Configuration" FIG. 1 is a block diagram showing the circuit configuration.
In the figure, reference numeral 21 denotes an analog image input terminal, 22 denotes a digital image input terminal, and the analog image input terminal 2 during recording.
The image data of the analog value still image input from 1 is A
After being digitized by the / D converter 23 with a predetermined sampling frequency and a predetermined number of quantization bits, the DCT circuit 24
On the other hand, the still image data of the digital value input from the digital image input terminal 22 is directly sent to the DCT circuit 24.

The DCT circuit 24 divides the received image data into blocks each having a predetermined size, specifically, a vertical 8 pixels × horizontal 8 pixels block, and performs an orthogonal transformation on each block of the divided image data. Coefficients based on an 8 × 8 matrix converted into spatial frequency components by performing two-dimensional DCT (Discrete Cosine Transform) (hereinafter abbreviated as “transform coefficients”)
Get.

This conversion coefficient is one in which low-frequency components to high-frequency components are sequentially arranged from the AC component at one end of the matrix to the other end of the diagonal, and each of these conversion coefficients is After being quantized by the quantization circuit 25, they are sent to a Huffman encoding circuit 26 as an entropy encoding circuit.

The Huffman encoding circuit 26 Huffman-encodes the difference between the DC component conversion coefficient and the DC component of the neighboring block. Compressed coding by performing scanning from frequency components to high frequency components, and performing two-dimensional Huffman coding from the continuous number of invalid components having a value of “0” and the value of valid components following the invalid components Get the data.

The encoded data obtained by the Huffman encoding circuit 26 is recorded and set on a recording medium 29 via an interface (I / F) 28 by a recording circuit 27.

As described above, the flow of data from the analog image input terminal 21 or the digital image input terminal 22 to the recording medium 29 is the flow of processing during normal recording. The encoded data recorded on the recording medium 29 is read out by the reading circuit 30 via the interface 28 at the time of reproduction or insertion setting of the restart marker, and is sent to the Huffman decoding circuit 31.

The Huffman decoding circuit 31 performs processing reverse to the processing performed by the Huffman encoding circuit 26, ie, transform coefficients for each Huffman-encoded frequency component, and its DC component is a difference value from the DC component of a neighboring block. The AC component is reproduced by decoding the zigzag-transformed conversion component in reverse from the high-frequency component to the low-frequency component to decode the encoded data, and the obtained data is decoded by the inverse quantization circuit 32 and the memory 33. Send to

The inverse quantization circuit 32 performs inverse quantization on the data of the transform coefficient for each frequency component decoded by the Huffman decoding circuit 31, and outputs the result to the inverse DCT circuit 3.
Output to 4.

The inverse DCT circuit 34 applies a two-dimensional IDCT (inverse discrete cosine transform) to the inversely quantized data.
To reproduce the original image data for each block, and the reproduced image data is directly sent to the digital image output terminal 3.
6 while being converted into an analog signal by a D / A converter 35 and output from an analog image output terminal 37.

As described above, the flow of data from the recording medium 29 to the digital image output terminal 36 or the analog image output terminal 37 is the flow of processing during normal reproduction. Further, the memory 33 holds the data of the conversion coefficient for each frequency component sent from the Huffman decoding circuit 31 at the time of setting the insertion of the restart marker based on an instruction from the control circuit 38, and stores the digital image output terminal 36. Send to

The control circuit 38 controls the operation at the time of setting the insertion of the restart marker. The control circuit 38 instructs the writing and reading of the memory 33 and also instructs the restart marker insertion circuit 39 of the operation timing. Send out.

The restart marker insertion circuit 39 outputs a restart marker as a synchronization signal to the Huffman encoding circuit 26 based on an instruction from the control circuit 38. The Huffman encoding circuit 26 transmits the data of the transform coefficient for each frequency component transmitted from the memory 33 from the restart marker insertion circuit 39, not from the quantization circuit 25, at the time of the insertion setting of the restart marker. Huffman encoding is performed after inserting a restart marker as appropriate, and compressed encoded data is obtained and sent to the recording circuit 27 to be recorded and set on the recording medium 29 via the interface 28.

[Operation] Next, referring to the flowchart shown in FIG. 2, the JP of the image processing apparatus according to the present embodiment will be described.
The operation at the time of setting the insertion of the restart marker defined as an optional function in the EG will be described. The control circuit 38 mainly controls this processing.

At the beginning of the processing, the coded data which is already recorded on the recording medium 29 and in which the restart marker is not inserted is read out by the reading circuit 30 via the interface 28 in block units, and the Huffman decoding circuit 31 is decoded (step S1).

The control circuit 38 writes and holds the decoded data in the memory 33 (step S
2) It is determined whether or not the decoding is terminated based on whether or not the data is the last data that needs to be read from the recording medium 29 and decoded by the Huffman decoding circuit 31 (step S3), and the code to be decoded is determined. If it is determined that there is coded data and decoding has not been completed, the process returns to step S1 again.

By repeating the processing of steps S1 to S3 in this way, all the encoded data to be decoded is read from the recording medium 29, decoded by the Huffman decoding circuit 31, and written and held in the memory 33. It is determined in step S3 that decoding has been completed.

Next, the data of the transform coefficient for each frequency component decoded in units of blocks is read from the memory 33 (step S4), and Huffman encoding is performed again by the Huffman encoding circuit 26 (step S5).

Then, it is determined whether or not this data has been encoded by the number of blocks designated in advance (step S).
6) If the number of blocks does not reach the number specified in advance, the process returns to step S4 to read the next block from the memory 33 and execute the same process.

When the processes of steps S4 to S6 are repeated to obtain the Huffman-encoded data for the specified number of blocks, the underflow of the data due to the lack of the code generation amount is next detected for these encoded data. It is determined whether or not stuffing bytes, which are dummy data for prevention, are necessary (step S7). Only when it is determined that stuffing bytes are necessary, a necessary amount of stuffing bytes is written and inserted (step S8).

Thereafter, a restart marker as a synchronizing signal is inserted again by the restart marker insertion circuit 39 into the coded data of the designated number of blocks to which stuffing bytes have been appropriately added as necessary (step S9).

The encoded data for the designated number of blocks into which the restart marker is inserted is set by the recording circuit 27 via the interface 28 as it is, instead of the same encoded data without the original restart marker inserted. Overwritten and recorded.

Next, it is determined whether or not the processing for setting the insertion of the restart marker has been completed for all the data held in the memory 33 (step S10). The coding of the data for the number of blocks and the setting of the insertion of the restart marker in consideration of the stuffing byte are continued.

Thus, the processing of steps S4 to S10 is repeatedly executed, and when it is determined that the processing of setting the insertion of the restart marker has been completed for all the data held in the memory 33, this processing is completed.

As described above, the data decoded by the Huffman decoding circuit 31, that is, the data before the inverse quantization is performed by the inverse quantization circuit 32, is transmitted to the Huffman encoding circuit 26.
The Huffman decoding circuit 31 and the Huffman encoding circuit 26, which perform reversible processing together, are used by inserting and setting a restart marker, which is a synchronization signal, and re-recording on a recording medium 29. Since the inverse DCT circuit 13, the DCT circuit 14, and the quantization circuit 15, which cause errors in the above, are not used, the image quality of the image data to be re-recorded does not deteriorate.

Also, since the restart marker is automatically inserted and set every specified number of blocks, it is possible to reliably suppress the disturbance of the synchronization of the image data due to the propagation of an error during reproduction to the minimum. Can be.

In the above-described embodiment, after all the data decoded by the Huffman decoding circuit 31 and in which the restart markers need to be inserted and set are held in the memory 33, the restart markers are designated by the specified number of blocks. Although the description has been made assuming that the insertion setting is performed, it goes without saying that the memory 33 functions sufficiently as long as it has a storage capacity corresponding to the unit data amount for inserting and setting the restart marker.

The above embodiment is an example in which the present invention is applied to an image processing apparatus that records and reproduces still image data based on JPEG. However, a JBIG (Joint Bi-level) that handles a binary still image is used. Im
age coding experts Grou
p), Motion JPEG and MPE that handle moving images
G (Moving Picture Experts
(Group) 1/2/4, etc., and is not limited to the type and standard of the image data, but may be a type in which a synchronization signal is inserted and set for recorded image data in which no synchronization signal is inserted and recorded again. It is applicable to any of them. In addition, the present invention can be variously modified and implemented without departing from the gist thereof.

[0042]

According to the first aspect of the present invention, the restart marker is inserted without performing irreversible data processing on the compressed image data in which the restart marker as the synchronization signal is not inserted. Re-recording, the image quality of the image data does not deteriorate.

According to the second aspect of the invention, in addition to the effect of the first aspect of the present invention, a restart marker as a synchronization signal is inserted and added for each fixed unit of data. Disturbance in synchronization of image data due to propagation of an error can be reliably suppressed in a minimum range.

According to the third aspect of the present invention, the restart marker is inserted and restarted without performing irreversible data processing on the compressed image data in which the restart marker as the synchronization signal is not inserted. Since recording is performed, the image quality as image data does not deteriorate.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration according to an embodiment of the present invention.

FIG. 2 is a flowchart showing processing contents of the operation according to the embodiment;

FIG. 3 is a block diagram showing a general circuit configuration for inserting a restart marker into recorded image data.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 21 ... Analog image input terminal 22 ... Digital image input terminal 23 ... A / D converter 24 ... DCT circuit 25 ... Quantization circuit 26 ... Huffman encoding circuit 27 ... Recording circuit 28 ... Interface (I / F) 29 ... Recording medium Reference Signs List 30 readout circuit 31 Huffman decode circuit 32 inverse quantization circuit 33 memory 34 inverse DCT circuit 35 D / A converter 36 digital image output terminal 37 analog image output terminal 38 control circuit 39 restart Marker insertion circuit

Continued on the front page F-term (reference) CA21 DA00 DA01 DA02 DB05

Claims (3)

[Claims] At the time of recording, image data is divided into blocks of a predetermined size, orthogonal transformation is performed on each of the divided image data, transform coefficients for each frequency component are quantized, and the quantized data is It is recorded as lossless encoded image encoded data, and at the time of reproduction, the recorded image encoded data is read and inversely encoded, frequency components are inversely quantized, and inversely quantized data is inversely quantized. In an image processing method for performing orthogonal transformation and reproducing image data for each block, the recorded image encoded data is read out and inversely encoded, a synchronization signal is inserted and added to the inversely encoded data, and lossless encoding is performed again. An image processing method comprising the step of adding a synchronization signal for recording as encoded image data. 2. The image processing method according to claim 1, wherein in the synchronizing signal adding step, a synchronizing signal is inserted and added to the data for each predetermined unit. 3. At the time of recording, the image data is divided into blocks of a predetermined size, orthogonal transformation is performed on each of the divided image data, a transform coefficient for each frequency component is quantized, and the quantized data is It is recorded as lossless encoded image encoded data, and at the time of reproduction, the recorded image encoded data is read and inversely encoded, frequency components are inversely quantized, and inversely quantized data is inversely quantized. In an image processing apparatus that performs orthogonal transformation and reproduces image data for each block, the recorded image encoded data is read out and inversely encoded, a synchronization signal is inserted and added to the inversely encoded data, and lossless encoding is performed again. An image processing apparatus, comprising: a synchronization signal adding unit for recording as a coded image data.