JP2000082781A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming a capacitor which can suppress the leakage current which becomes an obstacle to fine wiring and which uses one of impurity diffused layers as a capacitor electrode. SOLUTION: First, a natural oxide film 2 formed on the surface of a silicon substrate 1 is removed. Next, arsenic is doped into the surface of the silicon substrate 1 to form an n-type impurity diffused layer 3 as a lower capacitor electrode. On the surface of the n-type impurity diffused layer 3, an oxide film is not grown but a silicon nitride film 4 is formed as a capacitor insulation film. Finally, an upper capacitor electrode 5 is formed on the silicon nitride film 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device including a step of forming a capacitor using an impurity diffusion layer for one capacitor electrode.

[0002]

2. Description of the Related Art Conventionally, magnetic disk devices have been widely used as storage devices for information processing devices. But,
The magnetic disk device has a disadvantage that it has a highly precise mechanical drive mechanism and thus is vulnerable to impact. Further, the magnetic disk device mechanically accesses the recording medium and cannot perform high-speed access.

Therefore, in recent years, semiconductor storage devices have been developed as recording devices for information processing devices. The semiconductor memory device does not have a mechanical drive mechanism, so it is resistant to shocks, and since it performs electrical reading, it can be accessed at high speed.

[0004] By the way, recent advances in semiconductor technology, especially in microfabrication technology, have rapidly advanced the miniaturization of memory cells, that is, the high integration of semiconductor memory devices. Has become apparent.

For example, in a DRAM in which a memory cell is configured by connecting a MOS transistor and a capacitor in series, a decrease in the capacitor area due to the high integration results in
The capacitance of the capacitor tends to decrease. As a result, there is a problem of a soft error that the memory contents are read out by mistake or the stored contents are destroyed by α rays.

In order to solve such a problem, it is important not to reduce the capacitance of the capacitor even when the memory cell is miniaturized. To this end, it is essential to reduce the thickness of the capacitor insulating film as the capacitor area increases. Here, as a method of forming a thin insulating film, for example, after a natural oxide film on the surface of a silicon substrate is thermally nitrided, LPC is performed.
There is a method of forming a silicon nitride film by a VD method.

However, the silicon nitride film obtained by this method has a large leak current and is not suitable as a capacitor insulating film. From this, it is considered effective to form the capacitor insulating film in a state where the natural oxide film has been removed in order to further reduce the thickness of the capacitor insulating film.

As a method of forming a capacitor insulating film in consideration of the above, after removing a natural oxide film by high-temperature annealing in an atmosphere containing hydrogen or silane, a thermal nitridation method or a chemical vapor deposition method (CVD) is used. Method) to form a silicon nitride film.

However, when the natural oxide film is removed by high-temperature annealing, the impurities in the impurity diffusion layer (one capacitor electrode) formed on the surface of the silicon substrate are diffused outward, and the impurity concentration of the impurity diffusion layer is reduced. , The capacity of the depletion layer formed on the silicon substrate is reduced, and as a result, the electric capacity is reduced, and a problem of apparently increasing the leak current occurs.

Further, as another method for removing a natural oxide film,
There is a method using hydrofluoric acid vapor. This method has an advantage that a natural oxide film can be removed at a low temperature. But,
Since hydrofluoric acid remains on the silicon substrate, when a silicon nitride film is formed by a CVD method, the thickness of the silicon nitride film is microscopically varied due to a low atomic density, and the surface roughness increases. As a result, there is a problem that a portion having a small film thickness is formed and a leak current increases.

[0011]

As described above, in order to further reduce the thickness of the capacitor insulating film, after forming the impurity diffusion layer and before forming the capacitor insulating film, the surface of the impurity diffusion layer is naturally oxidized by high-temperature annealing. It is believed that removing the film is effective. However, in this type of method, there is a problem that impurities in the impurity diffusion layer are diffused outward by the high-temperature annealing, and the leakage current increases apparently.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a capacitor having an impurity diffusion layer as one of the capacitor electrodes, which can suppress an increase in leak current which hinders miniaturization. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a step of forming a semiconductor device.

[0013]

Means for Solving the Problems To achieve the above object, a method for manufacturing a semiconductor device according to the present invention includes a step of removing an oxide film formed on a surface of a semiconductor substrate;
Adding an impurity to the surface of the semiconductor substrate to form an impurity diffusion layer as a first capacitor electrode; and forming a capacitor insulating layer on the impurity diffusion layer without growing an oxide film on the surface of the impurity diffusion layer. Forming a film; and forming a second capacitor electrode on the capacitor insulating film.

Here, the step of removing the oxide film is a step of performing a heat treatment at 800 ° C. or more in an atmosphere containing, for example, hydrogen or silane. The oxide film may be a natural oxide film or a PLCVD process without exposing the wafer to the atmosphere.
It is an oxide film (natural oxide film layer) formed at the time of heat treatment performed by being introduced into a film forming chamber (reaction tube) of the apparatus and thicker than a normal natural oxide film.

The step of adding the impurity is a step of performing a heat treatment at 800 ° C. or more in an atmosphere containing at least one of arsine and phosphine.

The step of forming the capacitor insulating film includes:
For example, a step of forming a silicon nitride film by a chemical vapor deposition method.

The step of forming the capacitor insulating film includes a step of forming a first silicon nitride film by, for example, a thermal nitridation method. Further, a second silicon nitride film may be formed on the first silicon nitride film by a chemical vapor deposition method.

The step of forming the capacitor insulating film includes a first heat treatment step in a first gas atmosphere containing silicon and not containing nitrogen, and a second heat treatment step containing nitrogen and containing no silicon. It is preferable that the series of heat treatment steps including the second heat treatment step in a gas atmosphere be repeated a plurality of times.

The first gas atmosphere is, for example, an atmosphere containing at least one gas of silicon tetrachloride, silicon trichloride and silicon dichloride.

The second gas atmosphere is, for example, an atmosphere containing at least one gas of ammonia, ammonia trifluoride, hydrazine, dimethylhydrazine and monomethylhydrazine.

Further, it is preferable that the surface of the impurity diffusion layer is nitrided before the first heat treatment step.

According to the present invention, the impurity diffusion layer is formed by removing the oxide film formed on the surface of the semiconductor substrate and then adding the impurity to the surface of the semiconductor substrate. In principle, the impurity concentration in the impurity diffusion layer does not decrease.

Therefore, according to the present invention, as compared with the method of removing the oxide film after forming the impurity diffusion layer (conventional method), the lowering of the impurity concentration in the impurity diffusion layer which causes the leak current is more effective. Can be suppressed.

Further, according to the present invention, after removing the oxide film on the surface of the impurity diffusion layer, the capacitor insulating film is formed on the impurity diffusion layer without growing the oxide film. It is possible to prevent formation of an oxide film that causes a leak current on the surface of the layer. That is, although the leak current can be reduced by the conventional method, the leak current can be further reduced according to the present invention.

When an oxide film is formed, C on the oxide film
When a nitride film is formed by the VD method, the nitride film grows non-uniformly, so that the thickness of the nitride film varies microscopically. If the oxide film is thermally nitrided, the above-described nonuniformity of the film thickness does not occur, but the nitrided oxide film has a large leak current, and as a result, the leak current increases.

As described above, according to the present invention, an increase in leakage current which hinders miniaturization can be effectively suppressed, so that a fine capacitor having an impurity diffusion layer as one capacitor electrode can be easily formed. Will be able to

[0027]

Embodiments of the present invention (hereinafter, referred to as embodiments) will be described below with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 7 is a process cross-sectional view illustrating the method of forming the planar capacitor according to the embodiment.

First, as shown in FIG. 1A, contaminants such as metals existing on a single-crystal silicon substrate 1 are washed using a mixed solution of hydrochloric acid and hydrogen peroxide (cleaning solution).
Since this cleaning liquid contains aqueous hydrogen peroxide, a natural oxide film layer 2 is formed on the surface of the silicon substrate 1 during cleaning. The thickness of the natural oxide film layer 2 is, for example, 1.0 nm.
It is about.

Next, as shown in FIG. 1B, the silicon substrate 1 is heat-treated in a hydrogen atmosphere at 900 ° C. for 1 hour at 3 Torr to remove the natural oxide film layer 2.

[0031] Next, as shown in FIG. 1 (c), H ₂ diluted 1 at.. Silicon substrate 1 in 9% ASH ₃ atmosphere
Heat treatment is performed at 100 ° C. for 1 hour at 100 ° C. to form a high impurity concentration n-type impurity diffusion layer 3 as a lower capacitor electrode on the surface of the silicon substrate 1. The natural oxide film layer 2 functions as a protective film for preventing contamination, damage, and the like of the surface of the silicon substrate 1 until the n-type impurity diffusion layer 3 is formed.

Next, as shown in FIG. 1D, a thickness of 6.0 nm as a capacitor insulating film is formed on the n-type impurity diffusion layer 3.
Of the silicon nitride film 4 is formed in the same processing vessel as that in which the n-type impurity diffusion layer 3 is formed without being exposed to the air. The silicon nitride film 4 is formed by a CVD method under the conditions of a pressure of 0.5 Torr and a film forming temperature of 700 ° C. using a mixed gas of dichlorosilane and ammonia as a source gas.

By continuously forming the silicon nitride film 4 in vacuum in this manner, re-oxidation of the n-type impurity diffusion layer 3 can be prevented, whereby a natural oxide film is formed on the surface of the n-type impurity diffusion layer 3. Can be prevented.

That is, the silicon nitride film 4 can be formed on the surface of the n-type impurity diffusion layer 3 in a state where there is no natural oxide film causing an increase in leakage current on the surface of the n-type impurity diffusion layer 3. . The natural oxide film causes a leak current because the growth of the silicon nitride film 4 occurs unevenly due to the generation of the natural oxide film, and the thickness of the silicon nitride film 4 varies microscopically.

Finally, as shown in FIG. 1E, an upper capacitor electrode 5 is formed on the silicon nitride film 4 to complete the capacitor.

FIG. 2 shows the oxygen concentration distribution of the n-type impurity diffusion layer 3 of the capacitor formed by the method of the present embodiment (the present invention) and that of the capacitor formed by the first conventional method (conventional method 1). Is shown.

Here, in the first conventional method, the silicon substrate 1 is exposed to the air after the formation of the n-type impurity diffusion layer 3, and then, when the silicon substrate 1 is introduced into the furnace, the silicon substrate 1 is exposed to oxygen that is caught in the furnace. This method is different from the present embodiment in that a silicon nitride film 4 is formed thereon by a CVD method after the surface of the substrate 1 is thermally oxidized.

FIG. 2 shows that according to the present embodiment, the n-type impurity diffusion layer 3 and the silicon nitride film 4 are different from those of the first conventional method.
It can be seen that the oxygen concentration at the interface with the substrate can be sufficiently reduced.
From this, it is understood that according to the present embodiment, formation of a natural oxide film on the surface of the silicon substrate 1 after removal of the natural oxide film layer 2 can be effectively prevented.

The reason for such a result is that the natural oxide film layer 2 formed on the surface of the silicon substrate 1 is sufficiently removed by the heat treatment in the above-mentioned hydrogen atmosphere, and then silicon nitride is continuously formed in a vacuum. By forming the film 4,
This is probably because the formation of an oxide film (layer) such as a natural oxide film was effectively prevented.

FIG. 3 shows the arsenic concentration distribution of the n-type impurity diffusion layer 3 of the capacitor formed by the forming method of the present embodiment (the present invention) and the second conventional method (the conventional method 2). Show that of a capacitor.

Here, in the second conventional method, the silicon substrate 1 is exposed to the air after the formation of the n-type impurity diffusion layer 3, the natural oxide film formed on the surface of the silicon substrate 1 is removed, and then the silicon nitride is removed. This is a method different from the present embodiment in that the film 4 is formed by the CVD method.

FIG. 3 shows that according to the present embodiment, the arsenic concentration of the n-type impurity diffusion layer 3 is higher than that of the second conventional method. Further, from the arsenic concentration distribution immediately after the formation of the n-type impurity diffusion layer 3, it is apparent that the arsenic concentration of the n-type impurity diffusion layer 3 does not decrease even after the formation of the silicon nitride film 4 in this embodiment. became.

When the step of forming the n-type impurity layer and the step of forming the silicon nitride film are performed in the same batch type CVD furnace, the quartz member such as the furnace tube constituting the CVD furnace and the boat supporting the wafer is made of a nitride film. As a result, gases such as AsH ₃ and PH ₃ diffused and consumed in the quartz members are reduced, and the AsH ₃ and P ₃ supplied to the wafer are correspondingly reduced.
Gases such as H ₃ increase. Therefore, by performing the step of forming the n-type impurity layer and the step of forming the silicon nitride film in the same batch type CVD furnace, the concentration of the impurity layer formed on the wafer can be increased. Similar effects can be obtained by forming a furnace tube, a board, and the like constituting the CVD furnace with a material such as SiC that does not easily diffuse As or P.

FIG. 4 shows the leakage current characteristics of the capacitors formed according to the method of the present embodiment, the first conventional method, and the second conventional method.

FIG. 4 shows that the method of this embodiment can form a capacitor having a lower leakage current than the first and second conventional methods. The reason for such a result is that the natural oxide film is insufficiently removed in the first conventional method, the leakage current increases due to the remaining natural oxide film, and the arsenic in the n-type impurity diffusion layer is increased in the second method. This is probably because the concentration decreased, and as a result, the electric capacity decreased, which apparently increased the leakage current.

As described above, in this embodiment, the n-type impurity diffusion layer 3 is formed on the surface of the silicon substrate 1 after the natural oxide film layer 2 formed on the surface of the silicon substrate 1 is removed. In addition, it is possible to effectively suppress a decrease in the impurity concentration in the n-type impurity diffusion layer 3 which causes a leak current. Further, in this embodiment, the silicon nitride film is continuously formed in a vacuum so that a natural oxide film causing a leak current does not grow on the surface of the n-type impurity diffusion layer 3. In this manner, the reduction of the impurity concentration and the generation of a natural oxide film, which are the causes of the leak current, can be prevented, so that a fine capacitor can be easily formed.

Next, a more preferable method for forming the silicon nitride film 4 will be described. This formation method uses hydrogen, which remains in the silicon nitride film 4 and causes a leak current path,
This is a method that can effectively reduce chlorine (NH bond, Si-Cl bond, and the like).

First, in the same processing vessel in which the n-type impurity diffusion layer 3 was formed, n was continuously (without being exposed to the air) n
The surface of the n-type impurity diffusion layer 3 is thermally nitrided to form a thin nitride layer 6 on the surface of the n-type impurity diffusion layer 3 as shown in FIG.

Next, as shown in FIG. 5B, a first annealing (first heat treatment) using silicon tetrachloride is performed to form a silicon layer having a thickness of one atomic layer on the surface of the n-type impurity diffusion layer 3. The layer 7 is formed.

The silicon layer 7 is formed by replacing N in the nitride layer 6 with SiCl ₃ as described later. The annealing condition at this time is 800 ° C.
One minute, 0.5 Torr.

Next, after replacing the silicon tetrachloride in the processing chamber with nitrogen, a first annealing (second
As shown in FIG. 5C, a nitrogen layer 8 (a layer having NH) having a thickness of one atomic layer is formed on the silicon layer 7 by the heat treatment of FIG.

The nitride layer 8 is formed by replacing three Cl atoms bonded to the surface of the silicon layer 7 with NH ₂ , as described later. The annealing conditions at this time are the same as the annealing conditions using silicon tetrachloride, that is, 800 ° C., 1 minute, and 0.5 Torr.

By a series of annealing steps including the first annealing and the second annealing, a silicon nitride film having a thickness of one atomic layer (a silicon layer of one atomic layer and a nitrogen layer 8 of one atomic layer) is formed. Is done.

Thereafter, the above series of annealing steps, in other words, FIG. 5B and a step of forming one atomic layer of silicon layer 7 and FIG. By repeating a series of forming steps with the forming step of the nitrogen layer 8 of one atomic layer of 5C for 40 times, the FI
G. FIG. As shown in FIG. 5D, a silicon nitride film 4 having a thickness of 4.0 nm is formed.

FIG. 6 shows an MIS capacitor (the present invention) in which a silicon nitride film 4 (capacitor insulating film) is formed in accordance with the method shown in FIG. 5, and a silicon nitride film (capacitor insulating film) formed with a normal silicon tetrachloride gas. The result of the comparison of the leak current of the MIS capacitor (prior art) formed by the CVD method using a mixed gas with ammonia gas as a raw material (the dependence of the current density Jg on the gate voltage Vg) is shown.

From the figure, it can be seen that the leak current is lower in this embodiment. The reason for these results is that
In the case of this embodiment, the silicon nitride film 4 is formed by flowing silicon tetrachloride and ammonia alternately, so that hydrogen, chlorine (N—H bond, Si—Cl
It is considered that impurities such as bonding were effectively reduced.

The reason why impurities such as hydrogen and chlorine (NH bond, Si—Cl bond, etc.) in the silicon nitride film 4 can be effectively reduced is considered as follows.

First, as shown in FIG. 7, when annealing using silicon tetrachloride (SiCl ₄ ) is performed, the nitride layer 6 reacts with SiCl _4, and the hydrogen of the N—H bond in the nitride layer 6 is formed. There replaces SiCl _3, by all N nitride layer 6 advances this decomposition reaction is replaced by SiCl _3, silicon single atomic layer is Cl ₃ bound to the surface layer 7
Is formed.

Thereafter, even if silicon tetrachloride is further supplied, that is, even if annealing is continued, N does not exist, so that the silicon layer 7 does not become thicker than one atomic layer. That is, the silicon layer 7 can be formed in a self-limitly manner. Although there is a possibility that the silicon layer 7 becomes thicker than an atomic layer due to another reaction, the possibility is low when a silicon source such as silicon tetrachloride is used.

Next, when annealing using ammonia (NH ₃ ) is performed, as shown in FIG. 8, SiCl ₃ reacts with NH _3, and Cl in SiCl ₃ is replaced with NH ₂ , and this reaction is carried out. All Cl in SiCl ₃ is converted to NH
_By replacing with ₂ , a nitrogen layer 8 having H ₂ bonded to the surface is formed. As a result, the Si—Cl bond disappears.

Thereafter, even if ammonia is further supplied,
That is, since Cl does not exist even if the annealing is continued, the nitrogen layer 8 does not become thicker than one atomic layer unless another reaction occurs. That is, the nitrogen layer 8 can be formed in a self-limiting manner. Although there is a possibility that the nitrogen layer 8 becomes thicker than one atomic layer due to another reaction, the possibility is low when a nitrogen source such as ammonia is used.

[0062] Then as shown in FIG. 9, four when annealing using silicon chloride, by the reaction with NH ₂ and SiCl ₄ are H ₂ in NH ₂ replaces (SiCl _{3) 2,}
As this reaction proceeds, hydrogen atoms of all NH ₂ are replaced with (SiCl ₃ ) ₂ , whereby a single-atom silicon layer 7 is formed in a self-limiting manner. As a result,
N—H bonds are eliminated.

Hereinafter, the steps of forming the one-atomic-layer nitrogen layer 8 and the one-atomic-layer silicon layer 7 are alternately repeated, so that hydrogen, chlorine (NH bond,
The silicon nitride film 4 having a sufficiently low content of impurities such as an i-Cl bond is formed. That is, hydrogen,
The silicon nitride film 4 in which impurities such as chlorine (NH bond, Si-Cl bond, etc.) exist only on the surface is basically formed.

Since the nitrogen layers 8 and the silicon layers 7 can be alternately formed one atomic layer at a time as described above, the silicon nitride film 4 can be formed on grooves or projections having an aspect ratio with good step coverage. Will also be able to do it.

The preferred method of forming the silicon nitride film 4 described here can be variously modified as follows.

For example, here, the annealing condition using silicon tetrachloride is 800 ° C., 1 minute, 0.5 Torr, but this condition is not necessarily required. This condition may be in a range in which polycrystalline silicon is not formed during annealing using silicon tetrachloride and silicon reacts with the base NH group. By setting, it is preferable to enhance the effect of removing hydrogen and chlorine.

If the annealing temperature is too high, polycrystalline silicon will be formed, so it is necessary that the annealing temperature be lower than the temperature at which the silicon source decomposes. If the pressure is too high, polycrystalline silicon will be formed, and if it is too low, the surface reaction will not proceed sufficiently.

In consideration of the above, preferable annealing conditions when a silicon source such as silicon tetrachloride is used are generally 600 ° C. or more and 950 ° C. or less.
It is not less than 1 Torr and not more than 10 Torr.

On the other hand, the annealing conditions using ammonia are preferably as high as possible.
It is not less than 1000C and not more than 1000C. Note that the upper limit of 1000 ° C. is a value determined from the current technology level, and if a technology is advanced in the future, higher temperature annealing may be performed. The pressure is 0.5 Torr or more and 100 Torr.
The following is preferred.

Although ammonia was used as the nitrogen source, it is not always necessary to use ammonia. Instead, for example, hydrazine, nitrogen trifluoride or the like may be used. Further, at least two or more of ammonia, hydrazine and nitrogen trifluoride may be used simultaneously.

On the other hand, although silicon tetrachloride was used as the silicon source, it is not always necessary to use silicon tetrachloride. Instead, for example, silicon trichloride, silicon dichloride, or the like may be used. Further, at least two or more of silicon tetrachloride, silicon trichloride and silicon dichloride may be used at the same time.

The silicon nitride film 4 was formed after the surface of the n-type impurity diffusion layer 3 was nitrided to form the nitrided layer 6. The reason for this is that nitriding increases the adsorption points of silicon tetrachloride. This is because the silicon nitride film 4 can be prevented from growing in an island shape.

Therefore, as long as the number of adsorption points of silicon tetrachloride can be increased, processing other than nitriding may be performed. For example, a natural oxide film on the surface may be removed.

However, in the case of the present embodiment, since the n-type impurity diffusion layer 3 is formed continuously in vacuum, a natural oxide film does not originally exist on the surface of the n-type impurity diffusion layer 3. Therefore, annealing using silicon tetrachloride may be performed immediately after the formation of the n-type impurity diffusion layer 3. The method of the present embodiment is more preferable than the conventional CVD method. This is because the method of the present embodiment is not sensitive to the surface state, and the silicon nitride film is uniformly deposited even if the removal of the native oxide film is incomplete.

In this case, at the time of annealing using ammonia in the next step, a nitrogen layer 8 is formed below the silicon layer 7 and a nitride layer 8 is formed on the silicon layer 7 at the same time.
As a result, substantially the same structure as in the case where the surface of n-type impurity diffusion layer 3 is nitrided to form nitrided layer 6 is obtained.

Although nitrogen is used to replace the source gas, it is not always necessary to use nitrogen. Instead, an inert gas such as argon or helium, or hydrogen chloride or hydrazine may be used. Further, in the present embodiment, a batch type LPCVD apparatus or a single wafer type multi-chamber L
It can also be performed by a PCVD apparatus.

(Second Embodiment) FIGS. 10 to 12 are process sectional views showing a method for forming a trench capacitor of a DRAM cell according to a second embodiment of the present invention.

First, as shown in FIG. 10A, a silicon oxide film 12 having a thickness of 10 nm is formed on a single crystal p-type silicon substrate 11 by a thermal oxidation method. CVD of silicon nitride film 13 having a thickness of 500 nm
It is formed using a method. The specific resistance of the p-type silicon 11 is, for example, 10 Ωcm, and the crystal plane is, for example, a (100) plane.

Next, as shown in FIG. 10B, the silicon nitride film 13, the silicon oxide film 12, the p-type silicon substrate 1
1 is etched using a resist (not shown) as a mask to form a trench 14. RIE (Reactive Ion Etching) is used for the etching.

Next, as shown in FIG. 10C, a thermal oxide film 15 having a thickness of 5 nm is formed on the entire surface by a thermal oxidation method so as to cover the inner wall of the trench 14, and then over the thermal oxide film 15. Then, a silicon nitride film 16 having a thickness of 10 nm is formed by using the CVD method, and then a resist 17 is applied on the entire surface so as to fill the trench 14.

Next, as shown in FIG. 11D, after irradiating the resist 17 with light, the resist 17 is developed and the trench 1 having a depth of 1.5 μm or less from the opening surface of the trench 14 is formed.
Only the resist 17 buried in 4 is left selectively. The resist 17 remains in the trench 14 because light does not reach the bottom of the trench. Note that a part of the resist 17 may be removed by etching.

Next, as shown in FIG. 11E, the silicon nitride film 16 and the thermal oxide film 15 are
Are sequentially etched to expose the side walls of the trenches 14 at portions not buried with the resist 17.

Next, as shown in FIG. 11 (f), the resist 17 is peeled off and the thickness 3
A 0 nm thermal oxide film 18 is selectively formed. Thereafter, the silicon nitride film 16 and the thermal oxide film 15 are sequentially removed.

Next, in a batch type vertical CVD furnace, a heat treatment is performed in a hydrogen atmosphere at 950 ° C. and 100 Torr for 1 hour to form a natural oxide film (non-conductive) formed on the silicon substrate 11 under the trench 14. (Shown).

Next, as shown in FIG. 12 (g), a heat treatment is performed at 950 ° C. and 400 Torr for 1 hour in an AsH ₃ atmosphere continuously in the same furnace without exposing the silicon substrate 11 to arsenic. Is diffused to form a high-concentration n-type impurity diffusion layer (plate electrode) 19.

Next, as shown in FIG. 12 (h), a heat treatment at 950 ° C. and 10 Torr for 1 hour in an NH ₃ atmosphere without exposure to the air is performed continuously in the same furnace to obtain a thickness of 2 nm. Is formed. After that, NH _{3 is} again used by another vertical batch type LPCVD apparatus.
Heat treatment is performed in an atmosphere at 950 ° C. for 10 Torr for 1 hour. At this time, since the thermal oxide film is once formed on the surface of the nitride film, the surface of the nitride film is protected from oxidation and hardly oxidized.

Next, as shown in FIG. 11H, a silicon nitride film (capacitor insulating film) is continuously formed on the thermal nitride film 20 by CVD in the same furnace without being exposed to the air.
21 are formed. As raw materials, SiH ₂ Cl ₂ and NH ₃ are used as raw materials.

Finally, as shown in FIG. 12 (i), the trench 14 is buried with an amorphous silicon film (storage node electrode) 22 containing impurities to complete a trench capacitor. Thereafter, a DRAM cell is completed by forming an element isolation groove, a MOS transistor, and the like according to a known method.

According to the present embodiment, prior to the formation of the n-type impurity diffusion layer, the natural oxide film layer is removed by a heat treatment in a hydrogen atmosphere, and then the capacitor insulating film is continuously formed in a vacuum. Since the formation of an oxide film (layer) such as a natural oxide film can be effectively prevented, the same effects as those of the first embodiment can be obtained. Various modifications as described in the first embodiment are also possible.

The present invention is not limited to the above embodiment. For example, in the above embodiment, AsH ₃
Although the case where the n-type impurity diffusion layer is formed by heat treatment (thermal diffusion) in an atmosphere has been described, the n-type impurity diffusion layer may be formed by another method. For example, it may be formed by heat treatment in PH ₃ atmosphere. In the case of forming a p-type impurity diffusion layer, for example, a heat treatment in a B ₂ H ₆ atmosphere may be used.

In the above embodiment, the case where the silicon nitride film (capacitor insulating film) is formed by the CVD method has been described, but it may be formed by another method. For example, a silicon nitride film having a laminated structure may be formed by forming a silicon nitride film by thermal nitridation with NH ₃ and then depositing another silicon nitride film thereon by a CVD method.

Further, in the above embodiment, the case where the silicon nitride film is used as the capacitor insulating film has been described, but another insulating film may be used. For example, a high dielectric film such as tantalum pentoxide may be used.

In the above embodiment, the state where the oxide film is not grown is realized by forming the impurity diffusion layer and the capacitor insulating film continuously in the same processing vessel. It is also possible to realize a state in which an oxide film does not grow by forming each in the same processing container.

[0094] Specifically, there is a method in which the temperature in the processing container when the silicon substrate is taken out from the processing container and when the silicon substrate is introduced into the processing container is a temperature at which an oxide film is not formed. Alternatively, there is a method in which the atmosphere when the silicon substrate is removed from the processing container and when the silicon substrate is introduced into the processing container is an atmosphere such as a nitrogen atmosphere in which an oxide film is not formed.

In the above embodiment, the case where a single crystal silicon substrate is used has been described. However, a polycrystalline silicon substrate or an SOI substrate may be used.

In addition, various modifications can be made without departing from the spirit of the present invention.

[0097]

As described above in detail, according to the present invention, after removing an oxide film formed on the surface of a semiconductor substrate, an impurity is added to the surface of the semiconductor substrate to form an impurity diffusion layer.
In addition, since the capacitor insulating film is formed without growing an oxide film on the surface of the impurity diffusion layer, an increase in leakage current can be effectively suppressed, whereby a minute The capacitor can be easily formed.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing a method for forming a capacitor according to an embodiment of the present invention.

FIG. 2 is a view showing an oxygen concentration distribution of an n-type impurity diffusion layer of the capacitor of the same embodiment and that of a capacitor formed by a first conventional method;

FIG. 3 is a view showing an arsenic concentration distribution of an n-type impurity diffusion layer of the capacitor according to the embodiment and that of a capacitor formed by a second conventional method;

FIG. 4 is a characteristic diagram showing respective leakage current characteristics of capacitors formed according to the method of the embodiment, a first conventional method, and a second conventional method.

FIG. 5 is a process sectional view showing a more preferable method for forming the silicon nitride film of the embodiment.

FIG. 6 is a graph showing the dependence of the leakage current of a MIS capacitor formed on a silicon nitride film in accordance with the method shown in FIG.
Characteristic diagram showing gate voltage dependence of leakage current of IS capacitor

FIG. 7 is a schematic view showing a process of forming a monoatomic silicon layer constituting the silicon nitride film of FIG. 5;

FIG. 8 is a schematic diagram showing a process of forming a nitrogen layer of one atomic layer constituting the silicon nitride film following FIG. 7;

FIG. 9 is a schematic view showing the process of forming one atomic layer of the silicon nitride film constituting the silicon nitride film following FIG. 8;

FIG. 10 is a process sectional view showing the method of forming the trench capacitor of the DRAM cell according to the second embodiment of the present invention.

FIG. 11 is a process sectional view illustrating the method of forming the trench capacitor following FIG. 10;

FIG. 12 is a process sectional view illustrating the method of forming the trench capacitor following FIG. 11;

[Explanation of symbols]

REFERENCE SIGNS LIST 1 silicon substrate 2 natural oxide film layer (oxide film) 3 n-type impurity diffusion layer (first capacitor electrode) 4 silicon nitride film (capacitor insulating film) 5 upper capacitor electrode (second capacitor electrode) Reference Signs List 6 nitride film 7 silicon layer 8 nitrogen layer 11 p-type silicon substrate 12 silicon oxide film 13 silicon nitride film 14 trench 15 thermal oxide film 16 silicon nitride film 17 resist 18 thermal oxide film 19 ... n-type impurity diffusion layer (first capacitor electrode) 20 ... thermal nitride film (capacitor insulating film) 21 ... silicon nitride film (capacitor insulating film) 22 ... amorphous silicon film (second capacitor electrode)

Claims (12)

[Claims] A step of removing an oxide film formed on the surface of the semiconductor substrate; a step of adding an impurity to the surface of the semiconductor substrate to form an impurity diffusion layer as a first capacitor electrode; A method of forming a capacitor insulating film on the impurity diffusion layer in a state where the semiconductor device does not grow, and a step of forming a second capacitor electrode on the capacitor insulating film. 2. The step of forming the capacitor insulating film comprises:
2. The method according to claim 1, further comprising the step of forming a silicon nitride film by a chemical vapor deposition method. 3. The step of forming the capacitor insulating film comprises:
2. The method according to claim 1, further comprising the step of forming a first silicon nitride film by a thermal nitridation method. 4. The method of forming a capacitor insulating film according to claim 1,
4. The method according to claim 3, further comprising the step of forming a second silicon nitride film on the first silicon nitride film by a chemical vapor deposition method. 5. The step of forming the capacitor insulating film,
A series of steps including a first heat treatment step in a first gas atmosphere containing silicon and not containing nitrogen and a second heat treatment step in a second gas atmosphere containing nitrogen and not containing silicon. 2. The method according to claim 1, further comprising a step of repeating the heat treatment step a plurality of times. 6. The method according to claim 5, wherein said first gas atmosphere is an atmosphere containing at least one gas of silicon tetrachloride, silicon trichloride and silicon dichloride. . 7. The semiconductor device according to claim 5, wherein said second gas atmosphere is an atmosphere containing at least one gas of ammonia, ammonia trifluoride, hydrazine, dimethylhydrazine and monomethylhydrazine. Manufacturing method. 8. The method according to claim 5, wherein a surface of the impurity diffusion layer is nitrided before the first heat treatment step. 9. The method according to claim 1, wherein the first and second capacitor electrodes are a plate electrode and a storage node electrode of a trench capacitor, respectively. 10. The oxide film is grown by forming the impurity diffusion layer in a container and continuously forming the capacitor insulating film in the container without removing the semiconductor substrate from the container. 2. The method for manufacturing a semiconductor device according to claim 1, wherein a state in which no operation is performed is realized. 11. The method according to claim 1, wherein the oxide film is a natural oxide film. 12. The method according to claim 1, wherein said semiconductor substrate is a silicon substrate.