JP2000041065A - Data retrieving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform the retrieval of an entry at high speed in the manner of processing through cache entry retrieval based on complete coincidence retrieval without performing fixed entry retrieval based on longest match every time. SOLUTION: A cache entry retrieving part 1 performs the complete coincidence retrieval and in the case of hit, the result is outputted. In the case of miss hit at the cache entry retrieving part 1, a fixed entry retrieving part 2 performs bisected retrieval. In the case of hit at the fixed entry retrieving part 2, the result is outputted and the hit entry information of the fixed entry retrieving part 2 is copied to the cache entry retrieving part 1 as well. Thus, a new IP address is registered in the cache entry retrieving part 1. In the case of miss hit at the fixed entry retrieving part 2, a retrieval error is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data search circuit used in a route search circuit in a router of an Internet system.

[0002]

2. Description of the Related Art In an Internet system, a route distribution device called a router distributes a route based on an IP address (Internet protocol address) given to information. The router has IP address data for managing route information, and the data search circuit has searched the IP address data from the IP address assigned to the transmitted information to determine a corresponding route.

FIG. 5 is a block diagram showing an example of a conventional data search circuit. The data search circuit 10c searches for the I
It has a fixed entry search unit 2 composed of a comparison unit such as a comparator for comparing the IP address data transmitted with the memory storing the P address data with the IP address data.

Next, the operation will be described with reference to the flowchart of FIG. When the search is started with the IP address as the search key, the data search circuit 10c always performs a two-branch search in the fixed entry search unit 2 in step S20.

[0005] A Patrician tree is one type of the two-branch search method. The Patrician tree is different from a general two-branch search method in that an empty branch node can be omitted and the number of searches can be reduced. FIG. 7 shows an example of a certain entry (IP address data) (A) to (D) and a Patrician tree. LEVEL is a bit position in a search bit string (IP address) which is referred to to determine a search direction at the branch point (node) of the tree, and is MSB.
LEVEL # 1 from the (most significant bit) side.

[0006] In a normal Patrician tree, an EXTERNAL NODE (terminal node) storing an actual entry
INTERNAL NODE
(Internal node). Further, in the IP routing search, since the IP address is regarded as a bit string and a longest match is performed to select the longest one from a plurality of matching variable-length entries, the I + E node in which the actual entry is stored in the node being searched is Exists. Search example A: Search key = 133.209.125.001 (10000101.11010001.0111
To search 1101.00000001) 1. Search for entries (A) to (D), and search for entry (A)
The 15th bit that matches the search key in (C) is inspected, and the search proceeds to the left (“0” side).

[0007] 2. Check the 17th bit of the search key,
The search proceeds to the left side (“0” side). At this time, entry A
Note that also matches the search key.

[0008] 3. Check the 22nd bit of the search key,
The search proceeds to the right side (“1” side).

4. Entry (C) hits. Search example B: Search key = 133.209.124.001 (10000101.11010001.0111
To search 1100.00000001) 1. The processing of (A) to (D) is performed in the same manner as in the search example A, and the entry (C) is reached but no hit is made.

[0010] 2. The entry (A) of the last matching I + E node becomes a hit.

If the fixed entry search unit 2 hits, a result is output in step S21. If there is a miss in the fixed entry search unit 2, a search error is output.

[0012]

As described above, in the conventional data search circuit, no matter what search key is input, the fixed entry search unit 2 always performs a two-branch search, which slows down the processing. .

[0013]

A data search circuit according to the present invention is a data search circuit used in a route search circuit in a router of a computer network system. The data search circuit has a memory in which route information to be searched is stored. A cache entry search unit configured to compare the received route information with the route information stored in the memory and performing a linear search; and a sent route information and the route information stored in the memory. And a fixed entry search unit configured to perform a binary search.

The data search circuit of the present invention performs a perfect match search of all bits by a linear search in a cache entry search unit, and outputs a result when a hit occurs, and a two-branch search in a fixed entry search unit when a miss occurs. I do.

The data search circuit of the present invention outputs a result when the fixed entry search unit hits in a two-branch search,
If there is a mishit, a search error is output.

The data search circuit of the present invention writes the route information hit by the fixed entry search unit into the memory storing the route information searched by the cache entry search unit after outputting the result by the fixed entry search unit.

The data search circuit of the present invention has a counter which counts the number of hits so that the cache entry search unit registers several pieces of route information that have been hit by the fixed entry search unit, starting with the number of hits. .

The data search circuit according to the present invention uses the above-described counter to output route information hit by the fixed entry search unit to the memory storing the route information searched by the cache entry search unit after the result is output by the fixed entry search unit. Write the route information from the one with the largest number of hits.

[0019]

Next, a first embodiment of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1, the data search circuit 10a receives an IP address sent from a memory having IP address data to be searched.
A cache entry search unit 1 which comprises a comparator such as a comparator for comparing an address with IP address data and performs a linear search, and an IP transmitted with a memory storing the IP address data to be searched. It has a fixed entry search unit 2 which is composed of a comparison unit such as a comparator for comparing an address with IP address data and performs a binary search.

Next, the operation of the embodiment of the present invention will be described with reference to FIGS.

For example, when a search is started with an IP address as a search key, in step S1, the cache entry search unit 1 performs a perfect match search of all bits by the simplest linear search. Is output. If there is a miss in the cache entry search unit 1, a two-branch search is performed in the fixed entry search unit 2 in step S3. If a hit is found in the fixed entry search unit 2, the result is output in step S4, and the cache entry search unit 1 is output in step S5.
To the entry information (I
P address) is also copied (learned). As a result, the new IP address is stored in the cache entry search unit 1. If there is a miss in the fixed entry search unit 2, a search error is output.

At the time of the next search, if a hit is made along the route of the cache entry search unit 1, there is no need to pass through the search route of the fixed entry search unit 2, and the speed can be increased. If there is a miss in the fixed entry search unit 2, a search error is output.

Next, a second embodiment of the present invention will be described in detail with reference to the drawings. Referring to FIG. 3, the data search circuit 10b of the second embodiment is different from the cache entry search unit 1 of the first embodiment in that the fixed entry search unit 2
And has a counter 3 for counting the number of hits so that several entry information (IP addresses) that have been searched for are registered. FIG. 3 shows a configuration diagram, and FIG. 4 shows a flowchart. Referring to FIGS. 3 and 4, when the search is started with the IP address as the search key, a perfect match search is performed by the cache entry search unit 1 in step S10, and if a hit is found, the transfer to the fixed entry search unit 2 is performed in step S11. Output the result without doing
If there is a miss in the cache entry search unit 1, a two-branch search is performed in the fixed entry search unit 2 in step S12. If a hit is found in the fixed entry search unit 2, the result is output in step S13, and
At 14, the counter 3 is sent to the cache entry search unit 1
The entry information is also copied (learned) in the descending order of the number of hits based on the counting of the numbers. In the next search, if a hit is made at the route of the cache entry search unit 1, the fixed entry search unit 2
There is no need to pass through the search route, and the speed can be increased.
If there is a miss in the fixed entry search unit 2, a search error is output.

[0024]

According to the present invention, a cache entry search by a perfect match search can be performed without performing a fixed entry search (two-branch search) by longest match every time in an address search in a case where an address entry to the memory is frequently updated / deleted. Thereby, the entry search is performed at a high processing speed.

[Brief description of the drawings]

FIG. 1 is a configuration diagram according to a first embodiment of the present invention.

FIG. 2 is a flowchart illustrating the operation of the configuration diagram shown in FIG. 1;

FIG. 3 is a configuration diagram according to a second embodiment of the present invention.

FIG. 4 is a flowchart for explaining the operation of the configuration diagram shown in FIG. 3;

FIG. 5 is a configuration diagram of a conventional example.

FIG. 6 is a flowchart for explaining the operation of the configuration diagram shown in FIG. 5;

FIG. 7 is a diagram showing an example of entries (A) to (D) and a Patrician tree.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Cache entry search part 2 Fixed entry search part 3 Counter 10a, 10b, 10c Data search circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5B075 ND04 ND23 NK10 NK24 QM01 QS11 5B089 GA05 GA31 GB01 KA05 KA06 KB06 KC37 KD02 5K030 GA03 HD03 KA05 LB05 5K033 BA04 DA05 DB12 DB16 DB18 EC04

Claims (6)

[Claims] In a data search circuit used in a route search circuit in a router of a computer network system, route information sent with a memory in which route information to be searched is stored and stored in the memory are stored. A cache entry search unit configured to perform a linear search and configured to compare a route information stored in the memory with a cache entry search unit configured to perform a linear search. A fixed entry search unit for performing the search. 2. The cache entry search unit performs a full search of all bits by a linear search, outputs a result when a hit occurs, and performs a two-branch search with the fixed entry search unit when a miss occurs. 2. The data search circuit according to claim 1, wherein: 3. The data search circuit according to claim 2, wherein the fixed-entry search unit outputs a result when a hit is found in a two-branch search, and outputs a search error when a miss occurs. 4. The route information hit by the fixed entry search unit is written into a memory storing route information searched by the cache entry search unit after outputting the result by the fixed entry search unit. 3. The data search circuit according to 3. 5. The cache entry search unit according to claim 1, further comprising a counter that counts the number of hits so that the route information searched by the fixed entry search unit is registered in descending order. Item 2. The data search circuit according to Item 1. 6. The route information hit by the fixed entry search unit is stored in the memory storing the route information searched by the cache entry search unit after outputting the result by the fixed entry search unit using the counter. 6. The data search circuit according to claim 2, wherein data is written in descending order of the number of hits.