JP2000031380A - Analog.digital mixed mount semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an analog.digital mixed mount semiconductor integrated circuit in which a digital circuit without exerting influence upon an analog circuit is constituted, and the mixed mounting efficiency of the analog circuit and the digital circuit is improved. SOLUTION: An integrated circuit 10 is constituted of an analog circuit 10 dealing an analog signal, and a digital circuit 12 which is constituted by using constant current drive logic elements for logic circuits and deals a digital signal. By this constitution, influence of the digital signal upon the analog signal can be reduced. By adopting the constant current logic elements, high speed switching can be realized. Further the analog circuits 11 can be stably operated. This integrated circuit is applied to an optical receiver device and miniaturization is facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital hybrid semiconductor integrated circuit, and more particularly to an analog / digital hybrid semiconductor device having an optical receiver used for optical communication by simultaneously handling analog and digital signals. It relates to an integrated circuit.

[0002]

2. Description of the Related Art Conventionally, as an example in which an analog circuit and a digital circuit are mixed, there is JP-A-2-303152, for example. This conventional example will be described with reference to FIG. IC 41 in which an analog circuit and a digital circuit of the conventional example are integrated.
Are the power line 42, the ground line 43, the digital circuit unit 4
4, a resistor 45, and an analog circuit section 46. In this configuration, one terminal 42 is connected to the power supply Vdd, and the other terminal is connected to the common point 43 of the power supply of the digital circuit section 44.

In the digital circuit section 44, switching type logic elements are arranged. This element is configured such that a transient current is supplied from the power supply Vdd only when the output changes, and no current flows during a period when the output is constant. As a configuration of the digital circuit unit 44, a clock signal, which is a standard of operation, is generally prepared, and an internal logic element of the digital circuit unit 44 changes its output in synchronization with the clock signal. When the digital circuit unit 44 in which a plurality of such switching-type logic elements are prepared operates, each output changes in synchronization with a clock signal. For this reason, an excessive transient current is supplied from the power supply Vdd to the digital circuit section 44 at that timing. In this conventional example, the resistor 45 is provided to reduce the peak value of the transient current.

[0004]

However, according to the above conventional example, the peak of the transient current supplied to the resistor 45 and the digital circuit section 44 can be suppressed, but it is practically impossible to completely eliminate it. Yes, analog circuit section 46
Effects still exist. In particular, when it is necessary to process a minute analog signal in an integrated circuit for optical communication and to make the gain sufficiently large, for example, to realize a stable operation of the analog circuit section 46, the digital circuit section 4 is required.
It is necessary to minimize the effect of (4). Furthermore, suppressing the peak of the transient current means that the switching time of the digital circuit unit 44 is required longer, and there is a problem that high-speed processing may not be performed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has a digital circuit section which does not affect the analog circuit section, thereby improving the efficiency of mixing the analog circuit section and the digital circuit section. An object of the present invention is to provide a mixed analog / digital semiconductor integrated circuit.

[0006]

In order to achieve the above object, a mixed analog / digital type semiconductor integrated circuit of the present invention uses a constant current drive type logic element for a logic circuit. With this configuration, the influence of the digital signal on the analog signal can be reduced, and high-speed switching can be realized by employing a constant current type logic element.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Therefore, in an analog / digital hybrid semiconductor integrated circuit according to the first aspect of the present invention, an analog circuit block for handling analog signals and a constant current drive type logic element are used for a logic circuit. A configuration having a digital circuit block that handles digital signals is employed. With this configuration, the effect of the digital signal on the analog signal is reduced. In addition, by adopting a constant current type logic element, high speed switching can be realized,
It also has the advantage of being suitable for high-speed processing.

[0008] The invention described in claim 2 has the above-described structure,
A circuit block for handling analog signals in a mixed analog / digital type semiconductor integrated circuit has a configuration including a preamble.

[0009] The invention according to claim 3 has the above-described structure,
A circuit block for handling analog signals in a mixed analog / digital type semiconductor integrated circuit has an AGC amplifier.

[0010] The invention described in claim 4 has the above-described structure,
A circuit block for handling digital signals in a mixed analog / digital type semiconductor integrated circuit has a configuration including a phase comparator and a discriminator in a clock recovery circuit.

[0011] In the invention according to claim 5, in addition to the above configuration, the semiconductor substrate of the analog / digital mixed type semiconductor integrated circuit is independently connected to the ground of the substrate on which the integrated circuit is implemented.

The mixed analog / digital semiconductor integrated circuit of the invention described in claim 6 is applied to an optical receiver and configured.

Next, an analog / digital hybrid semiconductor integrated circuit according to an embodiment of the present invention will be described in detail with reference to the drawings. 1 to 3 are circuit block diagrams of an analog / digital hybrid type analog / digital hybrid type semiconductor integrated circuit according to an embodiment of the present invention. Hereinafter, the present embodiment will be described with reference to these drawings.

(Embodiment 1) FIG. 1 is a circuit block diagram of an analog / digital hybrid type semiconductor integrated circuit of this embodiment. This mixed analog / digital semiconductor integrated circuit is configured as an integrated circuit 10. Integrated circuit 1
0 is composed of an analog circuit section 11 and a digital circuit section 12. As a terminal section, a power supply terminal (Vdd1) 13 prepared in the analog circuit section 11, a digital circuit section 1
2, a power terminal (Vdd2) 14 provided for the analog circuit unit 11, a ground terminal (gnd1) 15 provided for the analog circuit unit 11,
And a ground terminal (gnd2) 16 prepared in the digital circuit unit 12 are shown. Further, it has a terminal (gnd3) 17, an input terminal 18, and an output terminal 19 to which the semiconductor substrate of the integrated circuit is connected.

FIG. 2 shows a configuration example of the constant current type logic element according to the present embodiment. This circuit is a two-input OR circuit. Among various terminals, input terminals 21 and 22, current source 2
3, the output terminal 24 is shown. The semiconductor elements are transistors 251, 252, 253.

The input terminal 21 is connected to the gate terminal of the transistor 251. Input terminal 22 is connected to the gate terminal of transistor 252. Transistor 25
The source terminals of 1, 252, 253 are commonly connected,
Connected to current source 23. One of the resistors 261 is connected to the power supply line, and the other is connected to the drain terminals of the transistors 251 and 252. One of the resistors 262 is connected to the power supply line, and the other is connected to the drain terminal of the transistor 253.

The gate terminal of the transistor 27 is connected to a resistor 2
62 and one terminal of the transistor 253. The transistor 27 has a drain terminal connected to the power supply line, and a source terminal connected to the current source 28 and the output terminal 2.
4 and is connected to The resistors 291 and 292 are connected to the gate terminal of the transistor 253, and
1 is connected to the power supply line, and the resistor 292 is connected to the ground. The output level is determined depending on whether the input potential of the input terminals 21 and 22 is higher (logic "1") or lower (logic "0") with respect to the reference voltage generated by the resistors 291 and 292. More specifically, if one or both of the input levels of the input 21 and the input terminal 22 are "
In this case, the set current of the current source 23 flows through the transistors 251 and 252, and does not flow through the transistor 253. As a result, a potential drop occurs at both ends of the resistor 261 while the resistor 262 flows through the resistor 262. No current flows, so that no potential drop occurs at both ends of the resistor 262, and a high level appears at the output terminal 24. As described above, the constant current type logic element according to the present embodiment shown in FIG. It can be understood that the circuit of FIG.

In this circuit, it can be seen that a constant current always flows regardless of the timing at which the logic level at the output is inverted. Although only an OR circuit is shown in this figure, a NAND circuit having a similar constant current type circuit configuration,
A NOT circuit and a D-flip-flop circuit are possible.
For example, as a circuit using a bipolar transistor,
It is widely used as an ECL (Emitter Coupled Logic) logic element. By configuring the digital circuit section 12 by combining these logic circuits, transient current from the power supply line can be suppressed as much as possible.

From the digital circuit section 12 to the analog circuit section 1
The noise affecting 1 is mainly due to the fact that a transient current from the power supply line to the ground causes the ground inside the integrated circuit and the external ground to fluctuate, which affects the analog circuit unit 11. However, in the digital circuit unit 12 using the constant current type logic element according to the present embodiment, the transient current from the power supply line to the ground is suppressed, and a constant current always flows. Therefore, the ground terminal 1 of the digital circuit section 12
6 and the ground terminal 17 of the substrate, the potential is stabilized, and the ground 15 in the analog circuit 11 is not affected. Further, with respect to the power consumption in the digital circuit unit 12, by optimizing the set current value of the current source according to the load capacity, it is possible to reduce power consumption relatively, and to set it at a level that does not cause a problem. it can. Thereby, low noise can be achieved, and the analog circuit section 11 can be operated stably.

(Embodiment 2) A second embodiment will be described with reference to FIG. FIG. 3 shows the analog / digital converter of the second embodiment.
FIG. 1 shows a circuit block diagram of a digital hybrid semiconductor integrated circuit. This analog / digital hybrid semiconductor integrated circuit includes a photoelectric conversion element 30 that converts an optical input signal into a current signal, and an integrated circuit 31 that constitutes a light receiving circuit. This integrated circuit 31 is further subdivided into an analog circuit section 32 provided inside the integrated circuit 31, a digital circuit section 33 provided inside the integrated circuit 31, and a VCO for changing the oscillation frequency according to the input voltage level.
(Voltage control oscillator) 34. Although the VCO 34 is described outside the integrated circuit 31, a configuration in which the VCO 34 is provided inside the integrated circuit 31 is also conceivable.

In other components, the photoelectric conversion element 3
A preamplifier 321 having a function of converting an output current of 0 to a voltage signal, an AGC amplifier 322 for constantly matching an output from the preamplifier 321 to a constant output without depending on an optical input level, and a phase comparator 331. , A phase comparator 331 for detecting a phase difference between an output from the AGC amplifier and a clock signal from the VCO 34, and an output from the AGC amplifier 322. Signal VCO
An identification circuit 332 for converting into a digital output with a phase of 34.

Each of the phase comparator 331 and the discriminating circuit 332 constituting the digital circuit section 33 is constituted by using the constant current type logic element described in the first embodiment, so that the digital circuit section 33 receives the signal from the digital circuit section 33. Noise can be sufficiently suppressed. As a result, the analog circuit section 32 can be operated stably, so that it is possible to realize an optical receiver that can be integrated into one chip without using an expensive technique such as SOI that can separate the substrate and the circuit ground. Becomes

[0023]

According to the present invention, a constant current drive type logic element is used in the logic circuit of the digital circuit. With this configuration, the influence of the digital signal on the analog signal can be reduced, and high-speed switching can be realized by employing a constant current type logic element. Further, the analog circuit section can be operated stably.

According to the second aspect of the present invention, a preamplifier is integrated in an analog circuit block for handling an analog signal.
Because this preamplifier can operate stably,
A circuit configuration that realizes a sufficiently large transimpedance gain can be realized.

According to the third aspect of the present invention, since an AGC amplifier is integrated in an analog circuit block for handling an analog signal and the AGC amplifier can be operated stably, a circuit configuration for realizing a sufficiently large dynamic range is provided. Will be possible.

According to the above configuration, the digital circuit block for handling digital signals includes the phase comparator and the discriminator in the clock recovery circuit, so that the optical receiver can be configured with one chip. And can be miniaturized.

According to the above configuration, in the invention according to claim 5, the substrate of the analog / digital mixed type semiconductor integrated circuit is independently connected to the ground, thereby enabling a stable circuit operation.

According to the above construction, the optical receiver according to the sixth aspect can be downsized.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of an embodiment of an analog / digital hybrid semiconductor integrated circuit according to the present invention.

FIG. 2 shows a configuration example of a constant current type logic element.

FIG. 3 is a circuit block diagram of a mixed analog / digital semiconductor integrated circuit according to a second embodiment;

FIG. 4 is a circuit block diagram of a conventional analog / digital hybrid semiconductor integrated circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Integrated circuit 11 Analog circuit part (analog circuit block) 12 Digital circuit part (digital circuit block) 13, 14, 23 Power supply terminal 15, 16 Ground terminal 17, 18, 19, 21, 22, 24 terminal 30 Photoelectric conversion element 31 Integrated circuit 32 Analog circuit section 33 Digital circuit section 34 VCO 251, 252, 253 Transistor 261, 262 Resistance 321 Preamplifier 322 AGC amplifier 323 Charge pump circuit 331 Phase comparator 332 Identification circuit

Claims (6)

[Claims] An analog circuit comprising: an analog circuit block for handling an analog signal; and a digital circuit block for handling a digital signal formed by using a constant current drive type logic element for a logic circuit.・ Digital embedded semiconductor integrated circuit. 2. The analog / digital hybrid semiconductor integrated circuit according to claim 1, wherein said analog signal circuit block includes at least a preamplifier. 3. An analog / digital hybrid semiconductor integrated circuit according to claim 1, wherein said analog circuit block includes at least an AGC amplifier. 4. The mixed analog / digital type according to claim 1, wherein said digital circuit block includes at least a phase comparator and a discriminator in a clock recovery circuit. Semiconductor integrated circuit. 5. The semiconductor substrate on which the analog / digital hybrid semiconductor integrated circuit is integrated is connected independently of the ground of a substrate on which the integrated circuit is mounted. 3. An analog / digital hybrid semiconductor integrated circuit according to claim 1. 6. The mixed analog / digital semiconductor integrated circuit according to claim 1, wherein said mixed analog / digital semiconductor integrated circuit is applied to an optical receiver.