JP2000022210A - Semiconductor light emitting element and semiconductor light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor light emitting element which has a radiation pattern excellent in symmetry even if an insulating substrate is used. SOLUTION: In this semiconductor light emitting element, the section of the second conductivity type of semiconductor layer constitutes a light emitting part. The semiconductor light emitting element has the first bonding pad 15 connected electrically to the first electrode and the second bonding pad 15 connected electrically to the second electrode. Here, this element has an insulating layer 16 right below the first bonding pad 15, and further the first bonding pad 15 and the second bonding pad 18 are arranged adjacently on the same side to the light emitting part, and besides the light emitting part is arranged close to the long side part that the external form of the first bonding pad 15 and the second bonding pad make, and besides the first electrode is provided on opposite side across the light emitting part to the second bonding pad 18.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor light emitting device, and more particularly to a structure and a shape of an electrode and a bonding pad of a semiconductor light emitting device formed on an insulating substrate and mounted using the structure. The present invention relates to a semiconductor light emitting device.

[0002]

2. Description of the Related Art A semiconductor light emitting device such as an LED emitting light in a visible or ultraviolet region has been realized by using a nitride semiconductor material represented by GaN, AlN, InN or a mixed crystal thereof. In these light emitting devices, as a growth substrate,
Sapphire or the like is mainly used, but since these substrates are insulative, it is necessary to take out a positive electrode and a negative electrode from the growth surface side, which is different from the conventional light emitting element using a conductive substrate such as GaAs. Various structures have been proposed.

FIG. 11 shows a conventional example related to such a technique described in Japanese Patent Application Laid-Open No. 7-94782. FIG. 11A is a plan view (top view) of a conventional gallium nitride-based compound semiconductor light emitting device, and FIG.
(A) It is the schematic cross section cut | disconnected by the HH 'line. FIG.
In this case, n is placed on an insulating substrate 70 such as a sapphire substrate.
A p-type gallium nitride compound semiconductor layer 71 and a p-type gallium nitride compound semiconductor layer 73 are sequentially stacked. On the n-type gallium nitride compound semiconductor layer 71, a negative electrode 72 is formed. On the layer 73, a positive electrode wire bonding pad 74 is formed.
Reference numeral 75 denotes a current-diffusing translucent electrode formed to cover almost the entire surface of the p-type gallium nitride compound semiconductor layer 73;
Reference numeral 6 denotes a window for taking out the positive electrode wire bonding pad 74 provided on the translucent electrode 75.

In this conventional example, the negative electrode 72 also functions as a wire bonding pad for the positive electrode. As shown in FIG. 1, the wire bonding pad 74 for the positive electrode and the negative electrode 72 are quadrangular. They are formed at opposing corners of the chip outer shape. In the present LED element, a conductive wire is connected to the wire bonding pad 74 for the positive electrode and the negative electrode 72, and a light emitting operation is performed by supplying a current from outside through these.

[0005]

However, the above-described wire bonding pad 74 for the positive electrode and the negative electrode 7 are used.
No. 2 requires the use of a metal layer having a considerable thickness or more in order to ensure the connection of the wires, so that it is impossible to transmit light emission, and further, in order to secure a bonding area, In general, since a size of 80 μm square or more is required, the light emitting pattern of a light emitting element having a structure in which positive and negative electrodes are formed at diagonal corners of the element is constricted at the center, and a substantially square dark portion is formed on both sides. It has a complicated light emitting pattern shape. FIG. 12 is a diagram for explaining a light emitting pattern when the semiconductor light emitting element (LED chip) 77 having such an arrangement of electrodes and bonding pads is assembled as a resin-molded semiconductor device (LED lamp) with a lens. Depending on the direction in which the resin mold LED lamp 78 is viewed, for example, the direction of 79 and the direction of 80, the light emitting pattern has asymmetric shapes 81 and 82. Therefore, when an LED lamp having such a directional characteristic is combined with another lamp, for example, when a full-color display panel is assembled, the mixing and color mixing ratio with the other LEDs changes depending on the viewing angle, and the luminance is reduced. It was perceived as non-uniform and non-uniform in color.

FIGS. 13A and 13B are diagrams showing a configuration of a semiconductor light emitting device in which a conventional light emitting element is assembled into a surface mount type lamp, wherein FIG. 13A is a plan view, FIG. 13B is a modified view of FIG.
(C) is a sectional view of (a). In the figure, electrode terminals 89 and 90 are formed on a bottom surface 92 of a mold case 91 of a surface-mounted type semiconductor light emitting device 83, and bonding pads 84 and 85 of a semiconductor light emitting element 77 and electrode terminals 8 are formed.
9 and 90 are connected by wires 86 and 87, respectively. In the conventional light emitting element, since the bonding pad is located at a diagonal position of the chip, when attaching the semiconductor light emitting element 77 to the semiconductor light emitting device 83, the wires 8 bonded to the bonding pads 84 and 85
The semiconductor light-emitting element 77 is provided so that the light-emitting elements 6 and 87 do not block the emitted light.
Must not cross the front of the light emitting section. Therefore, the electrode terminals 89 and 90 for connecting the wires to the lead frame or the like need to be formed on both sides of the light emitting element as shown in FIG. 13A, or on two sides as shown in FIG. 13B. Yes, minimizing the size of the semiconductor light emitting device.

Further, FIG. 14 is a diagram showing a configuration in a case where a plurality of conventional light emitting elements are used to assemble a surface-mounted semiconductor light emitting device in an array, and FIG. FIG. 14 is a plan view when the sides of the light emitting elements are arranged in parallel with the array with respect to the common wirings 95 and 96, and FIG.
(B) is a plan view in which the sides of the light emitting elements are arranged in a diamond shape at an angle of 45 degrees with respect to the array with respect to the common wiring for power supply. 14A and 14B, reference numerals 84 and 85 denote bonding pads of the semiconductor light emitting element 77, 86 and 87 denote wires for wire bonding, and 88.
Is a light emitting portion of the semiconductor light emitting element 77, 89 and 90 are electrode terminals, and 95 and 96 are supply common wires. FIG.
In the case of (a), the light intensity distributions at the intercepts ii ′ and jj ′ are shifted from the highest position as shown in 93 and 94, respectively. This has led to a decrease in reading accuracy. In order to maintain this reading accuracy, it is necessary to arrange as shown in FIG. 13B. The light emitting elements are inclined at 45 degrees to the array and the direction (the sides of the light emitting elements are arranged in a diamond shape). In addition, there is a problem that the outer size of the array-type surface-mount type semiconductor light emitting device light source becomes large, and the light emitting points cannot be densely arranged.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor light emitting device, wherein a first conductivity type semiconductor layer is formed on a substrate, and a second conductivity type semiconductor layer is formed on a part of the first conductivity type semiconductor layer. A first electrode on the first conductive type semiconductor layer, a second electrode on the second conductive type semiconductor layer, a first bonding pad electrically connected to the first electrode, and a second electrode electrically connected to the second electrode. A first bonding pad and a second bonding pad are formed on the same side with respect to the light emitting unit, and the first bonding pad and the second bonding pad are formed on the same side. An insulating film is formed immediately below the bonding pad, and the first electrode and the second bonding pad are provided along different sides of the chip outer shape.

According to a second aspect of the present invention, in the semiconductor light emitting device, the first electrode is provided on a side opposed to the second bonding pad with a light emitting portion interposed therebetween.

[0010] The semiconductor light emitting device according to claim 3 is a semiconductor light emitting device comprising:
The electrode is electrically connected to the first bonding pad via a wiring layer, and an insulating layer is formed immediately below the wiring layer.

According to a fourth aspect of the present invention, in the semiconductor light emitting device, a lead wire having a lower sheet resistance than the second electrode is formed in contact with the second electrode and the second bonding pad. It is characterized in that it is formed on the side facing the first electrode with the sandwiched between.

The semiconductor light emitting device according to claim 5, wherein the first electrode and the lead wire are formed on two sides adjacent to a periphery of a chip on which the first bonding pad and the second bonding pad are formed. It is characterized by being formed along.

According to a sixth aspect of the present invention, in the semiconductor light emitting device, the planar shape of the light emitting portion is at least three times rotationally symmetric.

According to a seventh aspect of the present invention, in the semiconductor light emitting device, the semiconductor light emitting element is fixed to a case, and wires are respectively connected to the first bonding pad and the second bonding pad of the light emitting element. Is drawn out to the side opposite to the light emitting portion of the light emitting element and connected to a terminal provided in the case.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS <Embodiment 1> FIG. 1 is a view showing the structure of a light emitting device according to a first embodiment of the present invention, and FIG. 1 (a) is a plan view (top view). And FIG.
(B) and FIG. 1 (c) are schematic sectional views. FIG.
In (a), 10 is a sapphire substrate (about 350 μm
× 350 μm square), and 19 is a light emitting section (about 30 μm).
0 μm × 170 μm rectangle), and 15 is about 130
μm square positive electrode bonding pad (hereinafter, referred to as
Reference numeral 18 denotes a bonding pad for a negative electrode of about 80 μm square (hereinafter referred to as a negative electrode pad). The positive and negative electrode pads are arranged on the same side of the light emitting unit 19 on the chip. The light-emitting portion 19 of the semiconductor light-emitting element is disposed near a long side formed by the outer shape of the positive electrode pad and the negative electrode pad. The negative electrode pad 18
The negative electrode 20 (approximately 20 μm in width) formed at a position facing the positive electrode pad with the light emitting unit interposed therebetween is electrically connected to a wiring layer 21 provided beside the light emitting unit 19. And an insulating layer 1 immediately below the negative electrode pad 18.
6 are stacked. FIG. 1B is a schematic sectional view taken along line AA ′ of FIG. 1A, and FIG. 1C is a schematic sectional view taken along line BB ′ of FIG.

FIG. 1B shows a sapphire substrate 10.
Above, the n-type _{Al X Ga Y In 1-XY} N layer substantially parallel surfaces are exposed partially with the sapphire substrate 10 (0 ≦ X ≦ 1,0 ≦
Y ≦ 1) 11 is formed thereon, and the light emitting layer Al
_Z Ga _T In _1-ZT N layer (0 ≦ Z ≦ 1,0 ≦ T ≦ 1) 1
2. p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦ 1, 0 ≦
V ≦ 1) 13 are stacked. The translucent positive electrode 14 is
It is formed to cover the p-type Al _U Ga _V In _1-UV N layer 13. The wiring layer 21 is formed on the partially exposed surface of the n-type Al _X Ga _Y In _1-XY N layer 11 with the insulating layer 16 interposed therebetween, and the negative electrode pad 18 is formed thereon. Thus, the wiring layer 21 and the negative electrode pad 18 are electrically connected.

An n-type Al _X Ga _Y In _1-XYN layer 1 is provided at a position facing the negative electrode pad 18 with the light emitting portion interposed therebetween.
The negative electrode portion 20 is formed directly on the exposed surface of the first electrode. In FIG. 1C, the sapphire substrate 10
Above, the n-type _{Al X Ga Y In 1-XY} N layer substantially parallel surfaces are exposed partially with the sapphire substrate 10 (0 ≦ X ≦ 1,0 ≦
Y ≦ 1) 11 is formed thereon, and the light emitting layer Al
_Z Ga _T In _1-ZT N layer (0 ≦ Z ≦ 1,0 ≦ T ≦ 1) 1
2. p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦ 1, 0 ≦
V ≦ 1) 13 are stacked. The translucent positive electrode 14 is
p-type _{Al U Ga V In 1-UV} N layer 13 is formed overlying, only the direct positive electrode pads 1 in a predetermined area thereon
By forming 5, the translucent positive electrode 14 and the positive electrode pad 15 are electrically connected. An n-type Al _X Ga _Y is provided at a position facing the positive electrode with the light emitting portion 19 interposed therebetween.
A negative electrode 20 is formed immediately above the exposed surface of the In _{1 -XYN} layer 11. With the above configuration, the light emitting section 19 in the plan view is the same as the n-type Al _X Ga _Y In _1-XY N layer 11, Al _Z
Ga _T In _1-ZT N layer 12, p-type _{Al U Ga V In 1-UV} N
This is a region corresponding to the laminated structure of the layer 13 and the translucent positive electrode 14.

Next, a method for manufacturing a semiconductor light emitting device according to the present embodiment will be described. On the sapphire substrate 10, n-type _{Al X Ga Y In 1-XY} N layer (0 ≦ X ≦ 1,0 ≦
_{Y ≦ 1) 11, Al Z} Ga T In 1-ZT N layer (0 ≦ Z ≦
1,0 ≦ T ≦ 1) 12, p -type _{Al U Ga V In 1-UV} N layer (0 ≦ U ≦ 1,0 ≦ V ≦ 1) 13 sequentially stacked. Then, using photolithography and dry etching techniques, to the middle of the n-type _{Al X Ga Y In 1-XY} N layer 11 from the wafer surface, the peripheral portion of the element and, to remove the portion forming the negative electrode. The pn interface is left only in the portion on the mesa that has not been etched.

Next, the p-type Al _U Ga _V In _1-UV N layer 1
A light-transmissive positive electrode 14 (thickness: about 6 nm) is formed on almost the entire surface of the substrate 3. Ni was used as an electrode material. The positive electrode pad 15 is formed in a predetermined area on the positive electrode pad 15. Positive electrode pad 1
The thickness of No. 5 may be relatively thick so as to facilitate bonding, and is about 1 μm. The material of the positive electrode pad 15 may be formed of a metal that can be easily connected to a wire material that is usually formed of Au or an Au-based alloy or Al or an Al-based alloy. Here, Ti / Au (Ti is the lower side) is used. ) Was used. In the present embodiment, the positive electrode pad 15
Was about 130 μm square.

Further, the n-type Al _X Ga _Y In _1-XY N layer 11
After forming the insulating layer 16 thereon, the negative electrode 20 and the wiring layer 21 are integrally formed, and the negative electrode pad 18 is formed in a predetermined region thereon. SiO 2 as a material of the insulating layer 16
₂ was used. Since the negative electrode 20 and the wiring layer 21 do not need to be bonded, they need not be excessively large.
The line width is appropriately about 2 to 20 μm, and in this embodiment, it is 10 μm. Conversely, the negative electrode pad 18 needs to have a width of 80 μm or more for bonding.
In the present embodiment, the shape is approximately a square of about 80 μm square. The insulating layer 16 is provided with a margin for mask alignment so that the wiring layer 2
The area immediately below the first electrode pad is about 30 μm wide, and the negative electrode pad 18
In the area immediately below, a substantially rectangular shape of about 100 μm × 130 μm was formed. Further, the insulating layer 1 in a region immediately below the wiring layer 21 is formed.
6 is the length of the negative electrode pad 18 in this embodiment.
Is approximately 270 μm inclusive of the portion immediately below the wiring layer 21 located on one side of the light emitting portion in which is present.

Here, the negative electrode 20 provided on the side opposite to the positive electrode pad 15 with the light emitting portion interposed therebetween is made of an n-type Al _X G
a plays a role of injecting a current into the _Y In _1-XYN layer 11 by bonding to the layer, and the negative electrode pad 1 provided on the same side with respect to the positive electrode pad 15 and the light emitting portion 19.
8, and the wiring layer 21 electrically connecting the negative electrode 20 and the negative electrode pad 18 are insulated from the semiconductor layer by the presence of the insulating layer 16 provided thereunder. The material of the negative electrode 20 and the wiring layer 21 is T
i / Al and the material of the negative electrode pad 18 is Ti
/ Mo / Au was used.

In the present embodiment, the steps are simplified because the negative electrode 20 and the wiring layer 21 are provided collectively, but it is needless to say that these may be provided by different materials as appropriate. Absent. When both are made of different materials, for example, the negative electrode 20 uses Ti / Al, and the wiring layer 21 uses, for example, Al. The above steps are actually applied collectively to a large number of semiconductor elements on a wafer, and then each element (chip) is cut out in a quadrilateral shape to complete the semiconductor light emitting element shown in FIG.

The light emitting device of the present invention emits light when power is supplied to the positive electrode pad and the negative electrode pad from outside the device. To explain the current flow in the element, first,
Current is supplied from the positive electrode pad on the transparent positive electrode, further, p-type _{Al U Ga V In 1-UV} N layer 13, Al _Z Ga _T I
n _{1 -ZT} N12 (light-emitting layer), n-type Al _X Ga _Y In _1-XY N
It reaches the negative electrode 20 via the layer 11, and further reaches the negative electrode pad via the wiring layer 21.

Here, by covering the upper surface of the light emitting region,
Since the translucent positive electrode is provided, the p-type Al _U Ga _V has a very small film thickness (several μm or less) compared to the size of the light emitting portion (in the present embodiment, a rectangle of about 300 μm × 170 μm). A current is easily supplied to the light emitting layer relatively uniformly from the In _{1 -UVN} layer 13. Further, since the negative electrode 20 is located opposite to the positive electrode pad 15 with the light emitting portion 19 interposed therebetween, when viewed in a plan view, one side of the light emitting portion (the positive electrode pad 15) and the opposite side thereof. (Negative electrode 2
0), the current flows, and thus the current is uniformly injected into each part of the light emitting unit. Thereby, the substantially rectangular light emitting portion can emit light uniformly.

As a modification of the light emitting device of the present embodiment, a light emitting device having a common bonding pad and negative electrode on the negative side is manufactured as in the conventional example. That is, in FIG. Except for the electrode 20 and the wiring layer 21, the n-type Al _X Ga _Y In _1-XYN layer 11 is located immediately below the negative electrode pad 18.
A semiconductor light emitting device having the same electrode shape and electrode arrangement as in the present embodiment except that a negative electrode portion was provided in contact with the positive electrode pad 1 of the light emitting portion 19 was prepared.
Since the current intensively flows only in the vicinity of the side where the negative electrode pad 5 and the negative electrode pad 18 are located, this portion emits light strongly and the other regions hardly emit light.

Therefore, due to a problem such as partial heat generation due to current concentration, the characteristics of the light emitting element are deteriorated as compared with this embodiment. Also, in the element which generates partial heat in this way, since the deviation of the amount of heat generated in each part varies depending on the drive current value or the drive current pulse width, the luminous efficiency changes depending on the amount of heat generated. It is difficult to use because it changes depending on the value or the drive current pulse width.

Also, in FIG. 1, the insulating layer 16 is omitted, that is, the n-type Al _X Ga _Y In _1-XY N layer 11 has the negative electrode pad 18, the wiring layer 21, and the negative electrode 21 in FIG. A modified example of the light emitting element of the present embodiment in which a current is injected from the direction was also experimentally manufactured, and although not as large as the previous modified example, the positive electrode pad 15 and the negative electrode pad 18 of the light emitting portion 19 were also formed. The current concentratedly flowed only in the vicinity of the side where it was located, and this portion emitted light intensely. From these facts, based on the configuration of the present invention, from one side (positive electrode pad 15) of the light emitting section,
It has been found that it is important to arrange the bonding pad on one side of the element while properly arranging the insulating layer 16 and the like so that current flows only on the opposite side (negative electrode 20).

FIG. 2 shows a state in which the light emitting element of FIG. 1 is mounted on a resin-molded light emitting diode lamp with a lens. (In a direction inclined along), almost the same smooth radiation characteristics could be obtained.
This is because, unlike the conventional example, the shape of the light emitting portion is symmetrical and the bonding pad is shifted to one side of the chip, so that the bonding wire (not shown) is formed.
This is due to the effect of the light emitting element of the present invention that it is difficult to prevent light emission in the left-right direction.

FIG. 3 is a diagram showing a configuration when a light emitting element according to the present embodiment is used to assemble a surface mounted semiconductor light emitting device. FIG. 3 (a) is a plan view and FIG.
(B) is the schematic sectional drawing cut | disconnected by CC 'line. In the figure, 10 is a sapphire substrate (about 350 μm square)
Reference numeral 19 denotes a light-emitting portion (a rectangle of about 300 μm × 170 μm), 15 denotes a positive electrode pad (about 130 μm square), 18 denotes a negative electrode pad (about 80 μm square), and a positive electrode pad 15. And negative electrode pad 18
Is disposed on the same side as the light emitting portion 19 on the sapphire substrate, and the light emitting portion of the semiconductor light emitting element is disposed near a long side formed by the outer shape of the positive electrode pad 15 and the negative electrode pad 18. Have been.

The negative electrode pad 18 includes a negative electrode 20 (about 10 μm in width) formed at a position facing the positive electrode pad 15 with the light emitting portion 19 interposed therebetween, and a wiring layer 21 provided beside the light emitting portion 19. The insulating layer 16 is stacked immediately below the wiring layer 21 and the negative electrode pad 18. Reference numerals 25 and 26 denote electrode terminals formed on the bottom surface 30 of the mold case 29 of the surface-mount type semiconductor light emitting device by plating or the like. The gold terminals 27 and 28 respectively connect the positive electrode pad 15 and the negative electrode pad 18 to each other. It is electrically connected. Reference numeral 31 denotes a transparent mold resin.

As described above, if the light emitting device of the present embodiment is used, the electrode terminals 25 and the electrode terminals 26 on the mold case 29 side can be gathered on one side of the light emitting device. The size of the semiconductor light emitting device can be reduced. Specifically, the external size of the surface-mount type semiconductor light emitting device shown in FIG. 3 is about 1.2 mm in length × about 1.8 mm in width × about 1.2 mm in height.
As shown in (a), the outer size estimated when the light emitting element of the conventional example is used is about 1.2 mm in length × about 2.0 mm in width.
The size can be further reduced as compared with about 2.3 mm × about 1.2 mm in height.

FIG. 4 is a diagram showing a configuration when a plurality of semiconductor light emitting devices according to the present embodiment are used and assembled into an LED array. Unlike a case where a single light emitting element is assembled into a surface mounted semiconductor light emitting device as shown in FIG. 3, the light emitting device is formed on the bottom surface of a mold case 32 of the surface mounted semiconductor light emitting device by plating or the like. The respective electrode terminals 33 and 34 are electrically connected by a common line 35 and a common line 36. 2
Reference numerals 7 and 28 denote gold wires connecting the electrode terminals 25 and 26 to the positive electrode pad 15 and the negative electrode pad 18, respectively. As a result, the positive electrode pad 15 and the negative electrode pad 18 are arranged close to each other, and the light emitting portion 19 of the semiconductor light emitting element is arranged close to the long side formed by the outer shape of the positive and negative electrode pads. With this arrangement, the gold wires 27 and 28 from the light emitting element can be pulled out to the same side, and the problem of the axial deviation of the light intensity which has been a problem in FIG. Can be solved without using the oblique arrangement of FIG.

FIG. 5 is a diagram showing a configuration in a case where the semiconductor light emitting device according to the first embodiment of the present invention is assembled into a semiconductor light emitting device of a type which is vertically mounted on a bottom surface and surface mounted. This figure shows a configuration in the case of connecting to a base such as a mold case using an anisotropic conductive resin adhesive. FIG. 5A is a perspective view of an essential part showing an example of a mold case of the semiconductor light emitting device, and FIG. 5B and FIG.
FIG. 5C is a schematic view of a main part when the semiconductor light emitting device according to the first embodiment of the present invention is connected to the mold case, and FIG. 5B is a plan view of the main part, and FIG. (c) is a cross-sectional view of a main part taken along line DD ′ of (b).

In FIG. 5A, reference numeral 37 denotes an example of a mold case of a type in which a semiconductor light emitting element is mounted upright on a bottom surface. Wall surface 42 perpendicular to bottom surface 41
In addition, wiring 3 is provided on the surface of the mold case.
8 and wiring 39 are formed, and these extend to the wall surface 42. The two wires 38 and the wires 3 on the wall surface 42
Between 9, there is a groove 40. The slope 43 serves as a reflector for collecting light emitted from the semiconductor light emitting element in a direction perpendicular to the bottom surface 41.

The height of the wall surface 42 is not less than 20 μm and not more than 350 μm.
m and preferably 100 μm or more and 200 μm or less. Here, it was 150 μm. Further, the width of the groove 40 is 190 μm or less, and here, it is about 100 μm. Further, the depth of the groove 40 is determined by the anisotropic conductive resin adhesive 44.
The maximum diameter of a conductive substance such as metal powder contained in
If it is set to μm, it is necessary to design it to be at least 5 μm.

FIGS. 5B and 5C show a state in which the semiconductor light emitting device according to the first embodiment of the present invention is mounted on the mold case 37 shown in FIG. Wall surface 42
In a region where the upper wiring 38, the wiring 39 and the groove 40 are present, for example, “Morfit TG-90” manufactured by Hysole Co.
Anisotropic conductive resin adhesive 44 such as "00R" or a similar product (a resin material in which a liquid translucent epoxy resin is mixed with conductive element particles having a particle size of about 10 μm or less of several to several tens wt%). I do. Next, a semiconductor light emitting element is mounted so that the sapphire substrate 10 is parallel to the wall surface 42 and the wirings 38 and 39 are in contact with the positive and negative electrode pads 15 and 18 respectively.

Finally, the anisotropic conductive resin adhesive 44 is cured from the upper surface of the semiconductor light emitting element while applying a load (approximately 2 to 20 kg / cm ² , pressurizing in the direction indicated by the arrow in the figure). The curing conditions are different depending on the type of the anisotropic conductive resin adhesive 44.
0 ° C. for 2 minutes to 200 ° C. for 30 seconds. As a result, the positive electrode pad 15, the negative electrode pad 1
Between the wiring 8 and the wiring 38 and the wiring 39 on the wall surface 42, the individual conductive substances interposed therebetween are in direct contact with each other, so that a conductive state is created.

On the other hand, the other portion of the anisotropic conductive resin adhesive 44 hardens without receiving a load, so that the conductive substances hardly come into contact with each other and are dispersed in the resin. Acts as an insulating resin adhesive. In this case, in the mold case 37, the wiring 38, the wiring 39
Since the groove 40 is formed between the positive and negative electrode pads, a conductive state due to the conductive substance does not occur between the positive and negative electrode pads.

When mounted as shown in FIG. 5, in addition to the light emitted from the light emitting section 19, the light emitted in a direction parallel to the pn junction surface of the semiconductor light emitting element and the sapphire substrate 10 of the semiconductor light emitting element In the case of being transparent, light emitted from the side surface of the substrate can also be directly extracted in a direction perpendicular to the bottom surface 41, so that the effect of improving the front luminance is produced. In an ordinary LED element, since the refractive index of the semiconductor layer is larger than that of the outside of the chip (usually a mold resin), light emitted along the semiconductor layer is guided, and the guided light extracted from the side of the chip is directly radiated. With such a configuration, the luminance can be effectively improved.

Further, by adopting a configuration in which chips are mounted upright as shown in FIG. 5, it is also possible to realize a surface mount type light emitting device having an extremely small projected area. Also in the surface-mount type light emitting device of this configuration, since the symmetry of the upward radiation pattern characteristic of the light emitting element of the present embodiment is good, each part in the direction parallel to the erect element is relatively constant. A radiation pattern is obtained.

In the light emitting device of the present embodiment,
Eliminating the insulating layer from just below the wiring layer 21, changing the part of the wiring layer 21 on the negative electrode to be joined with the n-type _{Al X Ga Y In 1-XY} N layer 11, this region, sandwich the light-emitting portion 19 It is clear from the plan view of FIG. 1 that the portion facing the positive electrode pad does not hinder the uniform supply of current to the light emitting portion, and such a change is included in the scope of the present invention. Things. More specifically, in the plan view of FIG. 1 (a), and any single point in a region where the negative electrode 20 is in contact with the n-type _{Al X Ga Y In 1-XY} N layer 11, a positive electrode pad 15 emission The insulating layer 16 may be disposed so that a line connecting an arbitrary point on the boundary line with the portion 19 has a structure crossing at least the light emitting portion 19.

<Embodiment 2> FIG. 6 is a plan view showing a structure of a light emitting device according to a second embodiment of the present invention. In the figure, 10 is a sapphire substrate (about 350 μm
× 480 μm rectangle), 45 is a substantially square light emitting portion (about 300 μm square), 15 is a 130 μm square positive electrode pad, 18 is a 80 μm square negative electrode pad, and the positive electrode pad 15 is And negative electrode pad 18
Is disposed on the same side of the sapphire substrate 10 with respect to the light emitting portion 19, and is close to the long side formed by the outer shape of the positive electrode pad 15 and the negative electrode pad 18. 45 are provided. Translucent positive electrode 14
The lead wire 49 is formed integrally with the positive electrode pad 15 along one side, and the negative electrode 20 (approximately 10 μm wide) is provided on the side facing the lead wire 49 with respect to the outer shape of the chip. ing.

The negative electrode pad 18 is connected to the negative electrode 20 (about 10 μm in width) and the wiring layer 2 provided beside the light emitting section 45.
1, the insulating layer 16 is stacked immediately below the wiring layer 21 and the negative electrode pad 18. The configurations of the positive electrode pad 15, the negative electrode pad 18, the light emitting section 45, and the negative electrode 20 are the same as those shown in FIGS. 1B to 1C. The method for manufacturing the semiconductor light emitting device in the present embodiment is the same as that in Embodiment 1 and will not be described in detail.

Here, the lead wire is made of a conductive material connected to the translucent positive electrode extending from the positive electrode pad, and is formed of a conductive layer having a significantly lower sheet resistance than the translucent positive electrode. When the light emitting element is operated, a potential difference between the vicinity of the lead wire tip and the positive electrode pad can be eliminated. In this embodiment, the lead wire has a total film thickness of 1 μm.
And a layer having a sheet resistance smaller by about two orders of magnitude as compared with a translucent positive electrode composed of a metal film having a thickness of about 10 nm or less in order to have translucency. .

According to the present embodiment, since the distance from the lead wire 49 joined to the positive electrode pad to the negative electrode 20 is uniform, the semiconductor light emitting device can be used even with a material which is likely to cause uneven injection current density. It became possible to configure. This makes it possible to further enhance the effect of causing the light emitting unit to emit light more uniformly than in the case of the first embodiment. Also in this embodiment, since the electrode pads are arranged on one side of the chip, the same effects as those of the first embodiment can be obtained, and the same semiconductor light emitting device as that shown in FIGS. It became possible to obtain.

<Embodiment 3> FIG. 7 is a plan view showing the structure of a light emitting device according to a third embodiment of the present invention. In the figure, 10 is a sapphire substrate (about 350 μm
× 480 μm rectangle), 46 is a substantially circular light emitting part (diameter of about 300 μm), 15 is a positive electrode pad of about 130 μm square, 18 is a negative electrode pad of about 80 μm square, and the positive electrode pad 15 is And negative electrode pad 18
Is disposed on the same side of the sapphire substrate 10 with respect to the light emitting portion 19, and is close to the long side formed by the outer shape of the positive electrode pad 15 and the negative electrode pad 18. 46 are provided.

The negative electrode 20 (approximately 5 μm in width) formed at a position facing the positive electrode pad 15 and the negative electrode pad 18 with the light emitting section 46 interposed therebetween is provided next to the negative electrode pad 18 and the light emitting section 46. The wiring layer 21 is electrically connected, and the insulating layer 16 is stacked immediately below the wiring layer 21 and the negative electrode pad 18. Positive electrode pad 15, negative electrode pad 18, light emitting section 46, and negative electrode 2
The configuration of 0 is the same as that shown in FIGS. 1B to 1C. The method for manufacturing the semiconductor light emitting device in the present embodiment is the same as that in Embodiment 1 and will not be described in detail.

By adopting the electrode structure in the present embodiment, it was possible to obtain a substantially circular light emitting portion 46. Also,
Also in the present embodiment, the current injected into the active layer is made uniform by the same effect as in Embodiment 1, so that the unevenness of the light emission pattern can be reduced. With this light emitting element, a symmetrical light emitting pattern as shown in FIG. 2 could be obtained. In particular, the substantially circular light emitting portion 46 of the present invention.
Is an infinite number of rotationally symmetric shapes, and has the advantage that the mounting angle can be selected when the light emitting element is mounted on a lead frame or the like. That is, when a light emitting element in the form of a non-circular light emitting portion is mounted on an axially symmetric lead frame, the directional pattern of light emission with respect to the direction of the lead frame differs depending on the mounting angle. It can be completely avoided.

In the present embodiment, since the negative electrode 20 and the wiring layer 21 which are formed in a relatively thin line do not exist near the corner of the chip of the semiconductor light emitting device shown in FIG. The chipping of the corner does not affect the element characteristics, which is advantageous for improving the yield. Also in the present embodiment, since the electrode pads are arranged on one side of the chip, the same effect as in the first embodiment can be obtained.
It has become possible to obtain a semiconductor light emitting device similar to that shown in FIGS.

Fourth Embodiment FIG. 8 is a plan view showing a structure of a light emitting device according to a fourth embodiment of the present invention. In the figure, 10 is a sapphire substrate (about 350 μm
× 480 μm rectangle), 47 is a substantially polygonal light emitting portion (outer diameter about 300 μm), and 15 is about 130 μm
A square positive electrode pad 18 is a negative electrode pad of about 80 μm square, and has a positive electrode pad 15 and a negative electrode pad 1.
Numeral 8 is disposed on the same side of the sapphire substrate 10 with respect to the light-emitting portion 19, and emits light of the semiconductor light-emitting element in proximity to the long sides formed by the outer shapes of the positive electrode pad 15 and the negative electrode pad 18. A part 47 is provided. The negative electrode pad 18 is electrically connected to a negative electrode 20 (about 5 μm in width) formed at a position facing the positive electrode pad 15 with the light emitting section 47 interposed therebetween, and a wiring layer 21 provided beside the light emitting section 39. The insulating layer 16 is stacked immediately below the wiring layer 21 and the negative electrode pad 18.

Positive electrode pad 15 and negative electrode pad 18
The configuration of the light emitting section 47 and the negative electrode 20 is shown in FIG.
This is the same as that shown in (b) to FIG. 1 (c). The method for manufacturing the semiconductor light emitting device in the present embodiment is the same as that in Embodiment 1 and will not be described in detail.

By adopting the electrode structure in the present embodiment, a substantially polygonal light emitting section 47 could be obtained. Also, in the present embodiment, the current injected into the active layer is made uniform by the same effect as in Embodiment 1, so that the unevenness of the light emission pattern can be reduced. With this light emitting element, a symmetrical light emitting pattern as shown in FIG. 2 could be obtained. In particular, the shape of the substantially polygonal light emitting portion 47 of the present invention has a rotationally symmetric shape, and as the number of rotational symmetry increases from three-fold symmetry to four-fold symmetry and from four-fold symmetry to five-fold symmetry, the shape of the light-emitting portion 47 is increased. The shape becomes closer to a circle, and there is an advantage that the mounting angle can be selected at the time of mounting on a lead frame or the like.

In other words, in the case of a light emitting pattern that is not point symmetric, the directivity pattern of light emission in the direction of the axially symmetrical lead frame is different. In the present embodiment, however, this problem can be reduced to a negligible level. Further, in the present embodiment, since the negative electrode 20 and the wiring layer 21 formed in a relatively thin linear shape do not exist near the corner of the chip of the semiconductor light emitting element shown in FIG. However, this does not affect the element characteristics, and is advantageous in improving the yield.

Also in this embodiment, since the electrode pads are arranged on one side of the chip, the same effects as those of the first embodiment can be obtained, and the same semiconductors as those shown in FIGS. A light emitting device can be obtained.

In FIG. 8, which is an explanatory view of the present embodiment, the shape of the light emitting portion 47 is a regular octagon, but the present invention is not limited to this, and at least three times. What is necessary is just to be rotationally symmetric.

<Embodiment 5> FIG. 9 is a diagram showing a configuration of a light emitting device according to a fifth embodiment of the present invention. In FIG. 9A, reference numeral 10 denotes a sapphire substrate (about 330 μm).
m × 480 μm rectangle), and 19 is a light emitting section (about 3
The reference numeral 15 denotes a positive electrode pad, the reference numeral 18 denotes a negative electrode pad, and the positive electrode pad 15 (approximately 130 μm square) and the negative electrode pad 18 (approximately 80 μm square) light emitting portion 19. And a light-emitting portion 19 of the semiconductor light-emitting element is disposed near the long side formed by the outer shapes of the positive electrode pad 15 and the negative electrode pad 18. On the light emitting portion 19, the lead wire 49 is connected to the positive electrode pad 1 along one side of the translucent positive electrode 14.
The negative electrode 20 (about 10 μm in width) is formed on the side facing the lead wire 49.

Further, an insulating layer 16 is formed on almost the entire surface of the light emitting element, and covers the negative electrode 20, the translucent positive electrode 14, and the like. A window is formed in the insulating layer 16 so that a part of the negative electrode 20 and the positive electrode pad 15 are exposed. Further, the negative electrode pad 18 is formed on the insulating layer 16 at a position facing the negative electrode 20, and the wiring layer 48 provided on the light emitting section 19 allows the negative electrode 20
And the negative electrode pad 18 are electrically connected. The connection between the negative electrode 20 and the wiring layer 48 is made through a window provided in the insulating layer.

FIG. 9B is a schematic sectional view taken along line EE ′ of FIG. 9A, and FIG. 9C is a schematic sectional view taken along line FF ′ of FIG.

In FIG. 9B, the sapphire substrate 10
Above, the n-type _{Al X Ga Y In 1-XY} N layer substantially parallel surfaces are exposed partially with the sapphire substrate 10 (0 ≦ X ≦ 1,0 ≦
Y ≦ 1) 11 is formed thereon, and the light emitting layer A
_{l Z Ga T In 1-ZT} N layer (0 ≦ Z ≦ 1,0 ≦ T ≦ 1) 1
2. p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦ 1, 0 ≦
V ≦ 1) 13 are stacked. The translucent positive electrode 14 is
It is formed to cover the p-type Al _U Ga _V In _1-UV N layer 13. The negative electrode 20 is formed by bonding to a partly exposed surface of the n-type Al _X Ga _Y In _{1 -XYN} layer 11.
Layer 16 having a window for connection between wiring and wiring layer 48
Are formed. The negative electrode pad 18 is formed on the insulating layer 16 at a position facing the negative electrode 20, and the negative electrode pad 18 and the negative electrode 20 are electrically connected by a wiring layer 48 formed on the insulating layer 16. Have been.

[0060] In the FIG. 9 (c), the on the sapphire substrate 10, n-type _{Al X Ga Y In 1-XY} N layer sapphire substrate 10 upper surface and the surface of substantially parallel exposed part (0 ≦ X ≦
1,0 ≦ Y ≦ 1) 11 is formed, and thereon a light-emitting layer _{Al Z Ga T In 1-ZT} N layer (0 ≦ Z ≦ 1,0 ≦ T
≦ 1) 12, p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦
1, 0 ≦ V ≦ 1) 13 are stacked. Transparent positive electrode 14, p-type Al _U Ga _V In is formed overlying _1-UV N layer 13, positive in a predetermined region on the p-type _{Al U Ga V In 1-UV} N layer 13 An electrode pad 15 is formed.

The negative electrode 20 is made of n-type Al _X Ga _Y In _1-XY
The N layer 11 is formed on a partly exposed surface. Further, an insulating layer 16 provided with a window so that the positive electrode pad 15 is exposed is formed on almost the entire surface of the semiconductor light emitting device. With the above structure, the light emitting portion 19 in plan view, n-type _{Al X Ga Y In 1-XY} N layer 11, Al _Z Ga _T I
n _{1 -ZT} N layer 12, p-type Al _U Ga _V In _{1 -UV} N layer 13,
This is a region corresponding to the laminated structure of the translucent positive electrode 14.

Next, a method for manufacturing a semiconductor light emitting device according to the present embodiment will be described. On the sapphire substrate 10, n-type _{Al X Ga Y In 1-XY} N layer (0 ≦ X ≦ 1,0 ≦
_{Y ≦ 1) 11, Al Z} Ga T In 1-ZT N layer (0 ≦ Z ≦
1,0 ≦ T ≦ 1) 12, p -type _{Al U Ga V In 1-UV} N layer (0 ≦ U ≦ 1,0 ≦ V ≦ 1) 13 sequentially stacked. Then, using photolithography and dry etching techniques, to the middle of the n-type _{Al X Ga Y In 1-XY} N layer 11 from the wafer surface, the peripheral portion of the element and, to remove the portion forming the negative electrode. The pn interface remains only in the portion on the mesa that has not been etched, and most of the pn interface corresponds to the light emitting portion 19. In the present embodiment, the size of the light emitting unit is approximately a square of about 300 μm square.

Next, the p-type Al _U Ga _V In _1-UV N layer 1
A translucent positive electrode 14 (with a thickness of about 10 nm) is formed on almost the entire surface of the substrate 3. As an electrode material, for example, Pd / Au
Was used. Further, a positive electrode pad 15 is formed in a predetermined region thereon. The thickness of the positive electrode pad 15 was formed as thick as about 2 μm so as to facilitate bonding. In the present embodiment, the size of the positive electrode pad 15 is about 130 μm square. PtSi / Au was used as the material of the positive electrode pad 15. In addition, n-type Al _X Ga _Y I
On the partially exposed surface of the n _{1 -XYN} layer 11, a negative electrode 20
To form Since the negative electrode 20 does not need to be bonded, it may be thin, and has a width of about 10 μm. W / Al was used as the material of the negative electrode 20.

Thereafter, an insulating layer 16 is formed on the surface of the wafer, and an appropriate position on the negative electrode 20 and the positive electrode pad 15 are formed by photolithography and etching.
An opening is formed above, and a wiring layer 48 is formed by a normal thin film forming technique and a selective etching technique. In this case, the insulating layer 16 also protects the light emitting unit. SiO ₂ was used as the material of the insulating layer, and Ti / A was used as the material of the wiring layer.
1 was used.

Although the insulating layer 16 can be formed using other insulating materials, particularly in the present embodiment, since the insulating layer covers the surface of the light emitting portion, the material of the insulating layer is the light emitting light. It must be transparent to the wavelength. Then,
The negative electrode pad 18 is formed so as to be connected to the wiring layer 48. The negative electrode pad 18 has a width of 80 for bonding.
A size of at least μm is required. In the present embodiment, the square is about 80 μm square. Al was used as the material of the negative electrode pad 18.

Thereafter, although not shown in FIG. 9, if necessary, the wiring layer 48 may be covered with an insulating film. The above steps are actually applied collectively to a large number of semiconductor elements on a wafer, and then each element (chip) is cut into a quadrilateral shape to complete the semiconductor light emitting element shown in FIG. .

In the electrode structure according to the present embodiment, since the wiring layer 48 is provided above the light emitting section 19, the size of the short side of the semiconductor light emitting element is smaller than that of the second embodiment having the same size light emitting section 19. I was able to make it smaller. In particular,
In the second embodiment, the size of the semiconductor light emitting element is set to about 350
μm × 480 μm, but in the present embodiment,
Since the width of the wiring layer 21 in FIG. 1 can be reduced by the width of about 10 μm and the margin required for alignment at the time of photolithography, a semiconductor light emitting device having a size of about 330 μm × 480 μm can be formed.

Further, in the present embodiment, the shape of the light emitting section 19 is substantially square. Also, in the present embodiment, the current injected into the active layer is made uniform by the same effect as in Embodiment 1, so that the unevenness of the light emission pattern can be reduced. With this electrode arrangement, a symmetrical light-emitting pattern as shown in FIG. 2 was realized. Also in this embodiment, since the electrode pads are arranged on one side of the chip, the same effects as those of the first embodiment can be obtained, and the same semiconductor light emitting device as that shown in FIGS. It became possible to obtain.

In the present embodiment, a substantially square shape is selected as the shape of the light emitting portion. However, the present invention is not limited to this, and may be a substantially rectangular shape, a substantially circular shape, or a substantially polygonal shape. The effect produced at that time is the same as the effect shown in the first to fourth embodiments.

<Embodiment 6> FIG. 10 shows a sixth embodiment of the present invention.
FIG. 3 is a diagram showing a configuration of a light emitting element according to the embodiment.
In FIG. 10A, reference numeral 10 denotes a sapphire substrate (about 35
0 denotes a light-emitting portion (approximately 300 μm square), 15 denotes a positive electrode pad (approximately 130 μm square), and 18 denotes a negative electrode pad (approximately 80 μm square). Yes, positive electrode pad 15
And the negative electrode pad 18 is disposed on the same side of the sapphire substrate 10 with respect to the light emitting portion 19, and the semiconductor light emitting element is disposed near the long side formed by the outer shape of the positive electrode pad 15 and the negative electrode pad 18. Are provided.

On the light emitting portion 19, a lead wire 49 is formed integrally with the positive electrode pad 15, and
The negative electrode 9 and the negative electrode 20 are formed along two sides of the outer periphery of the chip close to the outer periphery of the chip where the positive electrode pad 15 and the negative electrode pad 18 are formed. The negative electrode 2
0 is stretched to the n-type _{Al X Ga Y In 1-XY} N layer 11 on a predetermined region which is formed in the insulating film 16, and the negative electrode pad 18 is formed thereon. FIG. 10B is a schematic cross-sectional view taken along line GG ′ of FIG.

In FIG. 10B, the sapphire substrate 1
0, an n-type Al _X Ga _Y In _{1 -XYN} layer (0 ≦ X ≦ 1, 0) having a surface substantially parallel to the sapphire substrate 10 partially exposed.
≦ Y ≦ 1) 11 is formed, on _{its, Al Z Ga T In 1-} ZT N layer which is a light-emitting layer (0 ≦ Z ≦ 1,0 ≦ T ≦ 1)
12, p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦ 1,0
≦ V ≦ 1) 13 are stacked. Translucent positive electrode 14
It is formed on the substantially whole surface of the p-type _{Al U Ga V In 1-UV} N layer 13, the positive electrode pads 15 electrically connected to the lead wire 49 is formed in a predetermined region above it. The negative electrode 20 is formed on a partly exposed surface of the n-type AlXGaYIn1-X-YN layer 11. The light emitting section 19 shown in FIG. 10A is an n-type Al _X Ga _Y In _{1 -XYN} layer 1.
_{1, Al Z Ga T In 1} -ZT N layer 12, p-type Al _U Ga _V I
It comprises an n _{1 -UV} N layer 13 and a translucent positive electrode 14.

Next, a method for manufacturing the semiconductor light emitting device according to the present embodiment will be described. On the sapphire substrate 10, n-type _{Al X Ga Y In 1-XY} N layer (0 ≦ X ≦ 1,0 ≦
_{Y ≦ 1) 11, Al Z} Ga T In 1-ZT N layer (0 ≦ Z ≦
1,0 ≦ T ≦ 1) 12, p -type _{Al U Ga V In 1-UV} N layer (0 ≦ U ≦ 1,0 ≦ V ≦ 1) 13 sequentially stacked. Then, using photolithography and dry etching techniques, to the middle of the n-type _{Al X Ga Y In 1-XY} N layer 11 from the wafer surface, the peripheral portion of the element and, to remove the portion forming the negative electrode. The pn interface remains only in the portion on the mesa that has not been etched, and most of the pn interface corresponds to the light emitting portion 19. In the present embodiment, the size of the light emitting unit is approximately a square of about 300 μm square.

Next, the p-type Al _U Ga _V In _1-UV N layer 1
A translucent positive electrode 14 (about 12 nm in film thickness) is formed on almost the entire surface of the substrate 3. As an electrode material, for example, Ni / Pt
Was used. After that, the positive electrode pad 15 and the lead wire 49 are integrally formed. The thickness of the positive electrode pad 15 is
For example, it is formed as thick as 1 μm to facilitate bonding. The size of the positive electrode pad 15 is about 130 μm square in the present embodiment. In addition, lead wire 49
Since it is not necessary to perform bonding, a width of about 2 to 10 μm is appropriate. The material of the positive electrode pad 15 and the lead wire 49 was Cr / Au.

The n-type Al _X Ga _Y In _1-XY N layer 11
After forming the insulating film 16 thereon, the negative electrode 20 is formed, and the negative electrode pad 18 is formed in a predetermined region thereon. Since the negative electrode 20 does not require bonding, an electrode width of about 2 to 20 μm is appropriate. In this embodiment, the width is about 10 μm. Conversely, the negative electrode pad 18
For bonding, a width of 80 μm or more is required. In the present embodiment, the square is about 80 μm square.
SiO ₂ was used as the material of the insulating layer, Ti / Al was used as the material of the negative electrode 20, and Al was used as the material of the negative electrode pad 18.

The above steps are actually applied collectively to a large number of semiconductor elements on a wafer, and then each element (chip) is cut out into a quadrilateral shape, and the semiconductor light emitting element shown in FIG. Is completed.

In the electrode structure according to the present embodiment, the negative electrode 20 extends along the outer periphery of the chip adjacent to the outer periphery of the chip where the positive electrode pad and the non-electrode pad are formed.
Since it is provided to extend from the negative electrode pad 18, FIG.
The semiconductor light emitting device has a structure in which the negative electrode 20 is formed in the region where the wiring layer 21 is formed in the second embodiment shown in FIG. Compared with the second embodiment, the size of the long side of the positive and negative electrode pad semiconductor light emitting devices could be reduced.

Specifically, in the second embodiment, the size of the semiconductor light emitting device is set to about 350 μm × 480 μm.
In the present embodiment, the negative electrode 2 shown in FIG.
Since the width of 0 can be reduced by about 10 to 20 μm and the margin required for alignment at the time of photolithography, a semiconductor light emitting device having a size of about 350 μm × 450 μm can be formed.

In the electrode structure according to the present embodiment, the negative electrode 2 is connected to the lead wire 49 joined to the positive electrode pad.
Since the distance to 0 is uniform, it has become possible to configure a semiconductor light emitting element even with a material that tends to cause uneven injection current density. With this electrode structure, a symmetrical light-emitting pattern as shown in FIG. 2 was realized. Further, also in this embodiment, since the electrode pads are arranged on one side of the chip, the same effects as those of the first embodiment can be obtained, and the same semiconductor light emitting device as that shown in FIGS. It became possible to obtain.

In each of the above embodiments, the shape of the light emitting portion has been described based on a specific shape.
The present invention is not limited to this, and may have at least three or more rotationally symmetric shapes such as a substantially square, a substantially rectangular, a substantially polygonal, a substantially circular, a substantially semicircular, and a substantially elliptical shape, respectively. Good. Although a specific material has been described as the insulating layer 16, SiN, Al ₂ O ₃ , TiO ₂ ,
It is also possible to use another insulating material such as an oxide / nitride / fluoride insulator such as SiON or MgF or an organic insulator such as polyimide.

[0081]

According to the semiconductor light emitting device of the present invention, it is possible to pull out two lead wires for allowing a current to flow from the outside to the semiconductor light emitting element in one direction, thereby reducing the size of the semiconductor light emitting element. Was completed. Further, since the light emitting portion has a simple shape, a symmetrical light emitting pattern (radiation characteristic) can be obtained when the light emitting portion is assembled in a semiconductor manufacturing apparatus. Further, according to the present invention, the above configuration makes it possible to uniformly supply a current to the pn interface under the second electrode without complicating the bonding process and unnecessarily increasing the element size. It contributes to the improvement of the brightness and the luminous efficiency of the light emitting element of the type having both electrodes.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams showing a configuration of a light emitting element according to Embodiment 1 of the present invention, wherein FIG. 1A is a plan view, FIG.
(C) is a BB ′ cross-sectional view.

FIG. 2 is a schematic diagram showing an LED lamp in which the light emitting element of Embodiment 1 of the present invention is resin-molded with a lens.

FIGS. 3A and 3B are diagrams illustrating a surface-mounted semiconductor light emitting device assembled using the light emitting elements according to the first embodiment of the present invention; FIG.
Is a plan view, and (b) is a CC ′ cross-sectional view.

FIG. 4 is a diagram showing an LED array assembled by using a plurality of light emitting elements according to Embodiment 1 of the present invention.

FIGS. 5A and 5B are diagrams showing a surface-mounted semiconductor light emitting device assembled using the light emitting element according to the first embodiment of the present invention, wherein FIG.
FIG. 2 is a perspective view showing an example of a mold case, FIG. 2B is a top view of a case where a light emitting element is mounted, and FIG.
It is D 'sectional drawing.

FIG. 6 is a diagram illustrating a configuration of a light emitting element according to Embodiment 2 of the present invention.

FIG. 7 is a diagram illustrating a configuration of a light emitting element according to Embodiment 3 of the present invention.

FIG. 8 is a diagram illustrating a configuration of a light emitting element according to Embodiment 4 of the present invention.

9A and 9B are diagrams illustrating a configuration of a light emitting element according to Embodiment 5 of the present invention, wherein FIG. 9A is a plan view, FIG.
(C) is a sectional view taken along line FF '.

FIGS. 10A and 10B are diagrams illustrating a configuration of a light emitting element according to Embodiment 6 of the present invention, wherein FIG. 10A is a plan view and FIG.

FIG. 11 is a diagram showing a configuration of a conventional semiconductor light emitting device.
(A) is a plan view, and (b) is a cross-sectional view along HH '.

FIG. 12 is a schematic view showing an LED lamp in which a light emitting element of a conventional example is resin-molded with a lens.

13A and 13B are diagrams showing a surface-mounted semiconductor light emitting device assembled using light emitting elements of a conventional example, wherein FIG.
(B) is a modification of (a), (c) is a sectional view of (a).

14A and 14B are diagrams showing an LED array assembled by using a plurality of light emitting elements of a conventional example, where FIG. 14A is an example and FIG. 14B is a modified example.

[Explanation of symbols]

10 Sapphire substrate 11 n-type Al _X Ga _Y In _{1 -XY} N layer (0 ≦ X ≦ 1,0
_{≦ Y ≦ 1) 12 Al Z} Ga T In 1-ZT N layer (0 ≦ Z ≦ 1,0 ≦ T
≦ 1) 13 p-type Al _U Ga _V In _1-UV N layer (0 ≦ U ≦ 1, 0
≦ V ≦ 1) 14 Translucent positive electrode 15 Positive electrode bonding pad (positive electrode pad) 16 Insulating layer 18 Negative electrode bonding pad (negative electrode pad) 19 Light emitting section 20 Negative electrode 21 Wiring layer 22 Vertical axis direction 23 Right-side light-emitting pattern 24 Left-side light-emitting pattern 25, 26 Electrode terminal 27, 28 Gold wire 29 Mold case 30 Bottom of mold case 29 Transparent mold resin 32 Mold case 33 of surface-mounted semiconductor light-emitting device Electrodes Terminal 35, 36 Common line 37 Mold case 38, 39 Wiring 40 Groove 41 Bottom surface 42 Wall surface 43 Slope 44 Anisotropic conductive resin adhesive 45 Light emitting unit 46 Light emitting unit 47 Light emitting unit 48 Wiring layer 49 Lead wire

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Taiji Morimoto 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (reference) 5F041 CA12 CA40 CA92 CA93 DA07

Claims (7)

[Claims] A first conductivity type semiconductor layer on a substrate, a second conductivity type semiconductor layer formed on a part of the first conductivity type semiconductor layer,
A first electrode on the first conductive type semiconductor layer, a second electrode on the second conductive type semiconductor layer, a first bonding pad electrically connected to the first electrode, and electrically connected to the second electrode Second
In a semiconductor light emitting device having a bonding pad and a second electrode forming a light emitting portion, the first bonding pad and the second bonding pad are formed on the same side with respect to the light emitting portion, and A semiconductor light emitting device, wherein an insulating film is formed immediately below, and the first electrode and the second bonding pad are provided along different sides of the chip outer shape. 2. The semiconductor light emitting device according to claim 1, wherein the first electrode is provided on a side facing the second bonding pad with a light emitting unit interposed therebetween. 3. The method according to claim 1, wherein the first electrode is electrically connected to the first bonding pad via a wiring layer, and an insulating layer is formed immediately below the wiring layer. The semiconductor light-emitting device according to claim 1. 4. A lead wire having a lower sheet resistance than the second electrode is formed in contact with the second electrode and the second bonding pad, and the lead wire faces the first electrode with a light emitting portion interposed therebetween. The semiconductor light emitting device according to claim 2, wherein the semiconductor light emitting device is formed on a side. 5. The semiconductor device according to claim 1, wherein the first electrode and the lead wire are formed on two sides adjacent to an outer periphery of the chip on which the first bonding pad and the second bonding pad are formed. The semiconductor light emitting device according to claim 4. 6. The light emitting section has a planar shape of at least 3
6. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device has a shape that is rotationally symmetric at least twice. 7. The semiconductor light-emitting device according to claim 1, wherein the semiconductor light-emitting device is fixed to a case, and the first bonding pad and the second bonding pad of the light-emitting device.
Each wire is connected to the bonding pad, and
The semiconductor light emitting device according to claim 1, wherein each of the wires is led out to a side opposite to a light emitting portion of the light emitting element and is connected to a terminal provided in the case.