JP2000020032A - Method for driving liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve picture quality by enabling dummy interlaced scanning drive (interlaced driving) easily, in a simple matrix liquid crystal display including one using a TCP(tape carrier package) liquid crystal driver or of a COG(chip on glass) structure. SOLUTION: In driving a simple matrix liquid crystal display in which each output line of a liquid crystal driver for scanning line is successively continuously connected to each electrode on the scanning line side of the liquid crystal display panel; a short-spaced pulse signal, which is capable of operating the internal shift register of the liquid crystal driver, is impressed to a scan shift clock signal inputting the liquid crystal driver for scanning line. As a result, dummy interlaced scanning driving is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a simple matrix type liquid crystal display.

[0002]

2. Description of the Related Art FIG. 3 is a diagram showing a configuration of a simple matrix type liquid crystal panel (display panel). In the figure, reference numeral 1 denotes a column electrode side substrate of a liquid crystal panel, and a liquid crystal layer is provided between the column electrode side substrate 1 and the row electrode side substrate 2,
In addition, X1, X2,
.. Xm column electrodes are formed, and Y1, Y2,... Yn row electrodes are formed in the scanning line side electrode direction.

FIG. 4 shows an arrangement position of XY electrodes of the simple matrix type liquid crystal panel. In a conventional simple matrix type liquid crystal display, the above liquid crystal panel is driven using a QFP type liquid crystal driver.
In this liquid crystal driver, the wiring has a structure of taking out both sides, and the liquid crystal display is interlaced.
Driving is easy and can be realized by wiring on the printed circuit board 1 on which the liquid crystal driver is mounted.

FIG. 5 shows an example of a conventional wiring method for performing the above-described interlaced scanning drive. In the figure, 5 is the above Q
Input unit of FP type scanning line (row) liquid crystal driver,
Reference numeral 6 denotes a connector for connecting a liquid crystal. Outputs out1, n / 2 + 1,..., Outn of the liquid crystal driver (chip) are transmitted to respective terminals of the connector 6. Table 1 shows the connection (input / output) relationship between the liquid crystal driver output and the connector section. The printed circuit board 1 and the liquid crystal panel 2 are connected using an FPC or the like.

[0005]

[Table 1]

FIG. 6 is a block diagram showing a configuration of a scanning line (row) liquid crystal driver circuit using the above liquid crystal driver chip. This driver circuit includes a shift register SR
.., SRn, a level shifter 7 and a liquid crystal drive circuit 8, and start operation by a scan start signal and a scan shift clock signal. The shift registers SR1, SR2,... SRn are sequentially shifted for each scan shift clock signal, and their outputs are output as liquid crystal driving signals via a level shifter 7 and a liquid crystal driving circuit 8.

[0007] Generally, the interlaced drive has the advantage that flickering does not stand out when operated with the same clock in a CRT, and the same signal as a TV signal in a liquid crystal display device. It is used because it can be driven without using a memory or the like.

FIG. 7 shows a TCP (Tape Carr).
FIG. 3 is a diagram showing the configuration of a general liquid crystal display having a structure of an “interpackage” type, in which 3 is a liquid crystal driver for data lines (columns), 4 is a liquid crystal driver for scanning lines (rows), and 9 is an input unit. Each connector is shown.

[0009] TCP uses TAB (Tape Automated Bo) using a tape wired in a copper foil pattern.
nding) technology.
The liquid crystal drivers 3 and 4 of this type are used by directly connecting to the liquid crystal panel 2. In this case, since the wiring of the liquid crystal panel has a structure of one side extraction, it is difficult to change the connection by alternate wiring in the both side extraction as performed on the above-mentioned printed circuit board on the TCP tape. In addition, interlaced scanning drive is impossible. FIG. 8 is an enlarged view showing details of the portion A in FIG. The scanning line (row) liquid crystal driver circuit and the liquid crystal panel 2 are connected using an anisotropic conductive film or the like. FIG. 9 shows an operation at the time of line-sequential scanning in a liquid crystal display having such a wiring structure.

The period of the scan line (row) scan start signal is one screen display period, and the period of the scan line (row) scan shift clock signal is Y1 line and Y line, respectively.
The display period of the two lines,. The display data latch signal for the data line (column) is synchronized with the scan shift clock signal for the scanning line (row), during which the display data capture signal for the data line (column) is input.

[0011]

Since the conventional simple matrix type liquid crystal display is constructed as described above, it is difficult to change it by wiring, and it becomes impossible to perform interlaced scanning drive, thereby improving the image quality. There was a problem that it was not possible.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and a method of driving a liquid crystal display device capable of performing pseudo interlaced scan driving and improving image quality is provided. It is intended to provide.

[0013]

According to a driving method of a liquid crystal display according to the present invention, each output line of a liquid crystal driver for a scanning line is sequentially and continuously connected to each electrode on a scanning line side of a liquid crystal display panel. In a driving method of a liquid crystal display device of a simple matrix type, by adding a pulse signal of a short interval capable of operating an internal shift register of the liquid crystal driver to a scan shift clock signal input to the liquid crystal driver for the scanning line, This is a pseudo interlaced scanning drive.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display according to the present invention has a simple matrix type in which each output line of a liquid crystal driver for a scanning line (row) is sequentially and continuously connected to each electrode of the scanning line of a liquid crystal display panel. The configuration of the electrodes and the configuration of the liquid crystal driver and the like are the same as those in FIGS.

In this embodiment, when driving the above-described simple matrix type liquid crystal display, a scan shift clock signal (scan shift clock signal) input to a liquid crystal driver for a scanning line is internally supplied to the liquid crystal driver. A pulse waveform signal with a short interval at which the shift register can operate is added, thereby enabling pseudo interlaced scanning drive (interlace drive).

That is, the structure shown in FIGS. 7 and 8 cannot perform perfect interlaced scanning drive. However, by operating according to the above-described driving method, it becomes possible to perform pseudo interlaced scanning drive.

FIG. 1 is a time chart showing the driving operation in this embodiment. The odd frame display period and the even frame display period are alternately switched in the cycle of the scan line (row) scan start signal, thereby forming one screen display period. As shown in the figure, the above-described pulse signal at a short interval is added to the scan line clock signal for the scanning line (row), and the Y1 line display period (out1 output period) in the odd frame display period at the interval. A Y3 line display period (out3 output period), a Y5 line display period (out5 output period),... Are formed. In the even frame display period, a Y2 line display period (out2 output period) and a Y4 line display period (out4 output period) are formed. , Y6
A line display period (out6 output period) is formed.

At this time, in the odd frame display period, a short even line display period between the scan shift clock signal and the pulse signal added thereto exists between each odd line display period. In the period, there is a similar short odd line display period between each even line display period.

A display data latch signal for a data line (column) is output in synchronization with a pulse signal added to the scan shift clock signal, and a display data capture signal for a data line (column) is input therebetween.

The scan start signal for the scanning line (row) and the scan shift clock signal for the scanning line (row) shown in the lower part of FIG. 1 are obtained by temporally extending the same signal in the upper part of FIG. is there.

Here, in order to perform the above-described interlaced scanning drive, it is necessary to skip every other stage of the shift register in the liquid crystal driver for the scanning line (row). It is impossible because it is connected serially. Therefore, in this embodiment, instead of skipping the internal shift register, a signal having a waveform to which a scan shift clock signal of a minimum time to which the internal shift register can respond is input, thereby driving apparently skipping one line. And a pseudo interlaced scanning drive is performed.

At this time, one line display period t of the liquid crystal panel
For Line, the minimum response time ts of the internal shift register does not affect the display because tLine≫ts.

It should be noted that the present invention is not limited to the one using the above-mentioned TCP type liquid crystal driver, but also has a COG (Chip On Glass) structure as shown in FIG.
That is, the present invention is also applicable to a liquid crystal display having a structure in which a liquid crystal driver is connected to a glass plate of a liquid crystal panel by bonding or the like.

Further, in the present invention, both interlace driving and non-interlace driving can be performed only by changing the input method of the external signal in the same module. For example, the VGA of the personal computer is interlaced drive and the TV (television) is interlaced drive, and these can be operated by the same module without using a memory or the like and real-time signals.

[0025]

As described above, according to the present invention, in a simple matrix type liquid crystal display, even a device using a TCP type liquid crystal driver can easily perform pseudo interlaced scan drive (interlace drive). This has the effect that the image quality can be improved.

Further, there is an effect that both the interlace drive and the non-interlace drive can be performed by the same module.

[Brief description of the drawings]

FIG. 1 is a time chart showing the operation of an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a liquid crystal display having a COG structure.

FIG. 3 is a diagram showing a configuration of a simple matrix type liquid crystal panel.

FIG. 4 is an explanatory diagram showing electrode arrangement of a simple matrix type liquid crystal panel.

FIG. 5 is an explanatory diagram showing a conventional wiring method for interlaced scanning drive.

FIG. 6 is a block diagram showing a configuration of a scanning line (row) liquid crystal driver circuit.

FIG. 7 is a diagram showing a configuration of a general liquid crystal display.

FIG. 8 is an enlarged view showing details of a part A in FIG. 7;

FIG. 9 is a time chart showing an operation at the time of line sequential scanning in the liquid crystal display of FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate on the side of column electrode (of liquid crystal panel) 2 Substrate on the side of row electrode (of liquid crystal panel) 3 LCD driver for data line (column) 4 LCD driver for scanning line (row) 5 Input part 6 Connector part 7 Level shifter 8 Liquid crystal drive circuit SR1, SR2, ... SRn shift register

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hirohisa Enari 400 Soya, Hadano-shi, Kanagawa Stanley Electric Co., Ltd.F-term in Hadano Manufacturing Co., Ltd. 2H093 NA07 NA45 NC09 NC22 ND01 ND49 ND50 5C006 AC29 AC30 BB12 BC03 BC20 BF03 BF46 FA04 5G435 AA01 BB12 CC09 EE34 EE40

Claims (1)

[Claims] 1. A driving method of a simple matrix type liquid crystal display device wherein each output line of a scanning line liquid crystal driver is sequentially and successively connected to each scanning line side electrode of a liquid crystal display panel. A pseudo-interlaced scan drive by adding a pulse signal of a short interval operable by an internal shift register of the liquid crystal driver to a scan shift clock signal input to the liquid crystal driver of the present invention. .