CN102368125B - Liquid crystal display and driving method of liquid crystal display panel of same - Google Patents

Liquid crystal display and driving method of liquid crystal display panel of same Download PDF

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Publication number
CN102368125B
CN102368125B CN201110330080.3A CN201110330080A CN102368125B CN 102368125 B CN102368125 B CN 102368125B CN 201110330080 A CN201110330080 A CN 201110330080A CN 102368125 B CN102368125 B CN 102368125B
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pixels
row pixel
row
pixel
display panels
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CN102368125A (en
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林政亮
陈耿铭
洪集茂
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AU Optronics Kunshan Co Ltd
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AU Optronics Corp
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Abstract

The invention discloses a liquid crystal display and a driving method of a liquid crystal display panel of the same. The liquid crystal display is characterized in that a pixel array structure of the liquid crystal display is a half source driving structure; a grid drive of the pixel array structure of the liquid crystal display provided by the invention directly configured on the liquid crystal display panel can drive the liquid crystal display panel by the aid of ingeniously arranging the coupling relation among pixels and data lines, so that the cost of the liquid crystal display can be reduced, and the way for a time order controller controlling the grid drive and a source electrode drive can be reduced.

Description

The driving method of liquid crystal display and display panels thereof
This case is application number: 200910137642.5, and denomination of invention: the driving method of liquid crystal display and display panels thereof, the divisional application of the patented claim of the applying date: 2009.4.27.
Technical field
The invention relates to a kind of plane display technique, and relate to especially the driving method of a kind of liquid crystal display and display panels thereof.
Background technology
In the middle of the pel array of display panels (pixel array) structure now, there is a class to be called as half source drive (half source driving, is designated hereinafter simply as HSD) framework.HSD framework is by the number of sweep trace is doubled and the number of data line can be reduced by half, and because the number of data line reduces by half, so the making price of source electrode driver (source driver) also can relatively reduce.
Fig. 1 illustrates the part schematic diagram into a kind of display panels 100 of traditional HSD framework.Fig. 2 illustrates as the display panels 100 of Fig. 1 adopts the part of the panel driving technology of two-wire double-point inversion (two line two dot inversion) and drives sequential chart.Please merge with reference to Fig. 1 and Fig. 2, display panels 100 has multiple pixel Pix that arrange with matrix-style, the pixel Pix that is wherein marked with the symbol of R1, G1, B1, R2, G2, B2 is the viewing area AA that is positioned at display panels 100, and the pixel Pix of the symbol of the unmarked R1 of having, G1, B1, R2, G2, B2 is dummy pixel (dummy pixel), and position is in the periphery of viewing area AA.
In addition, label S1~S4 is data line; Label Sdum is dummy data line; Label G1~G9 is sweep trace; And label Gdum is illusory sweep trace.Multiple control signal LD, POL, STVD, OE1~OE3, clock signal CLK that provided by time schedule controller (timing controller) are provided the driving sequential chart that Fig. 2 discloses, and the demonstration data SD that provides of source electrode driver (source driver).Wherein, control signal LD and POL are in order to control source electrode driver, and control signal STVD and OE1~OE3 are in order to control gate driver (gate driver).
Can know and find out from Fig. 2, time schedule controller must provide manner of execution comparatively complicated control signal STVD and OE1~OE3, be produced on Y side control panel (Y-Board to cause, do not illustrate) on gate drivers distinguished output scanning signal SS to sweep trace G1~G9, and provide according to this more corresponding control signal LD and POL, be produced on X side control panel (X-Board to cause, do not illustrate) on source electrode driver be able to the dotted arrow of Fig. 1 1. 2. 3. order 4. of mark of passing through, and corresponding demonstration data SD is write to each pixel Pix.
Based on above-mentioned known be, although the display panels 100 that Fig. 1 discloses can allow the number of data line reduce by half, thereby reduce the making price of source electrode driver, but the driving sequential chart disclosing from Fig. 2 can be found, it is quite complicated that the mode of time sequence controller grid driver and source electrode driver seems, and the line buffer of required use while must at least 3 of additional configuration in it being different from driven panel (its because of source electrode driver pass through and mark 1. 2. 3. the cause that order has 4. contained 3 row pixels with the dotted arrow of Fig. 1), use the temporary required demonstration data SD of every 3 row pixels respectively.In addition, for will be in response to such type of drive, must on Y side control panel, make the comparatively complicated gate drivers of circuit framework, thereby the making price of gate drivers entirety can be drawn high significantly.
Summary of the invention
In view of this, the present invention proposes a kind of liquid crystal display, and the picture element array structure of its display panels is HSD framework, and this display panels can be directly configured in the gate driver drive display panels on the substrate of display panels.
The present invention proposes a kind of liquid crystal display, comprising: a display panels, at least comprises: 8 sweep traces; Article 2, data line; And multiple pixels, arrange with matrix-style; Wherein, the 1st article of sweep trace couples the odd number of pixels of the 1st row pixel; Article 2, sweep trace couples the even number pixel of the 1st row pixel; Article 3, sweep trace couples the odd number of pixels of the 2nd row pixel; Article 4, sweep trace couples the even number pixel of the 2nd row pixel; Article 5, sweep trace couples the even number pixel of the 3rd row pixel; Article 6, sweep trace couples the odd number of pixels of the 3rd row pixel; Article 7, sweep trace couples the even number pixel of the 4th row pixel; Article 8, sweep trace couples the odd number of pixels of the 4th row pixel; Odd number of pixels in each row pixel is connected with the even number pixel that sequentially adds; Article 1, data line couples the 1st, 2 pixels of the 2nd row pixel and the 3rd, 4 pixels of the 3rd row pixel; And the 2nd article of data line couples the 1st, 2 pixels of the 4th row pixel and the 3rd, 4 pixels of the 5th row pixel.
The present invention separately provides a kind of driving method of display panels, wherein display panels has multiple pixels of arranging with matrix-style, and described driving method comprises: the first period in during a picture of liquid crystal display, the first sweep signal and the second sweep signal to the (4i+1) row pixel (i is more than or equal to 0 integer) are provided simultaneously, use all pixels of opening in (4i+1) row pixel, and provide accordingly multiple first to show that data are to write to respectively all pixels in (4i+1) row pixel; And second phase in during described picture, the second sweep signal to the (4i+1) row pixel is provided, use all dual pixels of opening in (4i+1) row pixel, and provide accordingly multiple second to show that data are to write to respectively all dual pixels in (4i+1) row pixel.
The present invention separately provides a kind of driving method of display panels, wherein display panels has multiple pixels of arranging with matrix-style, and described driving method comprises: the first period in during a picture of liquid crystal display, the first sweep signal and the second sweep signal to the i row pixel (i is positive integer) are provided simultaneously, use all pixels of opening in i row pixel, and provide accordingly multiple first to show that data are to write to respectively all pixels in i row pixel; And second phase in during described picture, the second sweep signal and the 3rd sweep signal to the i row and (i+1) row pixel are provided respectively, use the odd or dual pixel in the institute of opening in i row pixel odd or dual pixel and (i+1) row pixel, and provide accordingly multiple the second demonstration data to write to respectively the odd or dual pixel in i row pixel.
Based on above-mentioned, the picture element array structure of the display panels of liquid crystal display provided by the present invention is HSD framework, and by the relation that couples between the each pixel of ingenious arrangement and each data line, thereby make the display panels of liquid crystal display provided by the present invention be able to be directly configured in the gate driver drive display panels on the substrate of display panels.Thus, not only can reduce the making price of gate drivers entirety, and more can reduce the mode of time sequence controller grid driver and source electrode driver.
Will be appreciated that, above-mentioned general description and following embodiment are only exemplary and illustrative, and it can not limit the scope that institute of the present invention wish is advocated.
Brief description of the drawings
Fig. 1 illustrates the part schematic diagram into a kind of display panels 100 of traditional HSD framework;
Fig. 2 illustrates as the display panels 100 of Fig. 1 adopts the part of the panel driving technology of two-wire double-point inversion (two line two dot inversion) and drives sequential chart;
Fig. 3 illustrates the system block diagrams into the liquid crystal display 300 of the present invention's one example embodiment;
Fig. 4 illustrates as the display panels 301 of the present invention's one example embodiment adopts the part of the panel driving technology of two-wire double-point inversion and drives sequential chart;
Fig. 5 illustrates the driving method process flow diagram into the display panels of the present invention's one example embodiment.
Wherein Reference numeral is:
100: display panels
300: liquid crystal display
301: display panels
303: left gate drivers
305: right gate drivers
307: source electrode driver
309: time schedule controller
311: backlight module
Pix: pixel
AA: viewing area
S1~S4: data line
Sdum: dummy data line
G1~G9: sweep trace
Gdum: illusory sweep trace
LD, POL, STVD, OE1~OE3, VSTL, CKL, XCKL, VSTR, CKR, XCKR: control signal
CLK: clock signal
SS: sweep signal
SD: show data
FP: during picture
1. 2. 3. 4.: write the order that shows data
T1~T8: during in during picture
S501, S503: the each step of driving method process flow diagram of the display panels of the present invention's one example embodiment
Embodiment
With detailed reference to example embodiment of the present invention, the example of described example embodiment is described in the accompanying drawings.In addition, all may part, in graphic and embodiment, use the identical or similar portions of the element/member/symbology of same numeral.
Fig. 3 illustrates the system block diagrams into the liquid crystal display 300 of the present invention's one example embodiment.Please refer to Fig. 3, liquid crystal display 300 comprises display panels 301, left gate drivers 303, right gate drivers 305, source electrode driver 307, time schedule controller 309, and in order to the backlight module 311 of the required backlight of display panels 301 to be provided.Wherein, in display panels 301, there is multi-strip scanning line G1~G8 and (in Fig. 3, show 8 sweep traces, but not as restriction), 1 dummy data line Sdum, many data line S1~S4 (show 1 dummy data line Sdum, 4 data lines in Fig. 3, but not as restriction), and multiplely arrange the pixel Pix that forms (not taking the number of pixels that illustrated in Fig. 3 as restriction) with matrix-style.
In this example embodiment, (4j+1) that i article of sweep trace couples i row pixel individual with (4j+3) individual pixel, wherein i is odd number positive integer, and j is more than or equal to 0 positive integer.(i+1) article sweep trace couple (4j+2) of i row pixel individual with (4j+4) individual pixel.R article of data line couple (4k+1) of (2r+1) row and (2r+2) row pixel individual with (4k+3) (4k+2) individual pixel and (2r+3) row and (2r+4) row pixel individual with (4k+4) pixel, wherein r, k are more than or equal to 0 positive integer (the 0th article data line is the dummy data line Sdum in Fig. 3).
It is worth mentioning that at this, the number of all sweep traces in display panels 301 is even number, and the number of all data lines in display panels 301 is odd number.Dummy data line Sdum couple (4k+3) of the 1st row and the 2nd row pixel individual with (4k+4) pixel, and multiple in display panels 301 arrange the 1st row in the pixel forming and the 2nd row pixel and are not positioned at the viewing area AA of display panels 301 with matrix-style, that is to say, these pixels can be regarded as dummy pixel (dummy pixel), can be used for balanced load or consider arrangement on pel array repeatability and arrange.
The pixel array architecture of the display panels 301 disclosing from Fig. 3 is half source drive (HSD) framework, so the number of sweep trace can double, and the number of data line can reduce by half.Also also because of so, because the number of data line reduces by half, so the making price of source electrode driver 307 can relatively reduce.
In addition, because the number of sweep trace can double, so if the mode that adopts tradition to make gate drivers on Y side control panel can increase cost of manufacture.In view of this, this example embodiment is for example directly formulated in left gate drivers 303, on the substrate (glass substrate) of display panels 301 with right gate drivers 305, and use the mode of bilateral driving sweep trace, effectively to reduce the making price of gate drivers entirety.
Clearer, left gate drivers 303 is directly configured in the side (for example left side) on the glass substrate of display panels 301, and couple the odd number bar sweep trace of display panels 301, provide the first sweep signal to all odd number bar sweep traces in all sweep traces in display panels 301 in order to sequence.Wherein, the running of left gate drivers 303 is controlled by control signal VSTL, CKL, the XCKL that time schedule controller 309 provides.
In addition, right gate drivers 305 is directly configured in the opposite side (for example right side) on the glass substrate of display panels 301, and couple the even number bar sweep trace of display panels 301, provide the second sweep signal to all even number bar sweep traces in all sweep traces in display panels 301 in order to sequence.Wherein, the running of right gate drivers 305 is controlled by control signal VSTR, CKR, the XCKR that time schedule controller 309 provides.Certainly, right gate drivers 305 can be also on the glass substrate being directly configured in left gate drivers 303 the same sides.
Benly here be, the method that left gate drivers 303 and right gate drivers 305 are directly configured on the glass substrate of display panels 301 is preferably in the time making the element of pixel Pix of display panels 301, uses for example film (thin film), photoetching (photo), etching (etching) ... etc. technology be produced on glass substrate simultaneously.
Source electrode driver 307 couples display panels 301, and is at least controlled by control signal LD and POL that time schedule controller 309 provides, to provide corresponding demonstration data SD to each data line S1~S4.Thus, the every one-row pixels in display panels 301 will see through respectively corresponding data line S1~S4 to receive corresponding demonstration data SD.
For the operation principles of liquid crystal display 300 will be more clearly described, Fig. 4 illustrates as the display panels 301 of the present invention's one example embodiment adopts the part of the panel driving technology of two-wire double-point inversion (two line two dot inversion) and drives sequential chart.Please merge with reference to Fig. 3 and Fig. 4, the drive waveforms figure disclosing from Fig. 4 should find out easily, left gate drivers 303 is controlled by respectively with right gate drivers 305 control signal VSTL, CKL, XCKL and VSTR, CKR, the XCKR that time schedule controller 309 provides, and provides sweep signal SS and intersect to coordinate to the sweep trace G1~G8 of display panels 301 interior correspondences with sequence.
In addition, source electrode driver 307 is at least controlled by control signal LD and the POL that time schedule controller 309 provides, to provide corresponding demonstration data SD to each data line S1~S4.Thus, source electrode driver 307 will be with the dotted arrow of Fig. 3 1. 2. 3. order 4. of mark of passing through, and corresponding demonstration data SD is write to each pixel Pix.
Clearer, (frame period during a picture of liquid crystal display 300, FP) the first period T1 in, time schedule controller 309 can be controlled 303 and 305 while of left and right gate drivers output scanning signal SS to sweep trace G1 and G2 (i.e. the 1st row pixel), the active member of using in all pixel Pix that open in the 1st row pixel (is for example thin film transistor (TFT), TFT), and controlling source electrode driver 307 provides first of multiple correspondences to show data SD, to write to respectively all pixel Pix in the 1st row pixel.
Then, second phase T2 during same picture in FP, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 difference output scanning signal SS to sweep trace G2 and G3 (i.e. the 1st and the 2nd row pixel), use the active member (TFT) in the odd pixel Pix of institute in active member (TFT) in all dual pixel Pix that open in the 1st row pixel and the 2nd row pixel, and control source electrode driver 307 and provide the second demonstration data SD of multiple correspondences to write to respectively all dual pixel Pix in the 1st row pixel.
But, due to when the second phase T2, right gate drivers 305 can't output scanning signal SS to sweep trace G4 (i.e. the 2nd row pixel), even if so the odd pixel Pix in the 2nd row pixel has been unlocked in second phase T2, multiple the second demonstration data SD that source electrode driver 307 now provided can not be written into all pixel Pix in the 2nd row pixel yet.
Similarly, second phase T3 during same picture in FP, time schedule controller 309 can be controlled 303 and 305 while of left and right gate drivers output scanning signal SS to sweep trace G3 and G4 (i.e. the 2nd row pixel), use the active member (TFT) in all pixel Pix that open in the 2nd row pixel, and control source electrode driver 307 provides the 3rd of multiple correspondences to show that data SD is to write to respectively all pixel Pix in the 2nd row pixel.
Then, T4 between the fourth phase during same picture in FP, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 difference output scanning signal SS to sweep trace G4 and G5 (i.e. the 2nd row and the 3rd row pixel), use the active member (TFT) in all dual pixel Pix that open in the 2nd row and the 3rd row pixel, and control source electrode driver 307 provides the 4th of multiple correspondences to show that data SD is to write to respectively all dual pixel Pix in the 2nd row pixel.
But, during due to T4 between the fourth phase, right gate drivers 305 can't output scanning signal SS to sweep trace G6 (i.e. the 3rd row pixel), even if so all dual pixel Pix T4 between the fourth phase in the 3rd row pixel is unlocked, multiple the 4th demonstration data SD that source electrode driver 307 now provided can not be written into all pixel Pix in the 3rd row pixel yet.
Similarly, T5 between the fifth phase during same picture in FP, time schedule controller 309 can be controlled 303 and 305 while of left and right gate drivers output scanning signal SS to sweep trace G5 and G6 (i.e. the 3rd row pixel), use the active member (TFT) in all pixel Pix that open in the 3rd row pixel, and control source electrode driver 307 provides the 5th of multiple correspondences to show that data SD is to write to respectively all pixel Pix in the 3rd row pixel.
Then, T6 during during same picture in FP the 6th, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 difference output scanning signal SS to sweep trace G6 and G7 (i.e. the 3rd row and the 4th row pixel), use the active member (TFT) in all dual pixel Pix in active member (TFT) in the odd pixel Pix of institute opening in the 3rd row pixel and the 4th row pixel, and control source electrode driver 307 and provide the 6th demonstration data SD of multiple correspondences to write to respectively the odd pixel Pix in the 3rd row pixel.
But, during due to T6 during the 6th, right gate drivers 305 can't output scanning signal SS to sweep trace G8 (i.e. the 4th row pixel), even if so all dual pixel Pix T6 during the 6th in the 4th row pixel is unlocked, multiple the 6th demonstration data SD that source electrode driver 307 now provided can not be written into all pixel Pix in the 4th row pixel yet.
Similarly, T7 during during same picture in FP the 7th, time schedule controller 309 can be controlled 303 and 305 while of left and right gate drivers output scanning signal SS to sweep trace G7 and G8 (i.e. the 4th row pixel), use the active member (TFT) in all pixel Pix that open in the 4th row pixel, and control source electrode driver 307 provides the 7th of multiple correspondences to show that data SD is to write to respectively all pixel Pix in the 4th row pixel.
Then, T8 during during same picture in FP the 8th, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 and distinguish output scanning signal SS and (do not illustrate to sweep trace G8 and G9, i.e. the 4th row and the 5th row pixel), use the odd pixel Pix in the odd pixel of institute of opening in the 4th row pixel and the 5th row pixel, and control source electrode driver 307 provides the 8th demonstration data SD of multiple correspondences to write to respectively the odd pixel Pix in the 4th row pixel.
But, during due to T8 during the 8th, right gate drivers 305 can't output scanning signal SS (illustrate to sweep trace G10, i.e. the 5th row pixel), even if so the odd pixel Pix of the institute T8 during the 8th in the 5th row pixel has been unlocked, multiple the 8th demonstration data SD that source electrode driver 307 now provided can not be written into all pixel Pix in the 5th row pixel yet.
Similarly, during same picture during the 8th of FP the after T8, during time schedule controller 309 meetings taking above-mentioned first to the 8th, T1~T8 is as circulation, and control left and right gate drivers 303 and 305 and source electrode driver 307, so that corresponding demonstration data SD is write to every four row pixels, until during next picture.
For instance, FP during same picture the 9th to the 16 during, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 and source electrode driver 307, corresponding demonstration data SD is write to the 5th row pixel to the 8 row pixels, wherein the 5th row are identical with the 2nd row pixel with the 1st row with the order that the 6th row pixel is written into corresponding demonstration data SD, and the 7th row are identical with the 4th row pixel with the 3rd row with the order that the 8th row pixel is written into corresponding demonstration data SD.
In addition, between the 17 to the 20 fourth phase of FP during same picture, time schedule controller 309 can be controlled left and right gate drivers 303 and 305 and source electrode driver 307, corresponding demonstration data SD is write to the 9th row pixel to the 12 row pixels, please the rest may be inferred, therefore repeat no more.
Based on above-mentioned known, the picture element array structure of the display panels 301 of this example embodiment is HSD framework, and by the relation that couples between the each pixel of ingenious arrangement and each data line, thereby make display panels 301 be able to be directly configured in left and right gate drivers 303 and 305 drivings on the glass substrate of display panels 301.Thus, not only can reduce the making price of left and right gate drivers 303 and 305, and more can reduce time schedule controller 309 and control left and right gate drivers 303 and 305 and the mode of source electrode driver 307.
In addition, because time schedule controller 309 can be controlled left and right gate drivers 303 and 305 and source electrode driver 307, so that demonstration data SD is write to each row pixel one by one.Therefore the line buffer (line buffer) of required use while, only needing one of additional configuration to be different from driven panel in the time schedule controller 309 of this example embodiment.By this, compared to prior art, the cost of the time schedule controller 309 of this example embodiment also can be effectively reduced.
Moreover the driving sequential chart disclosing from Fig. 4 can be found out, only can change once by FP during of liquid crystal display 100 picture in order to the control signal POL that determines every driving polarity on data line S1~S4.In other words, the driving polarity of the received demonstration data SD of the every one-row pixels in display panels 301 is that FP just changes once during a picture of liquid crystal display 100.Thus, the power consumption of source electrode driver 307 entirety can be reduced significantly.
The content disclosing based on above-mentioned example embodiment, below by converge whole go out a kind of driving method of display panels.
Fig. 5 illustrates the driving method process flow diagram into the display panels of the present invention's one example embodiment.Please refer to Fig. 5, the driving method of this example embodiment is suitable for driving the display panels with multiple pixels of arranging with matrix-style, and it comprises: the first period in during a picture of liquid crystal display, the first sweep signal and the second sweep signal to the i row pixel (i is positive integer) are provided simultaneously, use all pixels of opening in i row pixel, and provide accordingly multiple first to show that data are to write to respectively all pixels (step S501) in i row pixel; And second phase in during described picture, the second sweep signal and the 3rd sweep signal to the i row and (i+1) row pixel are provided respectively, use the odd or dual pixel in the institute of opening in i row pixel odd or dual pixel and (i+1) row pixel, and provide accordingly multiple the second demonstration data to write to respectively the odd or dual pixel (step S503) in i row pixel.
In sum, the picture element array structure of the display panels of liquid crystal display provided by the present invention is HSD framework, and by the relation that couples between the each pixel of ingenious arrangement and each data line, thus make the display panels of liquid crystal display provided by the present invention be able to be directly configured in gate driver drive on the substrate of display panels it.Thus, not only can reduce the making price of gate drivers entirety, and more can reduce the mode of time sequence controller grid driver and source electrode driver.
Although the present invention discloses as above with a preferred embodiment; so it is not in order to limit the present invention; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art are when making according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims (18)

1. a liquid crystal display, is characterized in that, comprising:
One display panels, at least comprises:
Article 8, sweep trace;
Article 2, data line; And
Multiple pixels, arrange with matrix-style;
Wherein, the 1st article of sweep trace couples the odd number of pixels of the 1st row pixel;
Article 2, sweep trace couples the even number pixel of the 1st row pixel;
Article 3, sweep trace couples the odd number of pixels of the 2nd row pixel;
Article 4, sweep trace couples the even number pixel of the 2nd row pixel;
Article 5, sweep trace couples the even number pixel of the 3rd row pixel;
Article 6, sweep trace couples the odd number of pixels of the 3rd row pixel;
Article 7, sweep trace couples the even number pixel of the 4th row pixel;
Article 8, sweep trace couples the odd number of pixels of the 4th row pixel;
Odd number of pixels in each row pixel is connected with the even number pixel that sequentially adds;
Article 1, data line couples the 1st, 2 pixels of the 2nd row pixel and the 3rd, 4 pixels of the 3rd row pixel; And
Article 2, data line couples the 1st, 2 pixels of the 4th row pixel and the 3rd, 4 pixels of the 5th row pixel.
2. liquid crystal display as claimed in claim 1, is characterized in that, also comprises:
One first grid driver, is directly configured in the side on a substrate of this display panels, and couples the odd number article sweep trace of those sweep traces, and one first sweep signal of the odd number article sweep trace of those sweep traces is provided in order to sequence,
Wherein, this first grid driver and those pixels are for be produced on this substrate simultaneously.
3. liquid crystal display as claimed in claim 2, is characterized in that, also comprises:
One second grid driver, is directly configured on this substrate, and couples the even number article sweep trace of those sweep traces, and one second sweep signal of even number article sweep trace is provided in order to sequence,
Wherein, this second grid driver and those pixels are for be produced on this substrate simultaneously.
4. liquid crystal display as claimed in claim 3, is characterized in that, this second grid driver correspondence is arranged on the same side of this first grid driver.
5. liquid crystal display as claimed in claim 3, is characterized in that, this second grid driver correspondence is arranged on the offside of this first grid driver.
6. liquid crystal display as claimed in claim 3, is characterized in that, the every one-row pixels in this display panels can receive respectively the demonstration data of a correspondence by those data lines.
7. liquid crystal display as claimed in claim 6, is characterized in that, it is that conversion is once during a picture of this liquid crystal display that one of received these demonstration data of every one-row pixels in this display panels drive polarity.
8. liquid crystal display as claimed in claim 6, is characterized in that, also comprises:
One source pole driver, couples this display panels, provides these demonstration data to those data lines in order to correspondence;
Time schedule controller, couples and controls the running of this first grid driver, this second grid driver and this source electrode driver; And
One backlight module, in order to provide this display panels required backlight.
9. liquid crystal display as claimed in claim 1, is characterized in that, this display panels also comprises:
One dummy data line, couples the 3rd, 4 pixels of the 1st row pixel.
10. a driving method for the display panels as described in any one in claim 3-9, is characterized in that, this display panels has multiple pixels of arranging with matrix-style, and this driving method comprises:
A first period in during a picture of a liquid crystal display, one first sweep signal and one second sweep signal to the 1 row pixel are provided simultaneously, use all pixels of opening in the 1st row pixel, and provide accordingly multiple first to show that data are to write to respectively those pixels in the 1st row pixel; And
A second phase in during this picture, this the second sweep signal to the 1 row pixel is provided, use all even number pixels of opening in the 1st row pixel, and provide accordingly multiple second to show that data are to write to respectively those even number pixels in the 1st row pixel.
The driving method of 11. display panels as claimed in claim 10, is characterized in that, also comprises:
In this second phase, one the 3rd sweep signal to the 2 row pixels are provided, use all odd number of pixels of opening in the 2nd row pixel.
The driving method of 12. display panels as claimed in claim 11, is characterized in that, also comprises:
Between the third phase in during this picture, the 3rd sweep signal and one the 4th sweep signal to the 2 row pixels are provided simultaneously, use all pixels of opening in the 2nd row pixel, and provide accordingly the multiple the 3rd to show that data are to write to respectively those pixels in the 2nd row pixel; And
Between the fourth phase in during this picture, the 4th sweep signal to the 2 row pixels are provided, use all even number pixels of opening in the 2nd row pixel, and provide accordingly the multiple the 4th to show that data are to write to respectively those even number pixels in the 2nd row pixel.
The driving method of 13. display panels as claimed in claim 12, is characterized in that, also comprises:
In between this fourth phase, one the 5th sweep signal to the 3 row pixels are provided, use all even number pixels of opening in the 3rd row pixel.
The driving method of 14. display panels as claimed in claim 13, is characterized in that, also comprises:
Between the fifth phase in during this picture, the 5th sweep signal and one the 6th sweep signal to the 3 row pixels are provided simultaneously, use all pixels of opening in the 3rd row pixel, and provide accordingly the multiple the 5th to show that data are to write to respectively those pixels in the 3rd row pixel; And
During in during this picture the 6th, the 6th sweep signal to the 3 row pixels are provided, use all odd number of pixels of opening in the 3rd row pixel, and provide accordingly the multiple the 6th to show that data are to write to respectively those odd number of pixels in the 3rd row pixel.
The driving method of 15. display panels as claimed in claim 14, is characterized in that, also comprises:
During the 6th, one the 7th sweep signal to the 4 row pixels are also provided, use all even number pixels of opening in the 4th row pixel.
The driving method of 16. display panels as claimed in claim 15, is characterized in that, also comprises:
During in during this picture the 7th, the 7th sweep signal and one the 8th sweep signal to the 4 row pixels are provided simultaneously, use all pixels of opening in the 4th row pixel, and provide accordingly the multiple the 7th to show that data are to write to respectively those pixels in the 4th row pixel; And
During in during this picture the 8th, the 8th sweep signal to the 4 row pixels are provided, use all odd number of pixels of opening in the 4th row pixel, and provide accordingly the multiple the 8th to show that data are to write to respectively those odd number of pixels in the 4th row pixel.
The driving method of 17. display panels as claimed in claim 16, is characterized in that, it is that conversion is once during this picture that one of received these demonstration data of every one-row pixels in this display panels drive polarity.
The driving method of 18. 1 kinds of display panels as described in any one in claim 3-9, is characterized in that, this display panels has multiple pixels of arranging with matrix-style, and this driving method comprises:
A first period in during a picture of a liquid crystal display, one first sweep signal and one second sweep signal to the i row pixel are provided simultaneously, use all pixels of opening in i row pixel, and provide accordingly multiple first to show that data are to write to respectively those pixels in i row pixel, i is positive integer; And
A second phase in during this picture, this second sweep signal and one the 3rd sweep signal to the i row and (i+1) row pixel are provided respectively, use the odd or dual pixel in the institute of opening in i row pixel odd or dual pixel and (i+1) row pixel, and provide accordingly multiple the second demonstration data with write to respectively in i row pixel those very or dual pixels.
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CN104407479B (en) * 2014-12-02 2017-07-21 深圳市华星光电技术有限公司 A kind of liquid crystal display panel and display device
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TWI726564B (en) * 2019-12-31 2021-05-01 財團法人工業技術研究院 Pixel array with gate driver and matrix sensor array

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101093304A (en) * 2006-06-19 2007-12-26 Lg.菲利浦Lcd株式会社 Flat-panel display member and driving method thereof
CN101236344A (en) * 2008-03-11 2008-08-06 友达光电股份有限公司 Liquid crystal display device and driving method thereof
JP2008249895A (en) * 2007-03-29 2008-10-16 Casio Comput Co Ltd Display panel and matrix display device using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101093304A (en) * 2006-06-19 2007-12-26 Lg.菲利浦Lcd株式会社 Flat-panel display member and driving method thereof
JP2008249895A (en) * 2007-03-29 2008-10-16 Casio Comput Co Ltd Display panel and matrix display device using the same
CN101236344A (en) * 2008-03-11 2008-08-06 友达光电股份有限公司 Liquid crystal display device and driving method thereof

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