JP2000019559A - Liquid crystal element - Google Patents
Liquid crystal elementInfo
- Publication number
- JP2000019559A JP2000019559A JP18581598A JP18581598A JP2000019559A JP 2000019559 A JP2000019559 A JP 2000019559A JP 18581598 A JP18581598 A JP 18581598A JP 18581598 A JP18581598 A JP 18581598A JP 2000019559 A JP2000019559 A JP 2000019559A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- pixel
- pixel electrode
- tft
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、アクティブマトリ
クス方式により、高速駆動で表示を行う液晶素子に関す
る発明である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal element which performs display at high speed by an active matrix system.
【０００２】[0002]
【従来の技術】液晶表示装置に用いられる液晶として
は、ネマチック液晶、スメクチック液晶、高分子分散型
液晶等、様々な液晶材料が用いられている。2. Description of the Related Art Various liquid crystal materials such as a nematic liquid crystal, a smectic liquid crystal, and a polymer-dispersed liquid crystal are used as a liquid crystal for a liquid crystal display device.
【０００３】特に、自発分極を有し、双安定性を持った
液晶素子がクラーク（Ｃｌａｒｋ）及びラガーウォル
（Ｌａｇｅｒｗａｌｌ）の両者により特開昭５６−１０
７２１６号公報、米国特許第４，３６２，９２４号明細
書等で提案されている。双安定性液晶としては、一般に
カイラルスメクチックＣ相（ＳｍＣ* ）またはＨ相（Ｓ
ｍＨ* ）を有する強誘電性液晶が用いられ、これらの状
態において印加された電界に応答して第１の光学的安定
状態と第２の光学安定状態、いわゆる双安定状態を示
し、且つ電圧が印加されていない時はその状態を維持す
る性質、即ち安定性を有し、また電界の変化に対する応
答が速やかで、高速且つ記憶型の表示装置等の分野にお
ける広い利用が期待されている。[0003] In particular, a liquid crystal device having spontaneous polarization and having bistability is disclosed in both Clark and Lagerwall in JP-A-56-10.
No. 7216 and U.S. Pat. No. 4,362,924. Bistable liquid crystals generally include a chiral smectic C phase (SmC * ) or an H phase (SmC * ).
mH * ) are used, exhibit a first optically stable state and a second optically stable state, a so-called bistable state, in response to an electric field applied in these states, and have a voltage of It is expected to be widely used in fields such as high-speed and storage-type display devices, which have a property of maintaining the state when no voltage is applied, that is, stability, and have a quick response to a change in electric field.
【０００４】また、反強誘電性液晶も自発分極を有する
液晶であり、当該液晶には、特開平２−１５３３２２号
公報に開示されたようなヒステリシス特性を持つもの
と、特開平８−３２８０４６号公報に開示されたような
しきい値がなく中間配向状態を示すものとが知られてい
る。当該２種の反強誘電性液晶の電圧−透過率特性例を
図７に示す。図中（ａ）は上記ヒステリシス特性を持つ
タイプであり、（ｂ）が中間配向状態を示すタイプであ
る。[0004] Antiferroelectric liquid crystals are also liquid crystals having spontaneous polarization. Such liquid crystals have a hysteresis characteristic as disclosed in JP-A-2-153322 and JP-A-8-328046. It is known that there is no threshold value as disclosed in the gazette and an intermediate alignment state is exhibited. FIG. 7 shows an example of voltage-transmittance characteristics of the two kinds of antiferroelectric liquid crystals. In the figure, (a) is a type having the above-mentioned hysteresis characteristic, and (b) is a type showing an intermediate alignment state.
【０００５】具体的には、図７（ａ）の特性を示す液晶
を用いた素子においては、印加電圧が０の状態で第１の
光透過率状態を示し、絶対値において各極性の所定の第
１のしきい値（＋Ｖ1 或いは−Ｖ1 ）以上の電圧を印加
することによって、第２の光透過率状態にスイッチング
し、該第２の光透過状態において、絶対値において各極
性の所定の第２のしきい値（＋Ｖ2 或いは−Ｖ2 ）以下
の電圧を印加することによって、上記第２の光透過状態
にスイッチングする。従って、印加電圧が０の時に最暗
状態となるように一対の偏光板によって液晶素子を挟持
することにより、白・黒二値表示が可能となる。More specifically, in a device using a liquid crystal having the characteristics shown in FIG. 7A, the first light transmittance state is shown when the applied voltage is 0, and a predetermined value of each polarity in absolute value is shown. By applying a voltage equal to or higher than a first threshold value (+ V 1 or −V 1 ), switching to a second light transmittance state is performed. by applying a second threshold value (+ V 2 or -V 2) less voltage, switching to the second light transmitting state. Therefore, by sandwiching the liquid crystal element between the pair of polarizing plates so that the liquid crystal element is in the darkest state when the applied voltage is 0, binary white / black display is possible.
【０００６】また、図７（ｂ）の特性を示す液晶を用い
た素子においては、印加された電圧値が０の際には第１
の光透過率状態を、絶対値において各極性の所定の飽和
電圧値（＋Ｖ3 または−Ｖ3 ）以上の電圧値においては
第２の光透過率状態を呈し、且つ、印加電圧値に応じて
上記第１の光透過率状態と第２の光透過率状態との間で
連続的に光透過率が変化する電圧−透過率特性を有す
る。従って、上記第１の光透過率状態の時が最暗状態と
なるように一対の偏光板で当該液晶素子を挟持すると、
黒〜白間で印加された電圧値に対応して連続した中間調
を表示することができる。In an element using a liquid crystal having the characteristics shown in FIG. 7B, when the applied voltage value is 0, the first
Of the light transmittance state, in absolute value the polarity of a given saturation voltage (+ V 3 or -V 3) or more voltage values at present a second light transmission state, and, depending on the application voltage value It has a voltage-transmittance characteristic in which the light transmittance changes continuously between the first light transmittance state and the second light transmittance state. Therefore, when the liquid crystal element is sandwiched between a pair of polarizing plates so that the state of the first light transmittance state is the darkest state,
A continuous halftone can be displayed according to the voltage value applied between black and white.
【０００７】強誘電性或いは反強誘電性液晶の高速で且
つ広い視野角特性を生かして、アクティブマトリクスで
駆動する液晶素子の研究がなされてきた。以下にこれに
関連する文献を挙げる。 （１）Ａ ｆｕｌｌ−ｃｏｌｏｒ ｔｈｒｅｓｈｏｌｄ
ｌｅｓｓ Ａｎｔｉｆｅｒｒｏｅｌｅｃｔｒｉｃ ＬＣ
Ｄ ｅｘｈｉｂｉｔｉｎｇ ｗｉｄｅ ｖｉｅｗｉｎｇ
ａｎｇｌｅ ｗｉｔｈ ｆａｓｔ ｒｅｓｐｏｎｓｅ
ｔｉｍｅ，Ｔ．Ｙｏｓｈｉｄａ ｅｔ ａｌ，ＳＩＤ
９７（Ｓｏｃｉｅｔｙ ｆｏｒ Ｉｎｆｏｒｍａｔｉ
ｏｎ Ｄｉｓｐｌａｙ ９７）ＤＩＧＥＳＴ Ｐ８４１ （２）Ｖｏｌｔａｇｅ−ｈｏｌｄｉｎｇ ｐｒｏｐｅｒ
ｔｉｅｓ ｏｆ ｔｈｒｅｓｈｏｌｄｌｅｓｓ ａｎｔ
ｉｆｅｒｒｏｅｌｅｃｔｒｉｃ ｌｉｑｕｉｄｃｒｙｓ
ｔａｌｓ ｄｒｉｖｅｎ ｂｙ ａｃｔｉｖｅ ｍａｔ
ｒｉｘｅｓ，Ｔ．Ｓａｉｓｈｕ ｅｔ ａｌ，ＳＩＤ
９６（Ｓｏｃｉｅｔｙ ｆｏｒ Ｉｎｆｏｒｍａｔｉｏ
ｎ Ｄｉｓｐｌａｙ ９６）ＤＩＧＥＳＴ Ｐ７０３ （３）Ａｎａｌｙｔｉｃａｌ ｍｏｄｅｌｌｉｎｇ ｏ
ｆ ａｃｔｉｖｅ−ｍａｔｒｉｘ ｄｒｉｖｉｎｇ ｏ
ｆ ｌｉｑｕｉｄ ｃｒｙｓｔａｌｓ ｗｉｔｈｓｐｏ
ｎｔａｎｅｏｕｓ ｐｏｌａｒｉｚａｔｉｏｎ Ｔ．Ｖ
ｅｒｈｕｌｓｔＪｐｎ．Ｊ．Ａｐｐｌ．Ｐｈｙｓ．Ｖｏ
ｌ．３６（１９９７）ｐｐ７２０−７２９A liquid crystal device driven by an active matrix has been studied by utilizing the high-speed and wide viewing angle characteristics of the ferroelectric or antiferroelectric liquid crystal. The following are related documents. (1) A full-color threshold
less Antiferroelectric LC
D exciting wide viewing
angle with fast response
time, T .; Yoshida et al, SID
97 (Society for Information)
on Display 97) DIGEST P841 (2) Voltage-holding property
ties of thresholdless ant
iferoelectric liquidcrys
tals driven by active mat
rices, T .; Saishu et al, SID
96 (Society for Information)
n Display 96) DIGEST P703 (3) Analytical modeling o
f active-matrix driving o
f liquid crystals withspo
ntaneous polarization T.T. V
erhurstJpn. J. Appl. Phys. Vo
l. 36 (1997) pp 720-729
【０００８】[0008]
【発明が解決しようとする課題】強誘電性液晶や反強誘
電性液晶は自発分極を持つために、ネマチック液晶に比
べて応答速度が速く、高速駆動が可能である。しかしな
がら、自発分極の反転に要する電流を外部から供給する
必要があることから、駆動回路から見た時の負荷が大き
いという問題がある。特に、自発分極が大きい場合には
この問題が深刻になる。以下に、実際の数値を挙げて説
明する。Since a ferroelectric liquid crystal or an antiferroelectric liquid crystal has spontaneous polarization, it has a higher response speed than a nematic liquid crystal and can be driven at a high speed. However, since it is necessary to supply the current required for reversing the spontaneous polarization from the outside, there is a problem that the load as viewed from the drive circuit is large. In particular, this problem becomes serious when spontaneous polarization is large. In the following, actual values will be described.
【０００９】通常のＴＮ型液晶素子では、液晶層を挟む
電極間の静電容量は２ｎＦ／ｃｍ2前後である。１画素
の大きさを７０μｍ×２１０μｍとすると、１画素当た
りの静電容量は約０．３ｐＦ（＝Ｃとする）で、これを
１０Ｖ（＝Ｖとする）で駆動する場合に必要な充電電荷
量は、Ｑ＝ＣＶ＝３ｐＣである。In a normal TN type liquid crystal device, the capacitance between electrodes sandwiching a liquid crystal layer is about 2 nF / cm 2 . Assuming that the size of one pixel is 70 μm × 210 μm, the capacitance per pixel is about 0.3 pF (= C), and the charge required for driving this at 10 V (= V) The quantity is Q = CV = 3 pC.
【００１０】一方、強誘電性液晶や反強誘電性液晶で
は、上記とほぼ同じ充電電荷に加えて、自発分極の大き
さＰｓを１００ｎＣ／ｃｍ2 とすると、これを完全に反
転させるためにＱ＝２ＰｓＳ＝２９ｐＣ（Ｓは１画素の
面積）の電荷が必要となる。即ち、自発分極が１００ｎ
Ｃ／ｃｍ2 程度の液晶を用いた場合、同じセル構成で駆
動する場合に必要な電荷量はＴＮ型液晶の約１０倍必要
となる。従って、このような自発分極の大きな液晶を用
いたアクティブマトリクス方式の液晶素子をＴＮ型液晶
素子と同じ時間で駆動する場合には、必要な電流量が１
０倍以上となり、画素のスイッチング素子の駆動能力が
ＴＮ型液晶素子に比べて１０倍以上高くなければならな
い。On the other hand, in the case of a ferroelectric liquid crystal or an antiferroelectric liquid crystal, if the magnitude Ps of spontaneous polarization is set to 100 nC / cm 2 in addition to the above-described charge charge, Q = 2PsS = 29pC (S is the area of one pixel). That is, the spontaneous polarization is 100 n
When a liquid crystal of about C / cm 2 is used, the amount of charge required for driving with the same cell configuration is about ten times that of the TN type liquid crystal. Therefore, when an active matrix type liquid crystal element using a liquid crystal having a large spontaneous polarization is driven in the same time as a TN type liquid crystal element, the necessary current amount is one.
The driving capability of the switching element of the pixel must be at least 10 times higher than that of the TN type liquid crystal element.
【００１１】アクティブマトリクス方式の液晶素子にお
いて、スイッチング素子としては例えば薄膜トランジス
タ（ＴＦＴ）が用いられるが、駆動能力即ちゲートオン
時のソース・ドレイン間のコンダクタンスを大きくする
には、開口率を犠牲にしてＴＦＴのサイズを大きくしな
ければならない。しかしながら、１０倍以上にすること
は非現実的である。In the active matrix type liquid crystal element, for example, a thin film transistor (TFT) is used as a switching element. However, in order to increase the driving capability, that is, the conductance between the source and the drain when the gate is turned on, the TFT is sacrificed at the expense of the aperture ratio. Must be increased in size. However, it is impractical to increase it by a factor of 10 or more.
【００１２】特に、図７（ｂ）に示した電圧−透過率特
性を有する反強誘電性液晶については、アクティブマト
リクス駆動により連続的な中間調を表示することができ
るが、現状では自発分極が１００ｎＣ／ｃｍ2 以上のも
のしか得られていないため、通常のＴＦＴによるアクテ
ィブマトリクス駆動は困難であった。In particular, an antiferroelectric liquid crystal having a voltage-transmittance characteristic shown in FIG. 7B can display a continuous halftone by active matrix driving. Since only the one with 100 nC / cm 2 or more was obtained, it was difficult to drive the active matrix with a normal TFT.
【００１３】また、図７（ｂ）の特性において第１の光
透過率状態と第２の光透過率状態間での遷移がヒステリ
シス曲線を描く場合や、液晶の応答時間が書き換える前
の透過率状態によって異なる場合があり、特に自発分極
の大きい液晶において階調表示の乱れが顕著になるとい
う問題もあった。In the characteristics shown in FIG. 7B, the transition between the first light transmittance state and the second light transmittance state draws a hysteresis curve, or the transmittance of the liquid crystal before the response time is rewritten. In some cases, the state differs depending on the state. In particular, there is a problem that the disturbance of gradation display becomes remarkable in a liquid crystal having a large spontaneous polarization.
【００１４】本発明の目的は、自発分極を有する液晶を
用いて高速でアクティブマトリクス駆動する液晶素子を
構成することにある。特に、電圧−透過率特性にしきい
値のない液晶を用いた場合に、ドメインウォールの安定
性、電荷量の制御性を向上し、安定した階調表示を実現
することにある。An object of the present invention is to configure a liquid crystal element which is driven at high speed by active matrix using a liquid crystal having spontaneous polarization. In particular, it is an object of the present invention to improve the stability of the domain wall and the controllability of the charge amount and realize a stable gradation display when using a liquid crystal having no threshold in the voltage-transmittance characteristic.
【００１５】[0015]
【課題を解決するための手段】本発明は、互いに直交す
る複数の走査信号線と情報信号線、及び該信号線の交点
を１画素として、各画素毎に画素電極と第１のスイッチ
ング素子を設けた第１の基板と、各画素毎に電気的に独
立した対向電極を設けた第２の基板との間に自発分極を
有する液晶を挟持してなり、各画素において、上記画素
電極が電気的に独立し且つ第２のスイッチング素子によ
って相互に連結された複数の領域からなり、該画素電極
と対向電極によって、直列接続された複数のキャパシタ
ンスが上記第１のスイッチング素子の負荷として形成さ
れていることを特徴とする液晶素子である。According to the present invention, a plurality of scanning signal lines and information signal lines which are orthogonal to each other, and an intersection of the signal lines are defined as one pixel, and a pixel electrode and a first switching element are provided for each pixel. A liquid crystal having spontaneous polarization is sandwiched between a first substrate provided and a second substrate provided with an electrically independent counter electrode for each pixel. A plurality of regions independent of each other and interconnected by a second switching element, and a plurality of capacitances connected in series are formed as a load of the first switching element by the pixel electrode and the counter electrode. A liquid crystal element.
【００１６】本発明においては特に、印加された電圧値
が０の際には第１の光透過率状態を、絶対値において各
極性の所定の飽和電圧値以上の電圧値においては第２の
光透過率状態を呈し、且つ、印加電圧値に応じて上記第
１の光透過率状態と第２の光透過率状態との間で連続的
に光透過率が変化する電圧−透過率特性を有する液晶を
用いて、良好な階調表示を行うことができる。In the present invention, in particular, the first light transmittance state is set when the applied voltage value is 0, and the second light transmittance state is set when the applied voltage value is equal to or higher than a predetermined saturation voltage value of each polarity in absolute value. It has a voltage-transmittance characteristic in which a light transmittance state is exhibited and the light transmittance continuously changes between the first light transmittance state and the second light transmittance state according to an applied voltage value. Good gradation display can be performed using liquid crystal.
【００１７】[0017]
【発明の実施の形態】図１に本発明の液晶素子の一実施
形態の１画素の等価回路である。図中、１は第１のスイ
ッチング素子である薄膜トランジスタ（ＴＦＴ）、２は
第２のスイッチング素子であるＴＦＴ、３は第１のキャ
パシタンス、４は第２のキャパシタンスである。FIG. 1 is an equivalent circuit of one pixel of an embodiment of the liquid crystal device of the present invention. In the figure, 1 is a thin film transistor (TFT) as a first switching element, 2 is a TFT as a second switching element, 3 is a first capacitance, and 4 is a second capacitance.
【００１８】図２は、上記実施形態の画素を複数個（２
×３）配列し、第２のＴＦＴ２のゲート電極を、前ライ
ンの走査信号線に接続した実施形態の等価回路である。
図中、５は走査信号線、６は情報信号線である。FIG. 2 shows a plurality of pixels (2
× 3) This is an equivalent circuit of the embodiment in which the gate electrodes of the second TFT 2 are arranged and the scanning signal line of the previous line is connected.
In the figure, 5 is a scanning signal line, and 6 is an information signal line.
【００１９】図３は、図２の等価回路を有する実施形態
の電極構造例を示す平面模式図であり、図中のＡ−Ａ’
断面図を図４に示す。尚、図３においては便宜上、主要
部材のみを示す。図中、３１〜３４は第２のＴＦＴ２を
構成する部材で、３１はゲート電極、３２はａ−Ｓｉ
（アモルファスシリコン）層、３３はソース電極、３４
はドレイン電極である。また、４２〜４７は第１のＴＦ
Ｔ１を構成する部材で、４２はゲート電極、４３はゲー
ト絶縁膜、４４はａ−Ｓｉ層、４５はｎ+ ａ−Ｓｉ層、
４６はソース電極、４７はドレイン電極である。さら
に、４１は第１の基板、５３は第２の基板、４８は絶縁
膜、４９はパッシベーション膜、５０は第１の画素電
極、５１は第２の画素電極、５４は対向電極、５５は絶
縁膜、５２及び５６は配向膜、５７は自発分極を有する
液晶、５８は保持容量電極、７は配線である。FIG. 3 is a schematic plan view showing an example of the electrode structure of the embodiment having the equivalent circuit of FIG.
A cross-sectional view is shown in FIG. FIG. 3 shows only main members for convenience. In the figure, 31 to 34 are members constituting the second TFT 2, 31 is a gate electrode, and 32 is a-Si.
(Amorphous silicon) layer, 33 is a source electrode, 34
Is a drain electrode. Also, 42 to 47 are the first TFs.
42 is a gate electrode, 43 is a gate insulating film, 44 is an a-Si layer, 45 is an n + a-Si layer,
46 is a source electrode and 47 is a drain electrode. Further, 41 is a first substrate, 53 is a second substrate, 48 is an insulating film, 49 is a passivation film, 50 is a first pixel electrode, 51 is a second pixel electrode, 54 is a counter electrode, and 55 is insulating. Reference numerals 52 and 56 denote alignment films, 57 denotes a liquid crystal having spontaneous polarization, 58 denotes a storage capacitor electrode, and 7 denotes a wiring.
【００２０】本発明において用いられる自発分極を有す
る液晶としては、前記した強誘電性液晶や反強誘電性液
晶が用いられるが、中でも、図７（ｂ）に示すしきい値
のない電圧−透過率特性を有する液晶を用いることによ
って、良好な階調表示が可能となる。また、図７（ａ）
の特性を示す液晶を用いた場合には白・黒二値表示を行
うことができる。As the liquid crystal having spontaneous polarization used in the present invention, the above-mentioned ferroelectric liquid crystal or antiferroelectric liquid crystal is used. Among them, the voltage-transmission without threshold shown in FIG. By using a liquid crystal having a rate characteristic, good gradation display can be achieved. FIG. 7 (a)
When a liquid crystal exhibiting the above characteristics is used, white / black binary display can be performed.
【００２１】尚、本発明においては、本発明にかかる電
極構成を有していれば、各部材の素材、形状、製法等に
ついては、一般の液晶素子、特にアクティブマトリクス
方式の液晶素子の技術を適用することができる。In the present invention, as long as the electrode configuration according to the present invention is provided, the material, shape, manufacturing method, etc. of each member can be determined by using the technology of a general liquid crystal element, particularly, an active matrix type liquid crystal element. Can be applied.
【００２２】本発明においては、画素電極を第１の画素
電極５０と第２の画素電極５１に分割することで電気的
に独立した複数の領域を形成している。第１の画素電極
５０は第１のＴＦＴ１のドレイン電極４７に接続され、
液晶５７を挟んで対向電極５４との間に第１のキャパシ
タンス３を形成している。一方、第２の画素電極５１も
液晶５７を挟んで対向電極５４との間に第２のキャパシ
タンス４を形成している。対向電極５７は画素毎に絶縁
されており、第１及び第２の画素電極に対して対向電極
５７が共通電極となっているため、第１のＴＦＴ１の負
荷としてこれらキャパシタンス３、４が直列に接続され
ていることになる。さらに、第１の画素電極５０と第２
の画素電極５１とは同じ面積になるように形成され、第
２のＴＦＴ２によって連結されている。In the present invention, a plurality of electrically independent regions are formed by dividing a pixel electrode into a first pixel electrode 50 and a second pixel electrode 51. The first pixel electrode 50 is connected to the drain electrode 47 of the first TFT 1,
The first capacitance 3 is formed between the liquid crystal 57 and the opposing electrode 54 with the liquid crystal 57 interposed therebetween. On the other hand, the second pixel electrode 51 also forms the second capacitance 4 between the second pixel electrode 51 and the counter electrode 54 with the liquid crystal 57 interposed therebetween. The counter electrode 57 is insulated for each pixel, and since the counter electrode 57 is a common electrode with respect to the first and second pixel electrodes, these capacitances 3 and 4 are connected in series as a load of the first TFT 1. It will be connected. Further, the first pixel electrode 50 and the second
Are formed to have the same area as the pixel electrode 51 and are connected by the second TFT 2.
【００２３】上記実施形態における各部材の作用を図５
により説明する。図５は上記実施形態の１画素の主要部
分を模式的に示す断面図である。The operation of each member in the above embodiment is shown in FIG.
This will be described below. FIG. 5 is a cross-sectional view schematically showing a main part of one pixel of the embodiment.
【００２４】図５の電極構成において、第２のＴＦＴ２
をオフした状態で第１のＴＦＴ１をオンし、該第１のＴ
ＦＴ１が接続された情報信号線に所定の電位の情報信号
を印加すると、該電位に応じた電荷が第１のＴＦＴ１を
介して第１の画素電極５０に供給され、第１の画素電極
５０と対向電極５４で形成されるキャパシタンス３に蓄
積される。その結果、対向電極５４の第２の画素電極５
１に対向する面に、第１の画素電極５０と同等の電荷が
発生し、第２の画素電極５１と対向電極５４とで形成さ
れるキャパシタンス４に蓄積される。液晶には、キャパ
シタンス３と４とで逆方向の電界が印加されることにな
る。In the electrode configuration shown in FIG.
Is turned off, the first TFT 1 is turned on, and the first TFT 1 is turned on.
When an information signal of a predetermined potential is applied to the information signal line to which the FT1 is connected, a charge corresponding to the potential is supplied to the first pixel electrode 50 via the first TFT1, and the first pixel electrode 50 It is stored in the capacitance 3 formed by the counter electrode 54. As a result, the second pixel electrode 5 of the counter electrode 54
An electric charge equivalent to that of the first pixel electrode 50 is generated on the surface facing 1 and is accumulated in the capacitance 4 formed by the second pixel electrode 51 and the opposing electrode 54. An electric field in the opposite direction is applied to the liquid crystal by the capacitances 3 and 4.
【００２５】図５において（ａ）は表示中、即ちキャパ
シンタンス３、４のいずれもが充電された状態の画素を
示しており、第１のＴＦＴ１及び第２のＴＦＴ２のいず
れもオフとなっている。図中の矢印は電界の方向であ
る。FIG. 5A shows a pixel during display, that is, a state in which both of the capacitances 3 and 4 are charged, and both the first TFT 1 and the second TFT 2 are turned off. ing. The arrow in the figure is the direction of the electric field.
【００２６】次に、第２のＴＴＦ２をオンし、第１の画
素電極５０と第２の画素電極５１とを導通させることに
より、画素内の電荷を放電する（図５（ｂ））。これら
画素電極の面積が同じ場合には等量の電荷が電極間に蓄
積されているので、キャパシタンス３、４の放電が瞬時
に行われる。図５（ｃ）は放電後の画素である。実際に
は、第１及び第２のＴＦＴを同時にオフとする期間を設
けずに、（ｂ）の放電後に（ｄ）の書き込みを行っても
良い。Next, the second TTF 2 is turned on to conduct the first pixel electrode 50 and the second pixel electrode 51, thereby discharging the electric charge in the pixel (FIG. 5B). When the area of these pixel electrodes is the same, an equal amount of electric charge is accumulated between the electrodes, so that the capacitances 3 and 4 are discharged instantaneously. FIG. 5C shows the pixel after the discharge. Actually, the writing of (d) may be performed after the discharging of (b) without providing a period for turning off the first and second TFTs at the same time.
【００２７】次いで、第２のＴＦＴ２をオフし、第１の
ＴＦＴ１をオンして情報信号に応じた電荷量を第１の画
素電極５０に供給する。この時、１フレーム毎に液晶に
印加する電圧の極性を反転する場合には、（ｄ）に示す
ように、（ａ）とは逆極性の電荷を第１の画素電極５０
に供給する。Next, the second TFT 2 is turned off, and the first TFT 1 is turned on to supply a charge corresponding to the information signal to the first pixel electrode 50. At this time, when inverting the polarity of the voltage applied to the liquid crystal for each frame, as shown in (d), a charge having a polarity opposite to that of (a) is applied to the first pixel electrode 50.
To supply.
【００２８】本実施形態を、従来の画素電極を分割しな
かった場合と比較すると、第１のＴＦＴ１から見た負荷
容量は、半分の面積の画素電極で構成されるキャパシタ
ンスが直列に２個接続されているので、合成容量として
は従来の１／４となる。但し、情報信号線より与える駆
動電圧は、従来の電圧値Ｖの２倍にしなければならない
が、第１のＴＦＴ１を流れる電流量は１／２となる。When comparing this embodiment with the conventional case where the pixel electrode is not divided, the load capacitance seen from the first TFT 1 is such that two capacitances constituted by pixel electrodes having half the area are connected in series. Therefore, the combined capacity is 1/4 of the conventional capacity. However, the drive voltage given from the information signal line must be twice the conventional voltage value V, but the amount of current flowing through the first TFT 1 is ２.
【００２９】また、電荷を供給する第１の画素電極５０
の面積が従来の半分になっているため、自発分極による
反転電流も１／２となる。The first pixel electrode 50 for supplying electric charges
Is half of the conventional area, the inversion current due to spontaneous polarization is also halved.
【００３０】さらに、第２のＴＦＴ２によって書き込み
前に画素の放電を行うことにより、書き込みを行う期間
を従来の半分にする、或いは第１のＴＦＴ１に必要な駆
動能力を１／２にすることができる。従って、従来と同
じ期間で走査する場合には、１００ｎＣ／ｃｍ2 の自発
分極を有する液晶でも、ＴＮ型液晶の場合の２．５倍の
駆動能力のＴＦＴで良好に表示することが可能となる。Further, by discharging the pixel before writing by the second TFT 2, the writing period can be reduced to half of the conventional period, or the driving capability required for the first TFT 1 can be reduced to half. it can. Therefore, when scanning is performed in the same period as in the related art, a liquid crystal having a spontaneous polarization of 100 nC / cm 2 can be displayed well with a TFT having a driving ability 2.5 times that of a TN type liquid crystal. .
【００３１】また、一旦、画素の放電を行った後に情報
信号に応じて所定の書き込みを行うことから、書き込み
時の液晶状態がいずれの画素においても同一であるた
め、電圧−透過率特性がヒステリシスを示す場合や、書
き込み前の表示状態によって次の書き込み時の液晶の応
答時間が異なる場合でも、書き込み内容を安定化させる
ことができる。Further, since predetermined writing is performed in accordance with the information signal after discharging the pixel once, the liquid crystal state at the time of writing is the same in all the pixels, so that the voltage-transmittance characteristic has a hysteresis. , Or the response time of the liquid crystal at the time of the next writing differs depending on the display state before writing, the written contents can be stabilized.
【００３２】尚、本実施形態の様に画素電極を２分して
直列にキャパシタンスを接続した場合には、第１の画素
電極５０の領域と第２の画素電極５１の領域とでは液晶
５７に印加される電界の方向が逆向きとなる。反強誘電
性液晶においては、明状態の光軸はスメクチック軸方向
に対して左右にチルトした二つの方向をとり、これを一
定周期毎に切り替えて交流駆動するが、これがフリッカ
として視認されることがある。従来、これを防ぐ方法と
して１行毎に駆動極性を正負逆にするいわゆる１Ｈ反転
駆動法が提案されている（特開平４−１８２６９４号公
報）が、通常のアクティブマトリクス方式では対向電極
が共通なためにソース電圧を正負交互に与えなければな
らず、ソース（情報信号）ドライバＩＣに高電圧出力の
ものが求められていた。本実施形態では、１画素内で正
負２方向が存在するので、１Ｈ反転の必要がなく、ソー
スドライバＩＣの低電圧化が容易になるという利点もあ
る。When the capacitance is connected in series by dividing the pixel electrode into two parts as in the present embodiment, the liquid crystal 57 is formed between the region of the first pixel electrode 50 and the region of the second pixel electrode 51. The direction of the applied electric field is reversed. In antiferroelectric liquid crystals, the optical axis in the bright state takes two directions tilted to the left and right with respect to the smectic axis direction, and is switched at regular intervals to drive the AC, but this is visually recognized as flicker. There is. As a method for preventing this, a so-called 1H inversion driving method in which the driving polarity is reversed for each row has been proposed (Japanese Patent Application Laid-Open No. 4-182694). Therefore, the source voltage must be alternately applied to the positive and negative sides, and a source (information signal) driver IC having a high voltage output is required. In the present embodiment, since there are two positive and negative directions in one pixel, 1H inversion is not required, and there is an advantage that the voltage of the source driver IC can be easily reduced.
【００３３】図２、図３に示した実施形態においては、
第２のＴＦＴ２のゲート電極３１は、前ラインの走査信
号線５ａに接続し、前ラインの画素の第１のＴＦＴ１を
オンして書き込みを行う期間を利用して画素の放電を行
う。尚、１ライン目の第２のＴＦＴ２のゲート電極３１
は、最終ラインの走査信号線に接続しても良いが、配線
が長くなるため、１ライン目の走査信号線の手前に別途
信号線を設けて当該ラインの第２のＴＦＴ２のゲートを
制御しても良い。また、画素電極５１には配線７が接続
されており、該配線７は引き出されて接地されている。In the embodiment shown in FIGS. 2 and 3,
The gate electrode 31 of the second TFT 2 is connected to the scanning signal line 5a of the previous line, and discharges the pixel using a period during which the first TFT 1 of the pixel of the previous line is turned on and writing is performed. The gate electrode 31 of the second TFT 2 in the first line
May be connected to the last scanning signal line, but since the wiring becomes long, a separate signal line is provided before the first scanning signal line to control the gate of the second TFT 2 in that line. May be. The wiring 7 is connected to the pixel electrode 51, and the wiring 7 is drawn out and grounded.
【００３４】図６は、本発明の液晶素子の他の実施形態
の等価回路を示す図であり、本実施形態においては、第
２のＴＦＴ２のゲート電極を、複数の前ラインの走査信
号線に接続して、当該前ラインに印加される走査信号に
よって制御する。従って、画素の放電期間は、書き込み
期間の２倍とすることができるため、放電時の液晶の応
答時間が長い場合には有効である。尚、本実施形態にお
いても、１ライン目及び２ライン目の画素の第２のＴＦ
Ｔのゲートの制御用に、１ライン目の走査信号線の手前
に別途信号線を設けても構わない。FIG. 6 is a diagram showing an equivalent circuit of another embodiment of the liquid crystal element of the present invention. In this embodiment, the gate electrode of the second TFT 2 is connected to a plurality of previous scanning signal lines. Connected, and controlled by a scanning signal applied to the previous line. Therefore, the discharge period of the pixel can be twice as long as the write period, and is effective when the response time of the liquid crystal during discharge is long. In the present embodiment, the second TFs of the pixels on the first and second lines are also used.
A separate signal line may be provided in front of the first scanning signal line for controlling the gate of T.
【００３５】尚、本実施形態においては、該第２のＴＦ
Ｔ２のゲート電極が複数の走査信号線に接続されている
ため、図６に示すように、第２のＴＦＴ２のゲート電極
と走査信号線の間に容量６１を接続しておくことによ
り、当該第２のＴＦＴ２がオンした際に、不要なライン
のＴＦＴがオンして誤動作するのを防止することができ
る。In this embodiment, the second TF
Since the gate electrode of T2 is connected to the plurality of scanning signal lines, by connecting a capacitor 61 between the gate electrode of the second TFT 2 and the scanning signal line as shown in FIG. When the second TFT 2 is turned on, it is possible to prevent a TFT on an unnecessary line from being turned on and malfunctioning.
【００３６】[0036]
【実施例】図２〜４に示す構成の液晶素子を作製した。
ａ−Ｓｉ層３２、４４としては、水素希釈のモノシラン
（ＳｉＨ4 ）をグロー放電分解法（プラズマＣＶＤ）
で、約３００℃の基板上に約２００ｎｍの厚みで堆積さ
せ、ゲート絶縁膜４３は窒化シリコン（ＳｉＮx ）をグ
ロー放電分解法（プラズマＣＶＤ）により形成した。ま
た、オーミックコンタクトのためのｎ+ ａ−Ｓｉ層４５
は、リンのドーピングにより形成した。さらに、約９ｐ
ｆの保持容量電極５８を形成した。本実施例では、液晶
としてチッソ社製反強誘電性液晶「ＣＳ４０００」を用
い、セル厚を１．５μｍとして螺旋ピッチを抑制し、強
誘電性配向状態と反強誘電性配向状態を安定に実現し
た。配向膜５２、５６としては、東レ社製「ＬＰ−６
４」を用いて膜厚を約１０ｎｍとし、図４に示すよう
に、上下基板でラビング方向が反平行になるようにラビ
ングした。EXAMPLE A liquid crystal device having the structure shown in FIGS.
As the a-Si layers 32 and 44, hydrogen-diluted monosilane (SiH 4 ) is glow discharge decomposition (plasma CVD).
The gate insulating film 43 was formed by glow discharge decomposition (plasma CVD) of silicon nitride (SiN x ). Also, an n + a-Si layer 45 for ohmic contact
Was formed by doping with phosphorus. In addition, about 9p
The storage capacitor electrode 58 of f was formed. In the present embodiment, the antiferroelectric liquid crystal "CS4000" manufactured by Chisso Co., Ltd. is used as the liquid crystal, the cell thickness is 1.5 μm, the helical pitch is suppressed, and the ferroelectric alignment state and the antiferroelectric alignment state are stably realized. did. As the alignment films 52 and 56, “LP-6” manufactured by Toray Industries, Inc.
The film was rubbed so that the rubbing direction was antiparallel between the upper and lower substrates as shown in FIG.
【００３７】上記液晶素子を、ゲートパルス幅を５００
μｓ、走査選択信号（ゲートオンパルス）の電圧を１６
Ｖ、情報信号電圧を±２〜８Ｖに設定して階調駆動した
ところ、安定した表示が実現した。The above-mentioned liquid crystal element is provided with a gate pulse width of 500
μs, the voltage of the scan selection signal (gate on pulse) is 16
When gradation driving was performed with V and the information signal voltage set to ± 2 to 8 V, stable display was realized.
【００３８】[0038]
【発明の効果】以上説明したように、本発明によれば、
アクティブマトリクス方式の液晶素子において、スイッ
チング素子にかかる負荷を低減することができ、該スイ
ッチング素子に要求される駆動能力を１／４に大幅に低
減することができるため、自発分極が大きい液晶におい
てもドメインウォールの安定性、電荷量の制御性を向上
し、開口率を大幅に犠牲にすることなく、高速でアクテ
ィブマトリクス駆動することが可能となる。さらに、自
発分極が大きく且つ中間調表示が可能な液晶を用いて、
安定した階調表示を実施することが可能となる。As described above, according to the present invention,
In the active matrix type liquid crystal element, the load on the switching element can be reduced, and the driving capability required for the switching element can be greatly reduced to 1/4. The stability of the domain wall and the controllability of the charge amount are improved, and high-speed active matrix driving can be performed without significantly sacrificing the aperture ratio. Furthermore, by using a liquid crystal having a large spontaneous polarization and capable of displaying halftones,
Stable gradation display can be performed.
【図１】本発明の液晶素子の一実施形態の１画素の等価
回路を示す図である。FIG. 1 is a diagram showing an equivalent circuit of one pixel of one embodiment of a liquid crystal element of the present invention.
【図２】本発明の液晶素子の一実施形態の等価回路を示
す図である。FIG. 2 is a diagram showing an equivalent circuit of one embodiment of the liquid crystal element of the present invention.
【図３】図２の等価回路を有する液晶素子の１画素の電
極構成を模式的に示す平面図である。FIG. 3 is a plan view schematically showing an electrode configuration of one pixel of a liquid crystal element having the equivalent circuit of FIG.
【図４】図２の液晶素子の１画素の断面模式図である。4 is a schematic cross-sectional view of one pixel of the liquid crystal element of FIG.
【図５】本発明の作用を説明するための図である。FIG. 5 is a diagram for explaining the operation of the present invention.
【図６】本発明の液晶素子の他の実施形態の等価回路を
示す図である。FIG. 6 is a diagram showing an equivalent circuit of another embodiment of the liquid crystal element of the present invention.
【図７】本発明に用い得る液晶の電圧−透過率特性を示
す図である。FIG. 7 is a diagram showing a voltage-transmittance characteristic of a liquid crystal that can be used in the present invention.
１ 第１のＴＦＴ ２ 第２のＴＦＴ ３ 第１のキャパシタンス ４ 第２のキャパシタンス ５、５ａ、５ｂ 走査信号線 ６ 情報信号線 ７ 配線 ３１ ゲート電極 ３２ ａ−Ｓｉ層 ３３ ソース電極 ３４ ドレイン電極 ４１ 第１の基板 ４２ ゲート電極 ４３ ゲート絶縁膜 ４４ ａ−Ｓｉ層 ４５ ｎ+ ａ−Ｓｉ層 ４６ ソース電極 ４７ ドレイン電極 ４８ 絶縁膜 ４９ パッシベーション膜 ５０ 第１の画素電極 ５１ 第２の画素電極 ５２ 配向膜 ５３ 第２の基板 ５４ 対向電極 ５５ 絶縁膜 ５６ 配向膜 ５７ 液晶 ５８ 保持容量電極 ６１ 容量DESCRIPTION OF SYMBOLS 1 1st TFT 2 2nd TFT 3 1st capacitance 4 2nd capacitance 5, 5a, 5b Scan signal line 6 Information signal line 7 Wiring 31 Gate electrode 32 a-Si layer 33 Source electrode 34 Drain electrode 41 1 substrate 42 gate electrode 43 gate insulating film 44 a-Si layer 45 n + a-Si layer 46 source electrode 47 drain electrode 48 insulating film 49 passivation film 50 first pixel electrode 51 second pixel electrode 52 alignment film 53 Second substrate 54 Counter electrode 55 Insulating film 56 Alignment film 57 Liquid crystal 58 Storage capacitance electrode 61 Capacitance
フロントページの続き (72)発明者 榎本 隆 東京都大田区下丸子３丁目30番２号 キヤ ノン株式会社内 (72)発明者 稲葉 豊 東京都大田区下丸子３丁目30番２号 キヤ ノン株式会社内 Ｆターム(参考） 2H092 JA26 JA29 JA33 JA38 JA42 JA47 JB02 JB13 JB14 JB23 JB32 JB38 JB42 JB54 JB57 JB63 JB69 KA05 KA07 KA12 KA24 MA05 MA08 MA13 MA17 MA27 MA31 MA34 MA35 MA37 MA41 NA07 NA22 NA23 NA25 NA27 NA29 PA06 QA12 QA18 2H093 NA16 NA23 NA33 NA42 NC09 NC16 NC34 NC40 NC67 ND09 ND22 ND37 ND43 NE03 NF16 NH05 Continuation of the front page (72) Inventor Takashi Enomoto 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Yutaka Inaba 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. F-term (reference) 2H092 JA26 JA29 JA33 JA38 JA42 JA47 JB02 JB13 JB14 JB23 JB32 JB38 JB42 JB54 JB57 JB63 JB69 KA05 KA07 KA12 KA24 MA05 MA08 MA13 MA17 MA27 MA31 MA34 MA35 MA37 MA41 NA07 NA12 NA23 NA23 NA23 NA23 NA23 NA33 NA42 NC09 NC16 NC34 NC40 NC67 ND09 ND22 ND37 ND43 NE03 NF16 NH05
Claims (7)
信号線、及び該信号線の交点を１画素として、各画素毎
に画素電極と第１のスイッチング素子を設けた第１の基
板と、各画素毎に電気的に独立した対向電極を設けた第
２の基板との間に自発分極を有する液晶を挟持してな
り、各画素において、上記画素電極が電気的に独立し且
つ第２のスイッチング素子によって相互に連結された複
数の領域からなり、該画素電極と対向電極によって、直
列接続された複数のキャパシタンスが上記第１のスイッ
チング素子の負荷として形成されていることを特徴とす
る液晶素子。A first substrate provided with a plurality of scanning signal lines and information signal lines orthogonal to each other and an intersection of the signal lines as one pixel, and a pixel electrode and a first switching element provided for each pixel; A liquid crystal having spontaneous polarization is sandwiched between a second substrate provided with an electrically independent counter electrode for each pixel. In each pixel, the pixel electrode is electrically independent and the second A liquid crystal device comprising a plurality of regions interconnected by a switching element, wherein a plurality of capacitances connected in series are formed as a load of the first switching element by the pixel electrode and the counter electrode. .
フを制御する信号線が、前ラインの画素の第１のスイッ
チング素子のオン・オフを制御する信号線に接続されて
いる請求項１記載の液晶素子。2. A signal line for controlling on / off of the second switching element is connected to a signal line for controlling on / off of a first switching element of a pixel on a previous line. Liquid crystal element.
フを制御する信号線が、複数の前ラインの画素の第１の
スイッチング素子のオン・オフを制御する信号線に接続
されている請求項２記載の液晶素子。3. A signal line for controlling on / off of said second switching element is connected to a signal line for controlling on / off of first switching elements of pixels on a plurality of previous lines. 2. The liquid crystal element according to 2.
フを制御する信号線が、前ラインの画素の第１のスイッ
チング素子のオン・オフを制御する信号線に容量を介し
て接続されている請求項２または３記載の液晶素子。4. A signal line for controlling on / off of the second switching element is connected via a capacitor to a signal line for controlling on / off of the first switching element of a pixel on the previous line. The liquid crystal device according to claim 2.
薄膜トランジスタである請求項１記載の液晶素子。5. The liquid crystal device according to claim 1, wherein said first and second switching elements are thin film transistors.
１記載の液晶素子。6. The liquid crystal device according to claim 1, wherein the liquid crystal is an antiferroelectric liquid crystal.
には第１の光透過率状態を、絶対値において各極性の所
定の飽和電圧値以上の電圧値においては第２の光透過率
状態を呈し、且つ、印加電圧値に応じて上記第１の光透
過率状態と第２の光透過率状態との間で連続的に光透過
率が変化する電圧−透過率特性を有する請求項１記載の
液晶素子。7. The liquid crystal displays a first light transmittance state when an applied voltage value is 0, and a second light transmittance state when an absolute value is equal to or higher than a predetermined saturation voltage value of each polarity. It has a voltage-transmittance characteristic in which a light transmittance state is exhibited and the light transmittance continuously changes between the first light transmittance state and the second light transmittance state according to an applied voltage value. The liquid crystal device according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18581598A JP4077935B2 (en) | 1998-07-01 | 1998-07-01 | Liquid crystal element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18581598A JP4077935B2 (en) | 1998-07-01 | 1998-07-01 | Liquid crystal element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000019559A true JP2000019559A (en) | 2000-01-21 |
| JP4077935B2 JP4077935B2 (en) | 2008-04-23 |
Family
ID=16177374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18581598A Expired - Fee Related JP4077935B2 (en) | 1998-07-01 | 1998-07-01 | Liquid crystal element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4077935B2 (en) |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004086129A1 (en) * | 2003-03-26 | 2004-10-07 | Samsung Electronics Co., Ltd. | Liquid crystal display and panel therefor |
| CN1296764C (en) * | 2003-06-11 | 2007-01-24 | 统宝光电股份有限公司 | Half penetrating and half reflecting LCD |
| CN100414418C (en) * | 2004-11-08 | 2008-08-27 | 夏普株式会社 | Substrate of liquid crystal display device and liquid crystal display device with the same substrate and driving method |
| CN100462784C (en) * | 2004-12-28 | 2009-02-18 | 夏普株式会社 | Substrate for liquid crystal display device, liquid crystal display device with same and drive method |
| KR100895307B1 (en) * | 2002-09-27 | 2009-05-07 | 삼성전자주식회사 | Liquid crystal display having a pixel including a plurality of subpixels |
| CN101162340B (en) * | 2007-11-21 | 2010-06-02 | 友达光电股份有限公司 | Pixel structure |
| CN101183196B (en) * | 2006-11-13 | 2010-06-16 | 中华映管股份有限公司 | Pixel |
| CN101241256B (en) * | 2008-03-11 | 2010-07-21 | 友达光电股份有限公司 | Pixel unit, liquid crystal display panel, photovoltaic device and process for production thereof |
| US7973899B2 (en) | 2004-12-03 | 2011-07-05 | Samsung Electronics Co., Ltd. | Thin film transistor array panel with capacitive coupling between adjacent pixel areas |
| KR101061857B1 (en) * | 2010-07-26 | 2011-09-02 | 삼성전자주식회사 | Liquid crystal display |
| US8194199B2 (en) | 2004-12-02 | 2012-06-05 | Samsung Electronics Co., Ltd. | Liquid crystal display device having a ratio of liquid crystal capacitances equal to a ratio of parasitic capacitances |
| KR101261612B1 (en) * | 2012-04-09 | 2013-05-06 | 삼성디스플레이 주식회사 | Liquid crystal display |
| US8477253B2 (en) | 2008-12-09 | 2013-07-02 | Samsung Display Co., Ltd. | Liquid crystal display |
| US8810606B2 (en) | 2004-11-12 | 2014-08-19 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| KR101480006B1 (en) | 2008-04-14 | 2015-01-13 | 삼성디스플레이 주식회사 | Liquid crystal display |
| KR101538320B1 (en) * | 2008-04-23 | 2015-07-23 | 삼성디스플레이 주식회사 | Display Apparatus |
-
1998
- 1998-07-01 JP JP18581598A patent/JP4077935B2/en not_active Expired - Fee Related
Cited By (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100895307B1 (en) * | 2002-09-27 | 2009-05-07 | 삼성전자주식회사 | Liquid crystal display having a pixel including a plurality of subpixels |
| US8054398B2 (en) | 2003-03-26 | 2011-11-08 | Samsung Electronics Co., Ltd. | Liquid crystal display and panel therefor |
| CN101893793B (en) * | 2003-03-26 | 2015-01-21 | 三星显示有限公司 | Liquid crystal display |
| WO2004086129A1 (en) * | 2003-03-26 | 2004-10-07 | Samsung Electronics Co., Ltd. | Liquid crystal display and panel therefor |
| US8953113B2 (en) | 2003-03-26 | 2015-02-10 | Samsung Display Co., Ltd. | Liquid crystal display and panel therefor |
| US9921447B2 (en) | 2003-03-26 | 2018-03-20 | Samsung Display Co., Ltd. | Liquid crystal display and panel therefor |
| CN1296764C (en) * | 2003-06-11 | 2007-01-24 | 统宝光电股份有限公司 | Half penetrating and half reflecting LCD |
| CN100414418C (en) * | 2004-11-08 | 2008-08-27 | 夏普株式会社 | Substrate of liquid crystal display device and liquid crystal display device with the same substrate and driving method |
| US8810606B2 (en) | 2004-11-12 | 2014-08-19 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| US9390669B2 (en) | 2004-11-12 | 2016-07-12 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| US9058787B2 (en) | 2004-11-12 | 2015-06-16 | Samsung Display Co., Ltd. | Display device and driving method thereof |
| US8194199B2 (en) | 2004-12-02 | 2012-06-05 | Samsung Electronics Co., Ltd. | Liquid crystal display device having a ratio of liquid crystal capacitances equal to a ratio of parasitic capacitances |
| US7973899B2 (en) | 2004-12-03 | 2011-07-05 | Samsung Electronics Co., Ltd. | Thin film transistor array panel with capacitive coupling between adjacent pixel areas |
| CN100462784C (en) * | 2004-12-28 | 2009-02-18 | 夏普株式会社 | Substrate for liquid crystal display device, liquid crystal display device with same and drive method |
| CN101183196B (en) * | 2006-11-13 | 2010-06-16 | 中华映管股份有限公司 | Pixel |
| CN101162340B (en) * | 2007-11-21 | 2010-06-02 | 友达光电股份有限公司 | Pixel structure |
| CN101241256B (en) * | 2008-03-11 | 2010-07-21 | 友达光电股份有限公司 | Pixel unit, liquid crystal display panel, photovoltaic device and process for production thereof |
| KR101480006B1 (en) | 2008-04-14 | 2015-01-13 | 삼성디스플레이 주식회사 | Liquid crystal display |
| KR101538320B1 (en) * | 2008-04-23 | 2015-07-23 | 삼성디스플레이 주식회사 | Display Apparatus |
| US8477253B2 (en) | 2008-12-09 | 2013-07-02 | Samsung Display Co., Ltd. | Liquid crystal display |
| US9500898B2 (en) | 2008-12-09 | 2016-11-22 | Samsung Display Co., Ltd. | Liquid crystal display |
| KR101061857B1 (en) * | 2010-07-26 | 2011-09-02 | 삼성전자주식회사 | Liquid crystal display |
| KR101261612B1 (en) * | 2012-04-09 | 2013-05-06 | 삼성디스플레이 주식회사 | Liquid crystal display |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4077935B2 (en) | 2008-04-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6243064B1 (en) | Active matrix type liquid-crystal display unit and method of driving the same | |
| US4747671A (en) | Ferroelectric optical modulation device and driving method therefor wherein electrode has delaying function | |
| US4973135A (en) | Active matrix display panel having plural stripe-shaped counter electrodes and method of driving the same | |
| US5691783A (en) | Liquid crystal display device and method for driving the same | |
| US5227900A (en) | Method of driving ferroelectric liquid crystal element | |
| US6219019B1 (en) | Liquid crystal display apparatus and method for driving the same | |
| JP3634249B2 (en) | Liquid crystal display device and display method thereof | |
| KR100297663B1 (en) | Method of driving an active matrix type display device | |
| JP2000019559A (en) | Liquid crystal element | |
| JP3406772B2 (en) | Active matrix type liquid crystal display | |
| US20060017679A1 (en) | Driving method of active matrix display device | |
| US6069600A (en) | Active matrix type liquid crystal display | |
| US5541747A (en) | Electro-optical device utilizing a liquid crystal having a spontaneous polarization | |
| EP0542518B1 (en) | Liquid crystal element and driving method thereof | |
| JP3228401B2 (en) | Liquid crystal display device and driving method thereof | |
| JPH10123482A (en) | Active matrix type liquid crystal display device and its driving system | |
| US6195137B1 (en) | Liquid crystal apparatus | |
| EP0448032B1 (en) | Method of driving ferroelectric liquid crystal element and ferroelectric liquid crystal display | |
| US6232943B1 (en) | Liquid crystal display | |
| JP3724163B2 (en) | Liquid crystal display element and liquid crystal display device | |
| JP3530767B2 (en) | Driving method of liquid crystal element | |
| JPS6057391A (en) | Driving of liquid crystal display unit | |
| JP3123704B2 (en) | Liquid crystal display device using liquid crystal with spontaneous polarization | |
| JP2000035593A (en) | Active matrix type liquid crystal display device and its driving method | |
| JPS60203920A (en) | Driving method of liquid crystal optical element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20041005 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20061120 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070619 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070809 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080122 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080204 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110208 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120208 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130208 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140208 Year of fee payment: 6 |
|
| LAPS | Cancellation because of no payment of annual fees |