JP2000004424A - Video signal processing method and processor therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate a fault such as facial flicker in an excellent way. SOLUTION: A video signal of a standard television signal from an input terminal 1 is fed to a double speed signal processing circuit 3 through a color decoder circuit 2 and a video signal of a double speed noninterlace television signal from an input terminal 4 is fed to a color decoder circuit 5. A switch 6 selects the signals from the circuits 3, 5 and gives them to field memories (FM)7, 8. Then a switch 9 selects the video signals from the input terminals 1, 4 and gives them to a synchronizing separator circuit 10. Separated horizontal synchronizing signal and vertical synchronizing signal are fed to a memory control section 11. The control section 11 controls the switch 6 so that the video signal selected by the switch 6 is written alternately in the FM 7, 8 at an interval of one scanning line. Furthermore, the video signals in the FM 7, 8 are alternately read based on a frequency that is twice the frequency of the vertical synchronizing signal through the control and a switch 12 selects the read video signal and gives it to a matrix block 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video system which is suitable for use in resolving a screen flicker which is a problem when receiving a video signal of a standard television system based on a CCIR system (PAL system, SECAM system, etc.). The present invention relates to a signal processing method and apparatus.

[0002]

2. Description of the Related Art The so-called CCIR method (PAL method, S
In a video signal of a standard television system (e.g., ECAM system), since a field (vertical) frequency constituting the screen is, for example, 50 Hz, a problem of so-called surface flicker that causes flickering of the screen in visual perception occurs. ing. Therefore, conventionally, various means for eliminating the surface flicker by doubling the vertical frequency by some method have been studied.

That is, for example, when there is a field A screen as shown in FIG. 4A and a field B screen, the fields A and B screens are repeated twice, for example, as shown in FIG. 4B. And vertical frequency of 2
Double it. As a result, the screens of the above-described fields A and B are displayed at twice the vertical frequency, for example, (AABB...), And the screen flicker is eliminated.

However, according to this means, the flicker component of each scanning line included in the original video signal does not double the frequency of its own change. Therefore, even by this means, such flicker for each scanning line cannot be eliminated.

On the other hand, by changing the order of the screens of the fields A and B, which are repeated twice each, the screen formed for each vertical period as shown in FIG. On screens A and B (ABAB ...
・) Is also considered. According to this, the frequency of the flicker component for each scanning line included in the original video signal is also doubled, and the flicker for each scanning line can be eliminated.

However, in this method, the order of the fields of the original video signal is switched, so that a time reversal phenomenon may occur in a moving image. For this reason, there is a possibility that the movement may be blurred and may be unnatural.

Therefore, for the purpose of further solving the above-mentioned problem, for example, a still image portion and a moving image portion on the screen are discriminated. In the still image portion, for example, the order of the screens in the fields A and B is changed, and in the moving image portion, an intermediate scanning line is formed by, for example, an average value of upper and lower scanning lines. Furthermore, these are combined to form an intermediate screen.

That is, for example, when there is a field A screen and a field B screen as shown in FIG. 5A, here, FIG.
Is an example of the conversion for repeating the screen twice to double the vertical frequency.

Therefore, in FIG. 5C, for example, the order of the screens of the fields A and B is changed in a still image portion. On the other hand, in the moving image portion, as shown in the figure, for example, the signals of the upper and lower scanning lines are added by 1/2 each to form an intermediate scanning line. These are combined to form an intermediate screen. In the moving image portion, median interpolation may be performed by using three surrounding points, for example, as shown in FIG. 5D.

However, when using such means,
It is difficult to set an appropriate level for discriminating the above-described still image portion and moving image portion. For this reason, depending on the set value, the resolution of the image may be degraded or the motion may become unnatural.

That is, in the example of FIG. 5C described above,
Since the average value of the upper and lower scanning lines is used in the moving image portion, the vertical resolution of this portion is degraded. In the example of FIG. 5D, the order of the fields of the signals used for the interpolation is changed, so that a time reversal phenomenon occurs and the motion may become unnatural.

[0012]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and the problem to be solved is that flicker for each scanning line cannot be eliminated by conventional means, In addition, it is difficult to set an appropriate level for discriminating between a still image portion and a moving image portion, and there is a risk that the resolution of the image is degraded and the motion becomes unnatural due to the time reversal phenomenon. It will happen.

[0013]

Therefore, in the present invention, the number of scanning lines is doubled, or the number of scanning lines is converted to the number of scanning lines. Are alternately taken out every other line to form each screen. According to this, it is possible to perform conversion to double an appropriate vertical frequency with a simple configuration, and to achieve surface flicker. And the like can be satisfactorily resolved.

[0014]

That is, in the first embodiment of the present invention, the number of scanning lines in each field of a video signal of the standard television system is doubled, or the number of scanning lines in each field is changed. Is supplied, and twice as many scanning lines are alternately taken out and written to the first and second memories, respectively, and written to the first and second memories. Each of the read video signals is read out and the vertical frequency is doubled.

In the second embodiment of the present invention, the number of scanning lines in each field of the video signal of the standard television system is doubled, or the number of scanning lines in each field is doubled. Means for receiving the video signal, and alternately taking out twice as many scanning lines from the video signal alternately;
First and second memories to which the extracted scanning lines are respectively written, control means for controlling writing and reading of the first and second memories, and reading of the first and second memories by the memory control means. And a synchronizing signal forming means for forming a synchronizing signal necessary for display.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of an example of a video signal processing device according to the present invention.

In FIG. 1, an input terminal 1 is supplied with a video signal of a standard television system (PAL system, SECAM system, NTSC system, etc.). The video signal from the input terminal 1 is supplied to a color decoder circuit 2 compatible with the above-described standard television system. The luminance (Y) and chromaticity (U) decoded by the color decoder circuit 2
/ V) signal is supplied to a double-speed signal processing circuit 3 which doubles the number of scanning lines in each field as described later.

The doubled-speed signal processing circuit 3 converts the number of scanning lines of each field of the supplied standard television video signal to double, for example. Such a double speed signal processing circuit 3 has already been put to practical use as a means for displaying a video signal of the standard television system on a high definition receiver, for example.

The input terminal 4 is supplied with, for example, a video signal of a double-speed sequential television signal in which the number of scanning lines in each field is doubled. The video signal from the input terminal 4 is supplied to a corresponding color decoder circuit 5, where the video signal is decoded and luminance (Y) and chromaticity (U / V) are decoded.
A signal is formed. The signal from the color decoder circuit 5 and the signal from the above-mentioned double speed signal processing circuit 3 are selected by the switch 6 and supplied to the field memories (FM) 7 and 8.

Further, video signals from the input terminals 1 and 4 are selected by the switch 9 and supplied to the sync separation circuit 10.
The horizontal / vertical synchronization signals separated by the synchronization separation circuit 10 are supplied to the memory control unit 11. In the memory control unit 11, the video signal from the double-speed signal processing circuit 3 or the color decoder circuit 5 selected by the switch 6 is alternately applied to the field memory 7 for every other scanning line.
8 is controlled.

Further, these field memories 7, 8 are:
The data is alternately read by the read control from the memory control unit 11 in which the vertical frequency is doubled. That is, from the field memories 7 and 8, reading is performed alternately so that all the video signals written to one are read and then all the other video signals are read. As a result, video signals obtained by converting the vertical frequency of the video signal of the above-described standard television system to twice are alternately extracted from the field memories 7 and 8.

Further, video signals read from these field memories 7 and 8 are selected by a switch 12 and supplied to a matrix block 13. Further, the horizontal / vertical synchronizing signal from the synchronizing / separating circuit 10 and the control signal from the memory controller 11 are supplied to a synchronizing signal generating circuit 14 to form a horizontal / vertical synchronizing signal having a double frequency. The horizontal / vertical synchronization signal from the synchronization signal generation circuit 11 is supplied to the matrix block 13.

Thus, the matrix block 13
Since the horizontal and vertical synchronizing signals of the above-mentioned double frequency are superimposed on the video signal obtained by converting the vertical frequency of the above-mentioned video signal of the standard television system to twice, for example, three primary colors (R / G / B) ) Is extracted in the form of a video signal separated.

That is, in this device, the field memories 7 and 8 receive the video signal obtained by converting the number of scanning lines from the double-speed signal processing circuit 3 or the color decoder circuit 5 to twice as shown in FIG. Supplied to On the other hand, in the field memory 7, only the even-numbered scanning lines of the video signal are written as shown in FIG. In the field memory 8, only the odd-numbered scanning lines of the video signal are written as shown in FIG.

Further, these field memories 7, 8
Are read out, for example, as indicated by D and E in FIG. As a result, video signals whose vertical frequency has been doubled as shown are alternately taken out from the field memories 7 and 8. And these video signals are switched 1
By selecting at 2, the video signal whose vertical frequency has been doubled, for example, as shown at F in FIG. 2, is extracted.

FIG. 3A shows the positions of the scanning lines of the original signal in the odd (ODD) and even (EVEN) fields. The original signal is supplied to, for example, a doubled signal processing circuit 3 to form a doubled signal (indicating the position of the scanning line) as shown in FIG. 3B, for example. This signal is supplied from the color decoder circuit 5 from the beginning. Therefore, by taking out this signal every other scanning line, a video signal whose vertical frequency is doubled as shown in FIG. 3C is formed.

In this case, the double speed signal processing circuit 3
Or the number of scanning lines supplied to the input terminal 4 is 2
Since two screens are formed from the doubled video signal, there is no possibility that a time reversal phenomenon occurs between these screens. Further, in the above-mentioned double speed signal processing circuit 3 which has been put into practical use, the number of scanning lines is converted with extremely high performance, so that there is no fear of deterioration in vertical resolution due to this conversion, and flicker for each scanning line is also eliminated. Is what is done.

Therefore, in this apparatus, the number of scanning lines is doubled, or the video signal whose number of scanning lines is doubled is alternately taken out every other scanning line of this video signal. By forming the respective screens by using a simple configuration, it is possible to perform the conversion for doubling the appropriate vertical frequency with a simple configuration, and it is possible to satisfactorily eliminate obstacles such as surface flicker.

As a result, flicker for each scanning line cannot be eliminated by the conventional means, or it is difficult to set an appropriate level for discriminating between a still image portion and a moving image portion, and the resolution of the image is reduced. According to the present invention, it is possible to easily solve these problems that may have deteriorated or the movement becomes unnatural due to the time reversal phenomenon.

In the above-mentioned apparatus, in particular, CCIR
It is effective when receiving a video signal of a standard television system according to the standard (PAL system, SECAM system, etc.), but is also effective when receiving a video signal of a standard television system of the so-called NTSC system. There is something.

According to the video signal processing method and apparatus described above, the number of scanning lines in each field of the video signal of the standard television system is doubled or the number of scanning lines in each field is doubled. Video signal is supplied, and 2
Double the number of scanning lines are alternately taken out and written to the first and second memories, respectively.
And by reading the video signal written in the second memory and converting the vertical frequency to twice, it is possible to perform an appropriate conversion to double the vertical frequency with a simple configuration, and to achieve surface flicker and the like. Can be satisfactorily resolved.

[0032]

Therefore, according to the first and second aspects of the present invention,
Converting the number of scanning lines to double, or for a video signal whose number of scanning lines has been doubled, alternately taking out every other scanning line of this video signal to form each screen With this configuration, it is possible to perform conversion to double an appropriate vertical frequency with a simple configuration, and to satisfactorily eliminate obstacles such as surface flicker.

As a result, the flicker for each scanning line cannot be eliminated by the conventional means, or it is difficult to set an appropriate level for discriminating between a still image portion and a moving image portion, and the image resolution is reduced. According to the present invention, it is possible to easily solve these problems that may have deteriorated or the movement becomes unnatural due to the time reversal phenomenon.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of a video signal processing device to which the present invention is applied.

FIG. 2 is a diagram for explaining the operation.

FIG. 3 is a diagram for explaining this.

FIG. 4 is a diagram for explaining conventional video signal processing.

FIG. 5 is a diagram for explaining this.

[Explanation of symbols]

1 ... input terminal of video signal of standard television system, 2
5 ... color decoder circuit, 3 ... double speed signal processing circuit, 4
... Input terminal for video signal of double speed sequential television signal,
6, 9, 12 ... switch, 7, 8 ... field memory,
Reference numeral 10: synchronization separation circuit, 11: memory control unit, 13: matrix block, 14: synchronization signal generation circuit

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Masaharu Tokuhara 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) 5C063 AA03 AA04 BA03 BA09 CA01 CA14 CA16 CA38

Claims (2)

[Claims] 1. A video signal in which the number of scanning lines in each field of a video signal of a standard television system is doubled or a video signal in which the number of scanning lines in each field is doubled is supplied. A number of scanning lines are alternately taken out and written to the first and second memories, respectively, and the video signals written to these first and second memories are read out to double the vertical frequency. A video signal processing method characterized in that the video signal is converted into a video signal. 2. A video signal in which the number of scanning lines in each field of a video signal of the standard television system is doubled or a video signal in which the number of scanning lines in each field is doubled is supplied. Means for alternately taking out the doubled scanning lines every other line; first and second memories to which the taken out scanning lines are respectively written; and control of writing and reading of the first and second memories A video signal processing apparatus, comprising: a control unit for performing a synchronization signal necessary for display in accordance with reading of the first and second memories by the memory control unit.