ITVI20120237A1 - Metodo per formare una microstruttura comprendente polimeri conduttivi - Google Patents
Metodo per formare una microstruttura comprendente polimeri conduttiviInfo
- Publication number
- ITVI20120237A1 ITVI20120237A1 IT000237A ITVI20120237A ITVI20120237A1 IT VI20120237 A1 ITVI20120237 A1 IT VI20120237A1 IT 000237 A IT000237 A IT 000237A IT VI20120237 A ITVI20120237 A IT VI20120237A IT VI20120237 A1 ITVI20120237 A1 IT VI20120237A1
- Authority
- IT
- Italy
- Prior art keywords
- forming
- conductive polymers
- including conductive
- microstructure including
- microstructure
- Prior art date
Links
- 229920001940 conductive polymer Polymers 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
- H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
- H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT000237A ITVI20120237A1 (it) | 2012-09-25 | 2012-09-25 | Metodo per formare una microstruttura comprendente polimeri conduttivi |
US14/032,067 US9099529B2 (en) | 2012-09-25 | 2013-09-19 | Method of forming a conductive polymer microstructure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT000237A ITVI20120237A1 (it) | 2012-09-25 | 2012-09-25 | Metodo per formare una microstruttura comprendente polimeri conduttivi |
Publications (1)
Publication Number | Publication Date |
---|---|
ITVI20120237A1 true ITVI20120237A1 (it) | 2014-03-26 |
Family
ID=47226364
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT000237A ITVI20120237A1 (it) | 2012-09-25 | 2012-09-25 | Metodo per formare una microstruttura comprendente polimeri conduttivi |
Country Status (2)
Country | Link |
---|---|
US (1) | US9099529B2 (it) |
IT (1) | ITVI20120237A1 (it) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007110671A2 (en) * | 2006-03-29 | 2007-10-04 | Plastic Logic Limited | Techniques for device fabrication with self-aligned electrodes |
WO2008122774A1 (en) * | 2007-04-04 | 2008-10-16 | Cambridge Display Technology Limited | Organic thin film transistors |
US20100090221A1 (en) * | 2006-10-03 | 2010-04-15 | Plastic Logic Limited | Distortion tolerant processing |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6817293B2 (en) * | 2001-03-28 | 2004-11-16 | Dainippon Printing Co., Ltd. | Patterning method with micro-contact printing and its printed product |
US6955939B1 (en) * | 2003-11-03 | 2005-10-18 | Advanced Micro Devices, Inc. | Memory element formation with photosensitive polymer dielectric |
WO2007087900A1 (en) * | 2006-02-02 | 2007-08-09 | The European Community, Represented By The European Commission | Process for controlling surface wettability |
KR101043832B1 (ko) * | 2008-03-11 | 2011-06-22 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
-
2012
- 2012-09-25 IT IT000237A patent/ITVI20120237A1/it unknown
-
2013
- 2013-09-19 US US14/032,067 patent/US9099529B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007110671A2 (en) * | 2006-03-29 | 2007-10-04 | Plastic Logic Limited | Techniques for device fabrication with self-aligned electrodes |
US20100090221A1 (en) * | 2006-10-03 | 2010-04-15 | Plastic Logic Limited | Distortion tolerant processing |
WO2008122774A1 (en) * | 2007-04-04 | 2008-10-16 | Cambridge Display Technology Limited | Organic thin film transistors |
Non-Patent Citations (4)
Title |
---|
DEFRANCO J A ET AL: "Photolithographic patterning of organic electronic materials", ORGANIC ELECTRONICS, ELSEVIER, AMSTERDAM, NL, vol. 7, no. 1, 18 November 2005 (2005-11-18), pages 22 - 28, XP024972748, ISSN: 1566-1199, [retrieved on 20060201], DOI: 10.1016/J.ORGEL.2005.10.002 * |
MACAYA ET AL: "Simple glucose sensors with micromolar sensitivity based on organic electrochemical transistors", SENSORS AND ACTUATORS B: CHEMICAL: INTERNATIONAL JOURNAL DEVOTED TO RESEARCH AND DEVELOPMENT OF PHYSICAL AND CHEMICAL TRANSDUCERS, ELSEVIER S.A, SWITZERLAND, vol. 123, no. 1, 30 March 2007 (2007-03-30), pages 374 - 378, XP022011222, ISSN: 0925-4005, DOI: 10.1016/J.SNB.2006.08.038 * |
WANG J ET AL: "Low-cost fabrication of submicron all polymer field effect transistors", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 88, no. 13, 29 March 2006 (2006-03-29), pages 133502 - 133502, XP012080873, ISSN: 0003-6951, DOI: 10.1063/1.2191088 * |
YOUNG SHIM, N., BERNARDS, D.A., MACAYA, D.J., DEFRANCO, J.A., NIKOLOU, M., OWENS, R.M., MALLIARAS, G.G.: "All-Plastic Electrochemical Transistor for Glucose Sensing Using a Ferrocene Mediator", SENSORS, vol. 9, 4 December 2009 (2009-12-04), pages 9896 - 9902, XP002697300 * |
Also Published As
Publication number | Publication date |
---|---|
US20140087552A1 (en) | 2014-03-27 |
US9099529B2 (en) | 2015-08-04 |
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