ITRM20040230A1 - Sistemi e metodi per scrivere errori in dati per facilitare verifica di funzionalita' di revelazione di errori o codice di correzione. - Google Patents
Sistemi e metodi per scrivere errori in dati per facilitare verifica di funzionalita' di revelazione di errori o codice di correzione.Info
- Publication number
- ITRM20040230A1 ITRM20040230A1 IT000230A ITRM20040230A ITRM20040230A1 IT RM20040230 A1 ITRM20040230 A1 IT RM20040230A1 IT 000230 A IT000230 A IT 000230A IT RM20040230 A ITRM20040230 A IT RM20040230A IT RM20040230 A1 ITRM20040230 A1 IT RM20040230A1
- Authority
- IT
- Italy
- Prior art keywords
- revelation
- error
- functions
- systems
- methods
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
- H04L1/241—Testing correct operation using pseudo-errors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/435,147 US7401269B2 (en) | 2003-05-10 | 2003-05-10 | Systems and methods for scripting data errors to facilitate verification of error detection or correction code functionality |
Publications (1)
Publication Number | Publication Date |
---|---|
ITRM20040230A1 true ITRM20040230A1 (it) | 2004-08-10 |
Family
ID=33416880
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT000230A ITRM20040230A1 (it) | 2003-05-10 | 2004-05-10 | Sistemi e metodi per scrivere errori in dati per facilitare verifica di funzionalita' di revelazione di errori o codice di correzione. |
Country Status (2)
Country | Link |
---|---|
US (1) | US7401269B2 (it) |
IT (1) | ITRM20040230A1 (it) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7406628B2 (en) * | 2003-07-15 | 2008-07-29 | Seagate Technology Llc | Simulated error injection system in target device for testing host system |
US8181100B1 (en) * | 2008-02-07 | 2012-05-15 | Marvell International Ltd. | Memory fault injection |
US20060277444A1 (en) * | 2005-06-03 | 2006-12-07 | Nicholas Holian | Recordation of error information |
US8411662B1 (en) | 2005-10-04 | 2013-04-02 | Pico Mobile Networks, Inc. | Beacon based proximity services |
US7827445B2 (en) * | 2007-12-19 | 2010-11-02 | International Business Machines Corporation | Fault injection in dynamic random access memory modules for performing built-in self-tests |
US8438452B2 (en) * | 2008-12-29 | 2013-05-07 | Intel Corporation | Poison bit error checking code scheme |
US20100306591A1 (en) * | 2009-06-01 | 2010-12-02 | Murali Mallela Krishna | Method and system for performing testing on a database system |
TWI442406B (zh) * | 2009-07-02 | 2014-06-21 | Silicon Motion Inc | 針對一快閃記憶體的控制器之錯誤管理機制來提升驗證效率之方法以及相關之記憶裝置及其控制器 |
US9380401B1 (en) | 2010-02-03 | 2016-06-28 | Marvell International Ltd. | Signaling schemes allowing discovery of network devices capable of operating in multiple network modes |
US8271932B2 (en) | 2010-06-24 | 2012-09-18 | International Business Machines Corporation | Hierarchical error injection for complex RAIM/ECC design |
US8589759B2 (en) | 2010-10-01 | 2013-11-19 | Hamilton Sundstrand Corporation | RAM single event upset (SEU) method to correct errors |
US10388396B2 (en) | 2014-08-25 | 2019-08-20 | Rambus Inc. | Buffer circuit with adaptive repair capability |
KR102324769B1 (ko) | 2015-06-29 | 2021-11-10 | 삼성전자주식회사 | 반도체 메모리 장치의 에러 정정 회로, 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 |
US9996439B2 (en) * | 2015-09-23 | 2018-06-12 | Qualcomm Incorporated | Self-error injection technique for point-to-point interconnect to increase test coverage |
US11328274B2 (en) | 2020-07-28 | 2022-05-10 | Bank Of America Corporation | Data processing system and method for managing electronic split transactions using user profiles |
US20240070014A1 (en) * | 2022-08-26 | 2024-02-29 | Micron Technology, Inc. | Commands for testing error correction in a memory device |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4612640A (en) * | 1984-02-21 | 1986-09-16 | Seeq Technology, Inc. | Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array |
US4999837A (en) * | 1989-03-20 | 1991-03-12 | International Business Machines Corporation | Programmable channel error injection |
US6539503B1 (en) * | 1999-11-23 | 2003-03-25 | Hewlett-Packard Company | Method and apparatus for testing error detection |
US6799287B1 (en) * | 2000-05-01 | 2004-09-28 | Hewlett-Packard Development Company, L.P. | Method and apparatus for verifying error correcting codes |
US6886116B1 (en) * | 2001-07-26 | 2005-04-26 | Emc Corporation | Data storage system adapted to validate error detection logic used in such system |
EP1547252A4 (en) * | 2002-07-29 | 2011-04-20 | Robert Halford | MULTIDIMENSIONAL DATA PROTECTION AND MIRRORING METHOD FOR MICROBIAL DATA |
US20040225944A1 (en) * | 2003-05-09 | 2004-11-11 | Brueggen Christopher M. | Systems and methods for processing an error correction code word for storage in memory components |
-
2003
- 2003-05-10 US US10/435,147 patent/US7401269B2/en not_active Expired - Fee Related
-
2004
- 2004-05-10 IT IT000230A patent/ITRM20040230A1/it unknown
Also Published As
Publication number | Publication date |
---|---|
US7401269B2 (en) | 2008-07-15 |
US20040225932A1 (en) | 2004-11-11 |
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