ITRM20030039A1 - Sblocco di registro di protezione per chip. - Google Patents

Sblocco di registro di protezione per chip.

Info

Publication number
ITRM20030039A1
ITRM20030039A1 IT000039A ITRM20030039A ITRM20030039A1 IT RM20030039 A1 ITRM20030039 A1 IT RM20030039A1 IT 000039 A IT000039 A IT 000039A IT RM20030039 A ITRM20030039 A IT RM20030039A IT RM20030039 A1 ITRM20030039 A1 IT RM20030039A1
Authority
IT
Italy
Prior art keywords
chip
release
protection register
register
protection
Prior art date
Application number
IT000039A
Other languages
English (en)
Inventor
Pietro Piersimoni
Pasquale Pistilli
Tommaso Vali
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to IT000039A priority Critical patent/ITRM20030039A1/it
Publication of ITRM20030039A0 publication Critical patent/ITRM20030039A0/it
Priority to US10/698,752 priority patent/US6947323B2/en
Publication of ITRM20030039A1 publication Critical patent/ITRM20030039A1/it
Priority to US11/170,880 priority patent/US7145799B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Storage Device Security (AREA)
  • Read Only Memory (AREA)
IT000039A 2003-01-30 2003-01-30 Sblocco di registro di protezione per chip. ITRM20030039A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT000039A ITRM20030039A1 (it) 2003-01-30 2003-01-30 Sblocco di registro di protezione per chip.
US10/698,752 US6947323B2 (en) 2003-01-30 2003-10-31 Chip protection register unlocking
US11/170,880 US7145799B2 (en) 2003-01-30 2005-06-30 Chip protection register unlocking

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000039A ITRM20030039A1 (it) 2003-01-30 2003-01-30 Sblocco di registro di protezione per chip.

Publications (2)

Publication Number Publication Date
ITRM20030039A0 ITRM20030039A0 (it) 2003-01-30
ITRM20030039A1 true ITRM20030039A1 (it) 2004-07-31

Family

ID=29765637

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000039A ITRM20030039A1 (it) 2003-01-30 2003-01-30 Sblocco di registro di protezione per chip.

Country Status (2)

Country Link
US (2) US6947323B2 (it)
IT (1) ITRM20030039A1 (it)

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US9324100B2 (en) 2002-02-05 2016-04-26 Square, Inc. Card reader with asymmetric spring
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US7987358B1 (en) * 2006-06-09 2011-07-26 Xilinx, Inc. Methods of authenticating a user design in a programmable integrated circuit
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US9619797B2 (en) 2010-10-13 2017-04-11 Square, Inc. Payment methods with a payment service and tabs selected by a first party and opened by a second party at an geographic location of the first party's mobile device
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US9576159B1 (en) 2011-01-24 2017-02-21 Square, Inc. Multiple payment card reader system
US10475024B1 (en) 2012-10-15 2019-11-12 Square, Inc. Secure smart card transactions
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US9940616B1 (en) 2013-03-14 2018-04-10 Square, Inc. Verifying proximity during payment transactions
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US8967465B1 (en) 2013-11-27 2015-03-03 Square, Inc. Audio signaling training for bidirectional communications
US9633236B1 (en) 2013-12-11 2017-04-25 Square, Inc. Power harvesting in reader devices
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US6948041B2 (en) * 2002-10-24 2005-09-20 Micron Technology, Inc. Permanent memory block protection in a flash memory device
ITRM20030039A1 (it) * 2003-01-30 2004-07-31 Micron Technology Inc Sblocco di registro di protezione per chip.

Also Published As

Publication number Publication date
ITRM20030039A0 (it) 2003-01-30
US6947323B2 (en) 2005-09-20
US7145799B2 (en) 2006-12-05
US20040151026A1 (en) 2004-08-05
US20050237804A1 (en) 2005-10-27

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