ITMI20062068A1 - Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi - Google Patents

Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi

Info

Publication number
ITMI20062068A1
ITMI20062068A1 IT002068A ITMI20062068A ITMI20062068A1 IT MI20062068 A1 ITMI20062068 A1 IT MI20062068A1 IT 002068 A IT002068 A IT 002068A IT MI20062068 A ITMI20062068 A IT MI20062068A IT MI20062068 A1 ITMI20062068 A1 IT MI20062068A1
Authority
IT
Italy
Prior art keywords
eeprom
type memories
polarization circuit
shared latch
latch
Prior art date
Application number
IT002068A
Other languages
English (en)
Inventor
Antonino Conte
Costantini Diego De
Giudice Gianbattista Lo
Giovanni Matranga
Mario Micciche
Carmelo Ucciardello
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT002068A priority Critical patent/ITMI20062068A1/it
Priority to US11/977,876 priority patent/US7742342B2/en
Publication of ITMI20062068A1 publication Critical patent/ITMI20062068A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
IT002068A 2006-10-27 2006-10-27 Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi ITMI20062068A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT002068A ITMI20062068A1 (it) 2006-10-27 2006-10-27 Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi
US11/977,876 US7742342B2 (en) 2006-10-27 2007-10-26 Biasing circuit for EEPROM memories with shared latches

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT002068A ITMI20062068A1 (it) 2006-10-27 2006-10-27 Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi

Publications (1)

Publication Number Publication Date
ITMI20062068A1 true ITMI20062068A1 (it) 2008-04-28

Family

ID=39329900

Family Applications (1)

Application Number Title Priority Date Filing Date
IT002068A ITMI20062068A1 (it) 2006-10-27 2006-10-27 Circuito di polarizzazione per memorie di tipo eeprom con latch condivisi

Country Status (2)

Country Link
US (1) US7742342B2 (it)
IT (1) ITMI20062068A1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102117644B (zh) * 2009-12-30 2013-09-11 中国科学院微电子研究所 一种存储器读出电路
ITTO20120192A1 (it) * 2012-03-05 2013-09-06 St Microelectronics Srl Architettura e metodo di decodifica per dispositivi di memoria non volatile a cambiamento di fase
US10706928B2 (en) * 2018-07-24 2020-07-07 Stmicroelectronics (Rousset) Sas Non-volatile static random access memory architecture having single non-volatile bit per volatile memory bit
US10614879B2 (en) 2018-07-24 2020-04-07 Stmicroelectronics (Rousset) Sas Extended write modes for non-volatile static random access memory architectures having word level switches

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2824413B1 (fr) * 2001-05-07 2003-07-25 St Microelectronics Sa Architecture de memoire non volatile et circuit integre comportant une memoire correspondante

Also Published As

Publication number Publication date
US20080101125A1 (en) 2008-05-01
US7742342B2 (en) 2010-06-22

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