IT981193B - Processo perfezionato per diffon dere impurita in un materiale semiconduttore - Google Patents
Processo perfezionato per diffon dere impurita in un materiale semiconduttoreInfo
- Publication number
- IT981193B IT981193B IT21302/73A IT2130273A IT981193B IT 981193 B IT981193 B IT 981193B IT 21302/73 A IT21302/73 A IT 21302/73A IT 2130273 A IT2130273 A IT 2130273A IT 981193 B IT981193 B IT 981193B
- Authority
- IT
- Italy
- Prior art keywords
- impurities
- differ
- semiconductor material
- process perfected
- perfected
- Prior art date
Links
- 239000012535 impurity Substances 0.000 title 1
- 239000000463 material Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
- C30B31/02—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/92—Controlling diffusion profile by oxidation
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US00241821A US3806382A (en) | 1972-04-06 | 1972-04-06 | Vapor-solid impurity diffusion process |
Publications (1)
Publication Number | Publication Date |
---|---|
IT981193B true IT981193B (it) | 1974-10-10 |
Family
ID=22912318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT21302/73A IT981193B (it) | 1972-04-06 | 1973-03-08 | Processo perfezionato per diffon dere impurita in un materiale semiconduttore |
Country Status (7)
Country | Link |
---|---|
US (1) | US3806382A (it) |
JP (1) | JPS5321835B2 (it) |
CA (1) | CA980665A (it) |
DE (1) | DE2316520C3 (it) |
FR (1) | FR2178984B1 (it) |
GB (1) | GB1397684A (it) |
IT (1) | IT981193B (it) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3972838A (en) * | 1973-11-01 | 1976-08-03 | Denki Kagaku Kogyo Kabushiki Kaisha | Composition for diffusing phosphorus |
DE2453134C3 (de) * | 1974-11-08 | 1983-02-10 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planardiffusionsverfahren |
NL7604986A (nl) * | 1976-05-11 | 1977-11-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze. |
DE2751163C3 (de) * | 1977-11-16 | 1982-02-25 | Brown, Boveri & Cie Ag, 6800 Mannheim | Verfahren zur Steuerung einer offenen Gallium-Diffusion und Vorrichtung zur Durchführung desselben |
DE2838928A1 (de) * | 1978-09-07 | 1980-03-20 | Ibm Deutschland | Verfahren zum dotieren von siliciumkoerpern mit bor |
US4234361A (en) * | 1979-07-05 | 1980-11-18 | Wisconsin Alumni Research Foundation | Process for producing an electrostatically deformable thin silicon membranes utilizing a two-stage diffusion step to form an etchant resistant layer |
JPS5614139U (it) * | 1979-07-14 | 1981-02-06 | ||
JPS6133636Y2 (it) * | 1981-01-29 | 1986-10-01 | ||
JPH03158569A (ja) * | 1989-11-15 | 1991-07-08 | Misawa Homes Co Ltd | 工業化住宅の施工用転落防止構造 |
DE102012025429A1 (de) | 2012-12-21 | 2014-06-26 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Dotierung von Halbleitersubstraten sowie dotiertes Halbleitersubstrat |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1444536C3 (de) * | 1963-05-20 | 1975-03-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Diffusionsdotieren eines Silicium-Halbleiterkristalls |
-
1972
- 1972-04-06 US US00241821A patent/US3806382A/en not_active Expired - Lifetime
-
1973
- 1973-03-07 JP JP2623073A patent/JPS5321835B2/ja not_active Expired
- 1973-03-08 IT IT21302/73A patent/IT981193B/it active
- 1973-03-08 GB GB1138973A patent/GB1397684A/en not_active Expired
- 1973-03-13 CA CA166,915A patent/CA980665A/en not_active Expired
- 1973-03-21 FR FR7311706A patent/FR2178984B1/fr not_active Expired
- 1973-04-03 DE DE2316520A patent/DE2316520C3/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2316520A1 (de) | 1973-10-11 |
CA980665A (en) | 1975-12-30 |
GB1397684A (en) | 1975-06-18 |
DE2316520C3 (de) | 1981-12-10 |
US3806382A (en) | 1974-04-23 |
DE2316520B2 (de) | 1980-11-27 |
FR2178984B1 (it) | 1978-03-03 |
JPS4910666A (it) | 1974-01-30 |
JPS5321835B2 (it) | 1978-07-05 |
FR2178984A1 (it) | 1973-11-16 |
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