IT8783658A0 - SEMICONDUCTOR DEVICE IN A PLASTIC OR CERAMIC ENCLOSURE WITH "CHIPS" ATTACHED TO BOTH SIDES OF THE CENTRAL ISLAND OF THE "FRAME". - Google Patents
SEMICONDUCTOR DEVICE IN A PLASTIC OR CERAMIC ENCLOSURE WITH "CHIPS" ATTACHED TO BOTH SIDES OF THE CENTRAL ISLAND OF THE "FRAME".Info
- Publication number
- IT8783658A0 IT8783658A0 IT8783658A IT8365887A IT8783658A0 IT 8783658 A0 IT8783658 A0 IT 8783658A0 IT 8783658 A IT8783658 A IT 8783658A IT 8365887 A IT8365887 A IT 8365887A IT 8783658 A0 IT8783658 A0 IT 8783658A0
- Authority
- IT
- Italy
- Prior art keywords
- chips
- plastic
- frame
- sides
- attached
- Prior art date
Links
- 239000000919 ceramic Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/45001—Core members of the connector
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8783658A IT1214254B (en) | 1987-09-23 | 1987-09-23 | SEMICONDUCTOR DEVICE IN PLASTIC OR CERAMIC CONTAINER WITH "CHIPS" FIXED ON BOTH SIDES OF THE CENTRAL ISLAND OF THE "FRAME". |
US07/493,466 US5034350A (en) | 1987-09-23 | 1990-03-14 | Semiconductor device package with dies mounted on both sides of the central pad of a metal frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8783658A IT1214254B (en) | 1987-09-23 | 1987-09-23 | SEMICONDUCTOR DEVICE IN PLASTIC OR CERAMIC CONTAINER WITH "CHIPS" FIXED ON BOTH SIDES OF THE CENTRAL ISLAND OF THE "FRAME". |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8783658A0 true IT8783658A0 (en) | 1987-09-23 |
IT1214254B IT1214254B (en) | 1990-01-10 |
Family
ID=11323697
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8783658A IT1214254B (en) | 1987-09-23 | 1987-09-23 | SEMICONDUCTOR DEVICE IN PLASTIC OR CERAMIC CONTAINER WITH "CHIPS" FIXED ON BOTH SIDES OF THE CENTRAL ISLAND OF THE "FRAME". |
Country Status (2)
Country | Link |
---|---|
US (1) | US5034350A (en) |
IT (1) | IT1214254B (en) |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2582013B2 (en) * | 1991-02-08 | 1997-02-19 | 株式会社東芝 | Resin-sealed semiconductor device and method of manufacturing the same |
US5219795A (en) * | 1989-02-07 | 1993-06-15 | Fujitsu Limited | Dual in-line packaging and method of producing the same |
US6205654B1 (en) | 1992-12-11 | 2001-03-27 | Staktek Group L.P. | Method of manufacturing a surface mount package |
US5340771A (en) * | 1993-03-18 | 1994-08-23 | Lsi Logic Corporation | Techniques for providing high I/O count connections to semiconductor dies |
US5366933A (en) * | 1993-10-13 | 1994-11-22 | Intel Corporation | Method for constructing a dual sided, wire bonded integrated circuit chip package |
US5527740A (en) * | 1994-06-28 | 1996-06-18 | Intel Corporation | Manufacturing dual sided wire bonded integrated circuit chip packages using offset wire bonds and support block cavities |
TW281795B (en) | 1994-11-30 | 1996-07-21 | Sharp Kk | |
US5615475A (en) * | 1995-01-30 | 1997-04-01 | Staktek Corporation | Method of manufacturing an integrated package having a pair of die on a common lead frame |
JP3012816B2 (en) * | 1996-10-22 | 2000-02-28 | 松下電子工業株式会社 | Resin-sealed semiconductor device and method of manufacturing the same |
US6133067A (en) * | 1997-12-06 | 2000-10-17 | Amic Technology Inc. | Architecture for dual-chip integrated circuit package and method of manufacturing the same |
US6117382A (en) | 1998-02-05 | 2000-09-12 | Micron Technology, Inc. | Method for encasing array packages |
JP2002534363A (en) * | 1999-01-08 | 2002-10-15 | エミスフェアー・テクノロジーズ・インク | Polymeric delivery agent and delivery agent compound |
US6323060B1 (en) | 1999-05-05 | 2001-11-27 | Dense-Pac Microsystems, Inc. | Stackable flex circuit IC package and method of making same |
US6572387B2 (en) | 1999-09-24 | 2003-06-03 | Staktek Group, L.P. | Flexible circuit connector for stacked chip module |
US6262895B1 (en) | 2000-01-13 | 2001-07-17 | John A. Forthun | Stackable chip package with flex carrier |
JP3522177B2 (en) * | 2000-02-21 | 2004-04-26 | 株式会社三井ハイテック | Method for manufacturing semiconductor device |
US6608763B1 (en) | 2000-09-15 | 2003-08-19 | Staktek Group L.P. | Stacking system and method |
US6462408B1 (en) | 2001-03-27 | 2002-10-08 | Staktek Group, L.P. | Contact member stacking system and method |
US6603916B1 (en) | 2001-07-26 | 2003-08-05 | Lightwave Microsystems Corporation | Lightwave circuit assembly having low deformation balanced sandwich substrate |
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US7485951B2 (en) | 2001-10-26 | 2009-02-03 | Entorian Technologies, Lp | Modularized die stacking system and method |
US7026708B2 (en) * | 2001-10-26 | 2006-04-11 | Staktek Group L.P. | Low profile chip scale stacking system and method |
US20030234443A1 (en) | 2001-10-26 | 2003-12-25 | Staktek Group, L.P. | Low profile stacking system and method |
US7053478B2 (en) | 2001-10-26 | 2006-05-30 | Staktek Group L.P. | Pitch change and chip scale stacking system |
US6914324B2 (en) | 2001-10-26 | 2005-07-05 | Staktek Group L.P. | Memory expansion and chip scale stacking system and method |
US20060255446A1 (en) | 2001-10-26 | 2006-11-16 | Staktek Group, L.P. | Stacked modules and method |
US7656678B2 (en) | 2001-10-26 | 2010-02-02 | Entorian Technologies, Lp | Stacked module systems |
US7310458B2 (en) | 2001-10-26 | 2007-12-18 | Staktek Group L.P. | Stacked module systems and methods |
US6576992B1 (en) | 2001-10-26 | 2003-06-10 | Staktek Group L.P. | Chip scale stacking system and method |
US7202555B2 (en) | 2001-10-26 | 2007-04-10 | Staktek Group L.P. | Pitch change and chip scale stacking system and method |
US7371609B2 (en) | 2001-10-26 | 2008-05-13 | Staktek Group L.P. | Stacked module systems and methods |
US6956284B2 (en) | 2001-10-26 | 2005-10-18 | Staktek Group L.P. | Integrated circuit stacking system and method |
US7081373B2 (en) | 2001-12-14 | 2006-07-25 | Staktek Group, L.P. | CSP chip stack with flex circuit |
US6841029B2 (en) * | 2003-03-27 | 2005-01-11 | Advanced Cardiovascular Systems, Inc. | Surface modification of expanded ultra high molecular weight polyethylene (eUHMWPE) for improved bondability |
US7542304B2 (en) | 2003-09-15 | 2009-06-02 | Entorian Technologies, Lp | Memory expansion and integrated circuit stacking system and method |
CN101002314A (en) * | 2004-08-31 | 2007-07-18 | 松下电器产业株式会社 | Micromachine device |
US7511968B2 (en) | 2004-09-03 | 2009-03-31 | Entorian Technologies, Lp | Buffered thin module system and method |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3597666A (en) * | 1969-11-26 | 1971-08-03 | Fairchild Camera Instr Co | Lead frame design |
JPS54144872A (en) * | 1978-05-04 | 1979-11-12 | Omron Tateisi Electronics Co | Electronic circuit device |
JPS5522889A (en) * | 1979-04-27 | 1980-02-18 | Nec Corp | Manufacturing method of semiconductor device |
JPS5662351A (en) * | 1979-10-26 | 1981-05-28 | Hitachi Ltd | Semiconductor device for memory |
JPS5740945A (en) * | 1980-08-25 | 1982-03-06 | Fujitsu Ltd | Integrated circuit device |
JPS57147260A (en) * | 1981-03-05 | 1982-09-11 | Matsushita Electronics Corp | Manufacture of resin-sealed semiconductor device and lead frame used therefor |
US4451973A (en) * | 1981-04-28 | 1984-06-05 | Matsushita Electronics Corporation | Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor |
US4529667A (en) * | 1983-04-06 | 1985-07-16 | The Furukawa Electric Company, Ltd. | Silver-coated electric composite materials |
JPS62219531A (en) * | 1986-03-19 | 1987-09-26 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
JPS62287656A (en) * | 1986-06-05 | 1987-12-14 | Fujitsu Ltd | Formation of lead for electronic component |
-
1987
- 1987-09-23 IT IT8783658A patent/IT1214254B/en active
-
1990
- 1990-03-14 US US07/493,466 patent/US5034350A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
IT1214254B (en) | 1990-01-10 |
US5034350A (en) | 1991-07-23 |
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