IT8568044A0 - Memoria ad elevata capacita accessibile a diversi agenti - Google Patents
Memoria ad elevata capacita accessibile a diversi agentiInfo
- Publication number
- IT8568044A0 IT8568044A0 IT8568044A IT6804485A IT8568044A0 IT 8568044 A0 IT8568044 A0 IT 8568044A0 IT 8568044 A IT8568044 A IT 8568044A IT 6804485 A IT6804485 A IT 6804485A IT 8568044 A0 IT8568044 A0 IT 8568044A0
- Authority
- IT
- Italy
- Prior art keywords
- high capacity
- capacity memory
- memory accessible
- various agents
- agents
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- Multi Processors (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68044/85A IT1184013B (it) | 1985-12-13 | 1985-12-13 | Memoria ad elevata capacita accessibile a diverse agenti |
ES86116470T ES2074975T3 (es) | 1985-12-13 | 1986-11-27 | Memoria de alta capacidad para sistemas de multiprocesador. |
DE3650249T DE3650249T2 (de) | 1985-12-13 | 1986-11-27 | Hochkapazitätsspeicher für Multiprozessorsystem. |
EP86116470A EP0229932B1 (en) | 1985-12-13 | 1986-11-27 | High-capacity memory for multiprocessor systems |
JP61295066A JP2584755B2 (ja) | 1985-12-13 | 1986-12-12 | 大容量メモリおよび該大容量メモリを具備するマルチプロセツサシステム |
US07/405,408 US5060186A (en) | 1985-12-13 | 1989-09-11 | High-capacity memory having extended addressing capacity in a multiprocessing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68044/85A IT1184013B (it) | 1985-12-13 | 1985-12-13 | Memoria ad elevata capacita accessibile a diverse agenti |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8568044A0 true IT8568044A0 (it) | 1985-12-13 |
IT1184013B IT1184013B (it) | 1987-10-22 |
Family
ID=11307419
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT68044/85A IT1184013B (it) | 1985-12-13 | 1985-12-13 | Memoria ad elevata capacita accessibile a diverse agenti |
Country Status (6)
Country | Link |
---|---|
US (1) | US5060186A (it) |
EP (1) | EP0229932B1 (it) |
JP (1) | JP2584755B2 (it) |
DE (1) | DE3650249T2 (it) |
ES (1) | ES2074975T3 (it) |
IT (1) | IT1184013B (it) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5822578A (en) * | 1987-12-22 | 1998-10-13 | Sun Microsystems, Inc. | System for inserting instructions into processor instruction stream in order to perform interrupt processing |
US5341483A (en) * | 1987-12-22 | 1994-08-23 | Kendall Square Research Corporation | Dynamic hierarchial associative memory |
US5335325A (en) * | 1987-12-22 | 1994-08-02 | Kendall Square Research Corporation | High-speed packet switching apparatus and method |
US5761413A (en) * | 1987-12-22 | 1998-06-02 | Sun Microsystems, Inc. | Fault containment system for multiprocessor with shared memory |
US5055999A (en) * | 1987-12-22 | 1991-10-08 | Kendall Square Research Corporation | Multiprocessor digital data processing system |
US5282201A (en) * | 1987-12-22 | 1994-01-25 | Kendall Square Research Corporation | Dynamic packet routing network |
JPH02242355A (ja) * | 1989-03-16 | 1990-09-26 | Fujitsu Ltd | 拡張アドレス空間を持つマイクロプロセシングシステム |
CA2019300C (en) * | 1989-06-22 | 2001-06-12 | Kendall Square Research Corporation | Multiprocessor system with shared memory |
JPH05506113A (ja) * | 1990-01-05 | 1993-09-02 | マスパー・コンピューター・コーポレイション | 並列プロセッサメモリシステム |
US5363498A (en) * | 1990-02-09 | 1994-11-08 | Hitachi, Ltd. | Method of controlling shared data among computers |
US5313647A (en) * | 1991-09-20 | 1994-05-17 | Kendall Square Research Corporation | Digital data processor with improved checkpointing and forking |
CA2078310A1 (en) * | 1991-09-20 | 1993-03-21 | Mark A. Kaufman | Digital processor with distributed memory system |
CA2078315A1 (en) * | 1991-09-20 | 1993-03-21 | Christopher L. Reeve | Parallel processing apparatus and method for utilizing tiling |
CA2078312A1 (en) | 1991-09-20 | 1993-03-21 | Mark A. Kaufman | Digital data processor with improved paging |
US5386525A (en) * | 1991-10-29 | 1995-01-31 | Pacific Bell | System for providing application programs with direct addressability into a shared dataspace |
KR950006332B1 (ko) * | 1992-11-19 | 1995-06-14 | 삼성전자주식회사 | 메모리 데이터의 고속 억세스 회로 |
US6885994B1 (en) * | 1995-12-26 | 2005-04-26 | Catalina Marketing International, Inc. | System and method for providing shopping aids and incentives to customers through a computer network |
TW567695B (en) * | 2001-01-17 | 2003-12-21 | Ibm | Digital baseband system |
US9182993B2 (en) * | 2005-03-18 | 2015-11-10 | Broadcom Corporation | Data and phase locking buffer design in a two-way handshake system |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3555513A (en) * | 1967-10-11 | 1971-01-12 | Burroughs Corp | Multiprocessor digital computer system with address modification during program execution |
US3856613A (en) * | 1972-08-28 | 1974-12-24 | Mccord Corp | Compressible energy absorbing article |
US3914747A (en) * | 1974-02-26 | 1975-10-21 | Periphonics Corp | Memory having non-fixed relationships between addresses and storage locations |
JPS5171648A (it) * | 1974-12-18 | 1976-06-21 | Panafacom Ltd | |
US4212057A (en) * | 1976-04-22 | 1980-07-08 | General Electric Company | Shared memory multi-microprocessor computer system |
US4363091A (en) * | 1978-01-31 | 1982-12-07 | Intel Corporation | Extended address, single and multiple bit microprocessor |
US4340932A (en) * | 1978-05-17 | 1982-07-20 | Harris Corporation | Dual mapping memory expansion unit |
US4309754A (en) * | 1979-07-30 | 1982-01-05 | International Business Machines Corp. | Data interface mechanism for interfacing bit-parallel data buses of different bit width |
DE3015125A1 (de) * | 1980-04-19 | 1981-10-22 | Ibm Deutschland Gmbh, 7000 Stuttgart | Einrichtung zur speicherung und darstellung graphischer information |
US4500952A (en) * | 1980-05-23 | 1985-02-19 | International Business Machines Corporation | Mechanism for control of address translation by a program using a plurality of translation tables |
US4403283A (en) * | 1980-07-28 | 1983-09-06 | Ncr Corporation | Extended memory system and method |
US4426680A (en) * | 1980-12-24 | 1984-01-17 | Honeywell Information Systems Inc. | Data processor using read only memories for optimizing main memory access and identifying the starting position of an operand |
JPS57162162A (en) * | 1981-03-27 | 1982-10-05 | Fujitsu Ltd | Multiplex virtual space data processing system |
US4432053A (en) * | 1981-06-29 | 1984-02-14 | Burroughs Corporation | Address generating apparatus and method |
IT1183808B (it) * | 1985-04-30 | 1987-10-22 | Olivetti & Co Spa | Circuito elettronico per collegare un microprocessore ad una memoria ad elevata capacita |
-
1985
- 1985-12-13 IT IT68044/85A patent/IT1184013B/it active
-
1986
- 1986-11-27 EP EP86116470A patent/EP0229932B1/en not_active Expired - Lifetime
- 1986-11-27 DE DE3650249T patent/DE3650249T2/de not_active Expired - Fee Related
- 1986-11-27 ES ES86116470T patent/ES2074975T3/es not_active Expired - Lifetime
- 1986-12-12 JP JP61295066A patent/JP2584755B2/ja not_active Expired - Lifetime
-
1989
- 1989-09-11 US US07/405,408 patent/US5060186A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
ES2074975T3 (es) | 1995-10-01 |
EP0229932B1 (en) | 1995-03-01 |
IT1184013B (it) | 1987-10-22 |
US5060186A (en) | 1991-10-22 |
EP0229932A3 (en) | 1989-09-13 |
JPS62182862A (ja) | 1987-08-11 |
DE3650249T2 (de) | 1995-09-07 |
DE3650249D1 (de) | 1995-04-06 |
JP2584755B2 (ja) | 1997-02-26 |
EP0229932A2 (en) | 1987-07-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19981221 |