IT8423237A0 - Circuito per limitare transitori di jitter durante la commutazione. - Google Patents

Circuito per limitare transitori di jitter durante la commutazione.

Info

Publication number
IT8423237A0
IT8423237A0 IT8423237A IT2323784A IT8423237A0 IT 8423237 A0 IT8423237 A0 IT 8423237A0 IT 8423237 A IT8423237 A IT 8423237A IT 2323784 A IT2323784 A IT 2323784A IT 8423237 A0 IT8423237 A0 IT 8423237A0
Authority
IT
Italy
Prior art keywords
circuit
during switching
transients during
limit jitter
jitter
Prior art date
Application number
IT8423237A
Other languages
English (en)
Other versions
IT8423237A1 (it
IT1175870B (it
Inventor
Giuliano Cellerino
Original Assignee
Phoenix Arizona U S A A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Phoenix Arizona U S A A filed Critical Phoenix Arizona U S A A
Publication of IT8423237A0 publication Critical patent/IT8423237A0/it
Publication of IT8423237A1 publication Critical patent/IT8423237A1/it
Application granted granted Critical
Publication of IT1175870B publication Critical patent/IT1175870B/it

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/22Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0083Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Analogue/Digital Conversion (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
IT23237/84A 1984-09-25 1984-10-19 Circuito per limitare transitori di jitter durante la commutazione IT1175870B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/654,337 US4600896A (en) 1984-09-25 1984-09-25 Circuit for limiting jitter transients during switching of phase control signals to an oscillator

Publications (3)

Publication Number Publication Date
IT8423237A0 true IT8423237A0 (it) 1984-10-19
IT8423237A1 IT8423237A1 (it) 1986-04-19
IT1175870B IT1175870B (it) 1987-07-15

Family

ID=24624450

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23237/84A IT1175870B (it) 1984-09-25 1984-10-19 Circuito per limitare transitori di jitter durante la commutazione

Country Status (8)

Country Link
US (1) US4600896A (it)
EP (1) EP0175888B1 (it)
JP (1) JPS6181022A (it)
AU (1) AU587583B2 (it)
CA (1) CA1213946A (it)
DE (1) DE3583268D1 (it)
IT (1) IT1175870B (it)
ZA (1) ZA856787B (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4600896A (en) * 1984-09-25 1986-07-15 Gte Communication Systems Corporation Circuit for limiting jitter transients during switching of phase control signals to an oscillator
US4752749A (en) * 1986-12-22 1988-06-21 Rockwell International Corporation Fast response tuner
US4914404A (en) * 1988-08-02 1990-04-03 Siemens Aktiengesellschaft Method for synchronization of a signal frequency to interference-prone reference signal frequencies
US5260979A (en) * 1991-05-28 1993-11-09 Codex Corp. Circuit and method of switching between redundant clocks for a phase lock loop
JP3208736B2 (ja) * 1991-11-08 2001-09-17 ソニー株式会社 Pll回路
DE4408852C1 (de) * 1994-03-16 1994-11-17 Ant Nachrichtentech Verfahren zur Bereitstellung eines Rahmentaktes sowie Anordnung und Anwendung
KR0177731B1 (ko) * 1994-09-15 1999-05-15 정장호 망동기용 디지탈 위상동기루프 제어방법
SE505403C2 (sv) * 1995-11-30 1997-08-18 Ericsson Telefon Ab L M Förfarande för reducering av transienter i ett redundant klocksignalgenererande system
WO1998024185A1 (de) * 1996-11-26 1998-06-04 Siemens Aktiengesellschaft Synchronisationseinrichtung einer baugruppe
US5986486A (en) * 1997-11-10 1999-11-16 Adc Telecommunications, Inc. Circuits and methods for a phase lock loop for synchronous reference clocks
US7140952B1 (en) * 2005-09-22 2006-11-28 Pratt & Whitney Canada Corp. Oxidation protected blade and method of manufacturing

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4511859A (en) * 1982-08-30 1985-04-16 At&T Bell Laboratories Apparatus for generating a common output signal as a function of any of a plurality of diverse input signals
US4600896A (en) * 1984-09-25 1986-07-15 Gte Communication Systems Corporation Circuit for limiting jitter transients during switching of phase control signals to an oscillator

Also Published As

Publication number Publication date
EP0175888B1 (en) 1991-06-19
DE3583268D1 (de) 1991-07-25
ZA856787B (en) 1986-05-28
AU4782485A (en) 1986-04-10
IT8423237A1 (it) 1986-04-19
JPS6181022A (ja) 1986-04-24
AU587583B2 (en) 1989-08-24
CA1213946A (en) 1986-11-12
IT1175870B (it) 1987-07-15
US4600896A (en) 1986-07-15
EP0175888A2 (en) 1986-04-02
JPH0325102B2 (it) 1991-04-05
EP0175888A3 (en) 1987-11-11

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19950710