IT8220848A0 - Circuito atto ad aumentare il numero di pannelli circuitali a vie collettrici in una configurazione a vie collettrici ad anello chiuso. - Google Patents

Circuito atto ad aumentare il numero di pannelli circuitali a vie collettrici in una configurazione a vie collettrici ad anello chiuso.

Info

Publication number
IT8220848A0
IT8220848A0 IT8220848A IT2084882A IT8220848A0 IT 8220848 A0 IT8220848 A0 IT 8220848A0 IT 8220848 A IT8220848 A IT 8220848A IT 2084882 A IT2084882 A IT 2084882A IT 8220848 A0 IT8220848 A0 IT 8220848A0
Authority
IT
Italy
Prior art keywords
increasing
closed loop
circuit
loop configuration
panels
Prior art date
Application number
IT8220848A
Other languages
English (en)
Other versions
IT1150542B (it
IT8220848A1 (it
Inventor
Michel Loos
Joseph A Comfort
Thomas J Perry
Original Assignee
Gte Automatic Electric Lab Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Automatic Electric Lab Inc filed Critical Gte Automatic Electric Lab Inc
Publication of IT8220848A0 publication Critical patent/IT8220848A0/it
Publication of IT8220848A1 publication Critical patent/IT8220848A1/it
Application granted granted Critical
Publication of IT1150542B publication Critical patent/IT1150542B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
IT2084882A 1981-05-26 1982-04-21 Circuito atto ad aumentare il numero di pannelli circuitali a vie collettrici in una configurazione a vie collettrici ad anello chiuso IT1150542B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/267,165 US4356404A (en) 1981-05-26 1981-05-26 Circuit for equipping a variable number of bus units on a closed loop bus

Publications (3)

Publication Number Publication Date
IT8220848A0 true IT8220848A0 (it) 1982-04-21
IT8220848A1 IT8220848A1 (it) 1983-10-21
IT1150542B IT1150542B (it) 1986-12-10

Family

ID=23017596

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2084882A IT1150542B (it) 1981-05-26 1982-04-21 Circuito atto ad aumentare il numero di pannelli circuitali a vie collettrici in una configurazione a vie collettrici ad anello chiuso

Country Status (5)

Country Link
US (1) US4356404A (it)
JP (1) JPS57197942A (it)
BE (1) BE893270A (it)
CA (1) CA1180076A (it)
IT (1) IT1150542B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AUPQ005099A0 (en) * 1999-04-29 1999-05-20 Canon Kabushiki Kaisha Sequential bus architecture
EP3753592B1 (en) 2013-12-20 2023-11-22 Sanofi-Aventis Deutschland GmbH Disposable cartridge for a drug delivery device
US10484732B2 (en) * 2015-12-29 2019-11-19 Tv One Limited Data processing backplane with serial bus communication loop

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312941A (en) * 1955-11-01 1967-04-04 Rca Corp Switching network
US3111653A (en) * 1960-03-10 1963-11-19 Electronic Associates Remote control signaling system

Also Published As

Publication number Publication date
JPS57197942A (en) 1982-12-04
CA1180076A (en) 1984-12-27
IT1150542B (it) 1986-12-10
IT8220848A1 (it) 1983-10-21
US4356404A (en) 1982-10-26
BE893270A (fr) 1982-09-16

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