IT8124331A0 - Metodo per creare una struttura a metallizzazione dielettrico. - Google Patents
Metodo per creare una struttura a metallizzazione dielettrico.Info
- Publication number
- IT8124331A0 IT8124331A0 IT8124331A IT2433181A IT8124331A0 IT 8124331 A0 IT8124331 A0 IT 8124331A0 IT 8124331 A IT8124331 A IT 8124331A IT 2433181 A IT2433181 A IT 2433181A IT 8124331 A0 IT8124331 A0 IT 8124331A0
- Authority
- IT
- Italy
- Prior art keywords
- creating
- metallization structure
- dielectric metallization
- dielectric
- metallization
- Prior art date
Links
- 238000001465 metallisation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US20176780A | 1980-10-29 | 1980-10-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8124331A0 true IT8124331A0 (it) | 1981-10-05 |
IT1153991B IT1153991B (it) | 1987-01-21 |
Family
ID=22747208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT24331/81A IT1153991B (it) | 1980-10-29 | 1981-10-05 | Metodo per creare una struttura a metallizzazione dielettrico |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS57102023A (it) |
DE (1) | DE3141680A1 (it) |
IT (1) | IT1153991B (it) |
SE (1) | SE8105918L (it) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5925246A (ja) * | 1982-08-02 | 1984-02-09 | Nec Corp | 半導体装置の製造方法 |
DE3231457A1 (de) * | 1982-08-24 | 1984-03-01 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum erzeugen von strukturen fuer integrierte halbleiterschaltungen durch reaktives ionenaetzen |
DE3234907A1 (de) * | 1982-09-21 | 1984-03-22 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen einer monolithisch integrierten schaltung |
JPS5955037A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Ltd | 半導体装置 |
DE3328339A1 (de) * | 1983-08-05 | 1985-02-14 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zur metallisierung einer kunststoffoberflaeche |
DE3429082A1 (de) * | 1984-08-07 | 1986-02-27 | Siemens AG, 1000 Berlin und 8000 München | Steuerscheibe fuer gasentladungsanzeige |
JPH0789551B2 (ja) * | 1986-02-13 | 1995-09-27 | 日本電気株式会社 | 半導体装置 |
DE3615519A1 (de) * | 1986-05-07 | 1987-11-12 | Siemens Ag | Verfahren zum erzeugen von kontaktloechern mit abgeschraegten flanken in zwischenoxidschichten |
DE69219998T2 (de) * | 1991-10-31 | 1997-12-18 | Sgs Thomson Microelectronics | Verfahren zur Entfernung von Polymeren aus Sacklöchern in Halbleitervorrichtungen |
DE4311807C2 (de) * | 1993-04-03 | 1998-03-19 | Atotech Deutschland Gmbh | Verfahren zur Beschichtung von Metallen und Anwendung des Verfahrens in der Leiterplattentechnik |
US5597983A (en) * | 1994-02-03 | 1997-01-28 | Sgs-Thomson Microelectronics, Inc. | Process of removing polymers in semiconductor vias |
US20040209190A1 (en) * | 2000-12-22 | 2004-10-21 | Yoshiaki Mori | Pattern forming method and apparatus used for semiconductor device, electric circuit, display module, and light emitting device |
-
1981
- 1981-10-05 IT IT24331/81A patent/IT1153991B/it active
- 1981-10-07 SE SE8105918A patent/SE8105918L/ not_active Application Discontinuation
- 1981-10-21 DE DE19813141680 patent/DE3141680A1/de not_active Withdrawn
- 1981-10-26 JP JP56171941A patent/JPS57102023A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS57102023A (en) | 1982-06-24 |
SE8105918L (sv) | 1982-04-30 |
DE3141680A1 (de) | 1982-06-16 |
IT1153991B (it) | 1987-01-21 |
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