IT7830894A0 - J-fet, canale p, a bassa tensione di pinch-off. - Google Patents

J-fet, canale p, a bassa tensione di pinch-off.

Info

Publication number
IT7830894A0
IT7830894A0 IT7830894A IT3089478A IT7830894A0 IT 7830894 A0 IT7830894 A0 IT 7830894A0 IT 7830894 A IT7830894 A IT 7830894A IT 3089478 A IT3089478 A IT 3089478A IT 7830894 A0 IT7830894 A0 IT 7830894A0
Authority
IT
Italy
Prior art keywords
fet
channel
low voltage
voltage pinch
pinch
Prior art date
Application number
IT7830894A
Other languages
English (en)
Other versions
IT1101311B (it
Inventor
Bertotti Franco
Foroni Mario
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT30894/78A priority Critical patent/IT1101311B/it
Publication of IT7830894A0 publication Critical patent/IT7830894A0/it
Priority to FR7929738A priority patent/FR2444340A1/fr
Priority to SE7910189A priority patent/SE437200B/sv
Priority to US06/103,423 priority patent/US4266233A/en
Priority to DE19792950452 priority patent/DE2950452A1/de
Priority to JP16172579A priority patent/JPS55117256A/ja
Priority to GB7943351A priority patent/GB2037078A/en
Application granted granted Critical
Publication of IT1101311B publication Critical patent/IT1101311B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • H01L29/8083Vertical transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
IT30894/78A 1978-12-15 1978-12-15 J-fet,canale p,a bassa tensione di pinch-off IT1101311B (it)

Priority Applications (7)

Application Number Priority Date Filing Date Title
IT30894/78A IT1101311B (it) 1978-12-15 1978-12-15 J-fet,canale p,a bassa tensione di pinch-off
FR7929738A FR2444340A1 (fr) 1978-12-15 1979-12-04 Transistor a effet de champ a jonction a canal p a basse tension de pincement
SE7910189A SE437200B (sv) 1978-12-15 1979-12-11 Integrerad halvledaranordning bestaende av minst en unipoler felteffekttransistor av sperrskiktstyp med en p-kanal
US06/103,423 US4266233A (en) 1978-12-15 1979-12-14 I-C Wafer incorporating junction-type field-effect transistor
DE19792950452 DE2950452A1 (de) 1978-12-15 1979-12-14 P-kanal - j-fet mit niedriger abschnuerspannung
JP16172579A JPS55117256A (en) 1978-12-15 1979-12-14 Integrated circuit device
GB7943351A GB2037078A (en) 1978-12-15 1979-12-17 P channel j-fet with low pinch-off voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT30894/78A IT1101311B (it) 1978-12-15 1978-12-15 J-fet,canale p,a bassa tensione di pinch-off

Publications (2)

Publication Number Publication Date
IT7830894A0 true IT7830894A0 (it) 1978-12-15
IT1101311B IT1101311B (it) 1985-09-28

Family

ID=11232705

Family Applications (1)

Application Number Title Priority Date Filing Date
IT30894/78A IT1101311B (it) 1978-12-15 1978-12-15 J-fet,canale p,a bassa tensione di pinch-off

Country Status (7)

Country Link
US (1) US4266233A (it)
JP (1) JPS55117256A (it)
DE (1) DE2950452A1 (it)
FR (1) FR2444340A1 (it)
GB (1) GB2037078A (it)
IT (1) IT1101311B (it)
SE (1) SE437200B (it)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029350B1 (en) * 1979-11-14 1987-08-05 Fujitsu Limited An output transistor of a ttl device with a means for discharging carriers
US4833095A (en) * 1985-02-19 1989-05-23 Eaton Corporation Method for buried channel field effect transistor for microwave and millimeter frequencies utilizing ion implantation
US4837175A (en) * 1983-02-15 1989-06-06 Eaton Corporation Making a buried channel FET with lateral growth over amorphous region
US4724220A (en) * 1985-02-19 1988-02-09 Eaton Corporation Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies
US4935789A (en) * 1985-02-19 1990-06-19 Eaton Corporation Buried channel FET with lateral growth over amorphous region
US5610079A (en) * 1995-06-19 1997-03-11 Reliance Electric Industrial Company Self-biased moat for parasitic current suppression in integrated circuits
US5945699A (en) * 1997-05-13 1999-08-31 Harris Corporation Reduce width, differentially doped vertical JFET device
US6710538B1 (en) * 1998-08-26 2004-03-23 Micron Technology, Inc. Field emission display having reduced power requirements and method
JP4907736B2 (ja) * 2011-02-22 2012-04-04 鹿島建設株式会社 サンゴ礁の造成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181542A (en) * 1976-10-25 1980-01-01 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing junction field effect transistors
JPS5368178A (en) * 1976-11-30 1978-06-17 Handotai Kenkyu Shinkokai Fet transistor
US4095252A (en) * 1976-12-27 1978-06-13 National Semiconductor Corporation Composite jfet-bipolar transistor structure
US4170019A (en) * 1977-08-05 1979-10-02 General Electric Company Semiconductor device with variable grid openings for controlling turn-off pattern

Also Published As

Publication number Publication date
SE7910189L (sv) 1980-06-16
JPS55117256A (en) 1980-09-09
DE2950452A1 (de) 1980-06-26
SE437200B (sv) 1985-02-11
GB2037078A (en) 1980-07-02
US4266233A (en) 1981-05-05
FR2444340A1 (fr) 1980-07-11
IT1101311B (it) 1985-09-28

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227